target: rename cortex_m3.[ch] to cortex_m.[ch] This rename is in preparation for cortex_m4 support. Change-Id: Ic08c298ec6ed2aabc2c39db67191f68b3a51f550 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/147 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
cortex_m3: add auto maskisr This patch extends the cortex_m3 maskisr command by a new option 'auto'. The 'auto' option handles interrupts during stepping in a way they are processed but don't disturb the program flow during debugging. Before one had to choose to either enable or disable interrupts. The former steps into interrupt handlers when they trigger. This disturbs the flow during debugging, making it hard to follow some piece of code when interrupts occur often. When interrupts are disabled, the flow isn't disturbed but code relying on interrupt handlers to be processed will stop working. For example a delay function counting the number of timer interrupts will never complete, RTOS task switching will not occur and output I/O queues of interrupt driven I/O will stall or overflow. Using the 'maskisr' command also typically requires gdb hooks to be supplied by the user to switch interrupts off during the step and to enable them again afterward. The new 'auto' option of the 'maskisr' command solves the above problems. When set, the step command allows pending interrupt handlers to be executed before the step, then the step is taken with interrupts disabled and finally interrupts are enabled again. This way interrupt processing stays in the background without disturbing the flow of debugging. No gdb hooks are required. The 'auto' option is the default, since it's believed that handling interrupts in this way is suitable for most users. The principle used for interrupt handling could probably be used for other targets too. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Revert "cortex_m3: add auto maskisr" This reverts commit ff640f197a9a343b2f3ed10e9174e35282334e8c. Original patch reverted as Author's name was incorrectly set.
cortex_m3: add auto maskisr This patch extends the cortex_m3 maskisr command by a new option 'auto'. The 'auto' option handles interrupts during stepping in a way they are processed but don't disturb the program flow during debugging. Before one had to choose to either enable or disable interrupts. The former steps into interrupt handlers when they trigger. This disturbs the flow during debugging, making it hard to follow some piece of code when interrupts occur often. When interrupts are disabled, the flow isn't disturbed but code relying on interrupt handlers to be processed will stop working. For example a delay function counting the number of timer interrupts will never complete, RTOS task switching will not occur and output I/O queues of interrupt driven I/O will stall or overflow. Using the 'maskisr' command also typically requires gdb hooks to be supplied by the user to switch interrupts off during the step and to enable them again afterward. The new 'auto' option of the 'maskisr' command solves the above problems. When set, the step command allows pending interrupt handlers to be executed before the step, then the step is taken with interrupts disabled and finally interrupts are enabled again. This way interrupt processing stays in the background without disturbing the flow of debugging. No gdb hooks are required. The 'auto' option is the default, since it's believed that handling interrupts in this way is suitable for most users. The principle used for interrupt handling could probably be used for other targets too. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
cortex_m3: change cortec_m3 reset_config behaviour Currently the cmd 'cortex_m3 reset_config' will overide the default target's 'reset_config'. Chnage the behaviour to use the target 'reset_config' if configured and fallback if not. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
cortex m3: add cortex_m3 reset_config cmd This new cmd adds the ability to choose the Cortex-M3 reset method used. It defaults to using SRST for reset if available otherwise it falls back to using NVIC VECTRESET. This is known to work on all cores. Move any luminary specific reset handling to the stellaris cfg file. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
target files shouldn't #include <target/...h> Make these ".h" files adopt the same policy the ".c" files already follow: don't use <subsystem/...h> syntax for private interfaces. If we ever get reviewed/supported "public" interfaces they should come exclusively from some include/... directory; that'll be the time to switch to <...> syntax for any subsystem's own interfaces. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
change #include "armv7m.h" to <target/armv7m.h> Changes from the flat namespace to heirarchical one. Instead of writing: #include "armv7m.h" the following form should be used. #include <target/armv7m.h> The exception is from .c files in the same directory.
ARM: only use one set of dummy FPA registers All ARM cores need to provide obsolete FPA registers in their GDB register dumps. (Even though cores with floating point support now generally use some version of VFP...) Clean up that support a bit by sharing the same dummy registers, and removing the duplicate copies. Eventually we shouldn't need to export those dummies. (This makes the ARMv7-M support include the armv4_5 header, and cleans up related #includes, but doesn't yet use anything from there except those dummies.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
target: no implicit #includes of "register.h" Same deal: "register.h" got needlessly included all over the place because of being in a few widely included headers. So take it out of the header files which included it, and put it in files which use it ... reduce needless interdependencies. Also, don't need that extra "types.h" inclusion. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
target_t -> struct target Remove misleading typedef and redundant suffix from struct target.
cortex_m3_dwt_comparator_t -> struct cortex_m3_dwt_comparator Remove misleading typedef and redundant suffix from struct cortex_m3_dwt_comparator.
cortex_m3_fp_comparator_t -> struct cortex_m3_fp_comparator Remove misleading typedef and redundant suffix from struct cortex_m3_fp_comparator.
reg_cache_t -> struct reg_cache Remove misleading typedef and redundant suffix from struct reg_cache.
cortex_m3_common_t -> struct cortex_m3_common Remove misleading typedef and redundant suffix from struct cortex_m3_common.
armv7m_common_t -> struct armv7m_common Remove misleading typedef and redundant suffix from struct armv7m_common.
arm_jtag_t -> struct arm_jtag Remove misleading typedef and redundant suffix from struct arm_jtag.
Cortex-M3: use the new inheritance/nesting scheme Use new target_to_cm3() and target_to_armv7m() inlines, instead of a series of x->arch_info conversions. Remove arch_info, since nothing uses it. Also fix an omission: the Cortex-M3 commands didn't verify that they were operating on that kind of target. Add comment about the ARMv7M version of that omission. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
target: provide container_of() Provide a cleaner way to handle single inheritance of targets in C, using the same model Linux does: structs containing other structs, un-nested via calls to a "container_of()" macro that are packaged in typesafe inline functions. Targets already use this containment idiom, but make it much more complicated because they un-nest using embedded "void *" pointers ... in chains of up to five per target, which is all pure needless complication. (Example: arm92x core, arm9tdmi, arm7_9, armv4_5 ... on top of the base "target" class.) Applying this scheme consistently simplifies things, and gets rid of many error-prone untyped pointers. It won't change any part of the type model though -- it just simplifies things. (And facilitates more cleanup later on.) Rule of thumb: where there's an X->arch_info void* pointer, access to that pointer can and should be removed. It may be convenient to set up pointers to some of the embedded structs; and shrink their current "*_common" names (annoyingly long). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Cortex-M3: expose most DWT registers Expose most DWT registers via Tcl; there are a few more, but those are mostly for profiling along with the ITM. Having this set available enables operations which aren't possible with just the standard watchpoint operations. The cycle counter may be interesting. Turn it on after reset by setting the LSB of the dwt_ctrl register, and it counts CPU clocks. You can program the comparator 0 watchpoint to trigger on a given cycle count, rather than a data address. Likewise, comparator 1 may be able to match data values given address matches from one or two other comparators. (Not all hardware supports this capability though; try it. That is something the standard watchpoint methods should eventually handle, for the single address case.) Minor cleanup: remove needless functional indirection for exposing the v7m architctural registers. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>