f58e09894ea7017c6274b9176d6acd12a1d152d2
[openocd.git] / contrib / loaders / flash / stm32l4x.S
1 /***************************************************************************
2 * Copyright (C) 2010 by Spencer Oliver *
3 * spen@spen-soft.co.uk *
4 * *
5 * Copyright (C) 2011 √ėyvind Harboe *
6 * oyvind.harboe@zylin.com *
7 * *
8 * Copyright (C) 2015 Uwe Bonnes *
9 * bon@elektron.ikp.physik.tu-darmstadt.de *
10 * *
11 * This program is free software; you can redistribute it and/or modify *
12 * it under the terms of the GNU General Public License as published by *
13 * the Free Software Foundation; either version 2 of the License, or *
14 * (at your option) any later version. *
15 * *
16 * This program is distributed in the hope that it will be useful, *
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
19 * GNU General Public License for more details. *
20 * *
21 * You should have received a copy of the GNU General Public License *
22 * along with this program; if not, write to the *
23 * Free Software Foundation, Inc. *
24 ***************************************************************************/
25
26 .text
27 .syntax unified
28 .cpu cortex-m4
29 .thumb
30 .thumb_func
31
32 /* To assemble:
33 * arm-none-eabi-gcc -c stm32l4x.S
34 *
35 * To disassemble:
36 * arm-none-eabi-objdump -o stm32l4x.o
37 *
38 * To generate binary file:
39 * arm-none-eabi-objcopy -O binary stm32l4x.o stm32l4_flash_write_code.bin
40 *
41 * To generate include file:
42 * xxd -i stm32l4_flash_write_code.bin
43 */
44
45 /*
46 * Params :
47 * r0 = workarea start, status (out)
48 * r1 = workarea end
49 * r2 = target address
50 * r3 = count (64bit words)
51 * r4 = flash base
52 *
53 * Clobbered:
54 * r6 - temp
55 * r7 - rp
56 * r8 - wp, tmp
57 */
58
59 #define STM32_FLASH_CR_OFFSET 0x14 /* offset of CR register in FLASH struct */
60 #define STM32_FLASH_SR_OFFSET 0x10 /* offset of SR register in FLASH struct */
61
62 wait_fifo:
63 ldr r8, [r0, #0] /* read wp */
64 cmp r8, #0 /* abort if wp == 0 */
65 beq exit
66 ldr r7, [r0, #4] /* read rp */
67 subs r6, r8, r7 /* number of bytes available for read in r6*/
68 cmp r6, #7 /* wait until 8 bytes are available */
69 bcc wait_fifo
70
71 ldr r6, STM32_PROG
72 str r6, [r4, #STM32_FLASH_CR_OFFSET]
73 ldr r6, [r7], #0x04 /* read one word from src, increment ptr */
74 str r6, [r2], #0x04 /* write one word to dst, increment ptr */
75 ldr r6, [r7], #0x04 /* read one word from src, increment ptr */
76 str r6, [r2], #0x04 /* write one word to dst, increment ptr */
77 dsb
78 busy:
79 ldr r6, [r4, #STM32_FLASH_SR_OFFSET]
80 tst r6, #0x10000 /* BSY (bit16) == 1 => operation in progress */
81 bne busy /* wait more... */
82 tst r6, #0xfa /* PGSERR | PGPERR | PGAERR | WRPERR | PROGERR*/
83 bne error /* fail... */
84
85 cmp r7, r1 /* wrap rp at end of buffer */
86 it cs
87 addcs r7, r0, #8 /* skip loader args */
88 str r7, [r0, #4] /* store rp */
89 subs r3, r3, #1 /* decrement dword count */
90 cbz r3, exit /* loop if not done */
91 b wait_fifo
92 error:
93 movs r1, #0
94 str r1, [r0, #4] /* set rp = 0 on error */
95 exit:
96 mov r0, r6 /* return status in r0 */
97 bkpt #0x00
98
99 STM32_PROG: .word 0x1 /* PG */

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)