Added dongle VSLLINK - from Simon Qian
[openocd.git] / doc / openocd.texi
1 \input texinfo @c -*-texinfo-*-
2 @c %**start of header
3 @setfilename
4 @settitle Open On-Chip Debugger (OpenOCD)
5 @dircategory Development
6 @direntry
7 @paragraphindent 0
8 * OpenOCD: (openocd). Open On-Chip Debugger.
9 @end direntry
10 @c %**end of header
12 @include version.texi
14 @copying
16 @itemize @bullet
17 @item Copyright @copyright{} 2008 The OpenOCD Project
18 @item Copyright @copyright{} 2007-2008 Spencer Oliver @email{}
19 @item Copyright @copyright{} 2008 Oyvind Harboe @email{}
20 @item Copyright @copyright{} 2008 Duane Ellis @email{}
21 @end itemize
23 @quotation
24 Permission is granted to copy, distribute and/or modify this document
25 under the terms of the GNU Free Documentation License, Version 1.2 or
26 any later version published by the Free Software Foundation; with no
27 Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
28 Texts. A copy of the license is included in the section entitled ``GNU
29 Free Documentation License''.
30 @end quotation
31 @end copying
33 @titlepage
34 @title Open On-Chip Debugger (OpenOCD)
35 @subtitle Edition @value{EDITION} for OpenOCD version @value{VERSION}
36 @subtitle @value{UPDATED}
37 @page
38 @vskip 0pt plus 1filll
39 @insertcopying
40 @end titlepage
42 @summarycontents
43 @contents
45 @node Top, About, , (dir)
46 @top OpenOCD
48 This manual documents edition @value{EDITION} of the Open On-Chip Debugger
49 (OpenOCD) version @value{VERSION}, @value{UPDATED}.
51 @insertcopying
53 @menu
54 * About:: About OpenOCD.
55 * Developers:: OpenOCD developers
56 * Building:: Building OpenOCD
57 * JTAG Hardware Dongles:: JTAG Hardware Dongles
58 * Running:: Running OpenOCD
59 * Simple Configuration Files:: Simple Configuration Files
60 * Config File Guidelines:: Config File Guidelines
61 * About JIM-Tcl:: About JIM-Tcl
62 * Daemon Configuration:: Daemon Configuration
63 * Interface - Dongle Configuration:: Interface - Dongle Configuration
64 * Reset Configuration:: Reset Configuration
65 * Tap Creation:: Tap Creation
66 * Target Configuration:: Target Configuration
67 * Flash Configuration:: Flash Configuration
68 * General Commands:: General Commands
69 * JTAG Commands:: JTAG Commands
70 * Sample Scripts:: Sample Target Scripts
71 * TFTP:: TFTP
72 * GDB and OpenOCD:: Using GDB and OpenOCD
73 * TCL scripting API:: Tcl scripting API
74 * Upgrading:: Deprecated/Removed Commands
75 * Target library:: Target library
76 * FAQ:: Frequently Asked Questions
77 * TCL Crash Course:: TCL Crash Course
78 * License:: GNU Free Documentation License
79 @comment DO NOT use the plain word ``Index'', reason: CYGWIN filename
80 @comment case issue with ``Index.html'' and ``index.html''
81 @comment Occurs when creating ``--html --no-split'' output
82 @comment This fix is based on:
83 * OpenOCD Index:: Main index.
84 @end menu
86 @node About
87 @unnumbered About
88 @cindex about
90 The Open On-Chip Debugger (OpenOCD) aims to provide debugging,
91 in-system programming and boundary-scan testing for embedded target
92 devices.
94 @b{JTAG:} OpenOCD uses a ``hardware interface dongle'' to communicate
95 with the JTAG (IEEE 1149.1) complient taps on your target board.
97 @b{Dongles:} OpenOCD currently many types of hardware dongles: USB
98 Based, Parallel Port Based, and other standalone boxes that run
99 OpenOCD internally. See the section titled: @xref{JTAG Hardware Dongles}.
101 @b{GDB Debug:} It allows ARM7 (ARM7TDMI and ARM720t), ARM9 (ARM920t,
102 ARM922t, ARM926ej--s, ARM966e--s), XScale (PXA25x, IXP42x) and
103 Cortex-M3 (Luminary Stellaris LM3 and ST STM32) based cores to be
104 debugged via the GDB Protocol.
106 @b{Flash Programing:} Flash writing is supported for external CFI
107 compatible flashes (Intel and AMD/Spansion command set) and several
108 internal flashes (LPC2000, AT91SAM7, STR7x, STR9x, LM3 and
109 STM32x). Preliminary support for using the LPC3180's NAND flash
110 controller is included.
112 @node Developers
113 @chapter Developers
114 @cindex developers
116 OpenOCD was created by Dominic Rath as part of a diploma thesis written at the
117 University of Applied Sciences Augsburg (@uref{}).
118 Others interested in improving the state of free and open debug and testing technology
119 are welcome to participate.
121 Other developers have contributed support for additional targets and flashes as well
122 as numerous bugfixes and enhancements. See the AUTHORS file for regular contributors.
124 The main OpenOCD web site is available at @uref{}
126 @node Building
127 @chapter Building
128 @cindex building OpenOCD
130 @section Pre-Built Tools
131 If you are interested in getting actual work done rather than building
132 OpenOCD, then check if your interface supplier provides binaries for
133 you. Chances are that that binary is from some SVN version that is more
134 stable than SVN trunk where bleeding edge development takes place.
136 @section Building From Source
138 You can download the current SVN version with SVN client of your choice from the
139 following repositories:
141 (@uref{svn://})
143 or
145 (@uref{})
147 Using the SVN command line client, you can use the following command to fetch the
148 latest version (make sure there is no (non-svn) directory called "openocd" in the
149 current directory):
151 @example
152 svn checkout svn:// openocd
153 @end example
155 Building OpenOCD requires a recent version of the GNU autotools.
156 On my build system, I'm using autoconf 2.13 and automake 1.9. For building on Windows,
157 you have to use Cygwin. Make sure that your @env{PATH} environment variable contains no
158 other locations with Unix utils (like UnxUtils) - these can't handle the Cygwin
159 paths, resulting in obscure dependency errors (This is an observation I've gathered
160 from the logs of one user - correct me if I'm wrong).
162 You further need the appropriate driver files, if you want to build support for
163 a FTDI FT2232 based interface:
164 @itemize @bullet
165 @item @b{ftdi2232} libftdi (@uref{})
166 @item @b{ftd2xx} libftd2xx (@uref{})
167 @item When using the Amontec JTAGkey, you have to get the drivers from the Amontec
168 homepage (@uref{}), as the JTAGkey uses a non-standard VID/PID.
169 @end itemize
171 libftdi is supported under windows. Do not use versions earlier then 0.14.
173 In general, the D2XX driver provides superior performance (several times as fast),
174 but has the draw-back of being binary-only - though that isn't that bad, as it isn't
175 a kernel module, only a user space library.
177 To build OpenOCD (on both Linux and Cygwin), use the following commands:
178 @example
179 ./bootstrap
180 @end example
181 Bootstrap generates the configure script, and prepares building on your system.
182 @example
183 ./configure [options, see below]
184 @end example
185 Configure generates the Makefiles used to build OpenOCD.
186 @example
187 make
188 make install
189 @end example
190 Make builds OpenOCD, and places the final executable in ./src/, the last step, ``make install'' is optional.
192 The configure script takes several options, specifying which JTAG interfaces
193 should be included:
195 @itemize @bullet
196 @item
197 @option{--enable-parport} - Bit bang pc printer ports.
198 @item
199 @option{--enable-parport_ppdev} - Parallel Port [see below]
200 @item
201 @option{--enable-parport_giveio} - Parallel Port [see below]
202 @item
203 @option{--enable-amtjtagaccel} - Parallel Port [Amontec, see below]
204 @item
205 @option{--enable-ft2232_ftd2xx} - Numerous USB Type ARM JTAG dongles use the FT2232C chip from this FTDICHIP.COM chip (closed source).
206 @item
207 @option{--enable-ft2232_libftdi} - An open source (free) alternate to FTDICHIP.COM ftd2xx solution (Linux, MacOS, Cygwin)
208 @item
209 @option{--with-ftd2xx-win32-zipdir=PATH} - If using FTDICHIP.COM ft2232c, point at the directory where the Win32 FTDICHIP.COM 'CDM' driver zip file was unpacked.
210 @item
211 @option{--with-ftd2xx-linux-tardir=PATH} - Linux only equal of @option{--with-ftd2xx-win32-zipdir}, where you unpacked the TAR.GZ file.
212 @item
213 @option{--with-ftd2xx-lib=shared|static} - Linux only. Default: static, specifies how the FTDICHIP.COM libftd2xx driver should be linked. Note 'static' only works in conjunction with @option{--with-ftd2xx-linux-tardir}. Shared is supported (12/26/2008), however you must manually install the required header files and shared libraries in an appropriate place. This uses ``libusb'' internally.
214 @item
215 @option{--enable-gw16012}
216 @item
217 @option{--enable-usbprog}
218 @item
219 @option{--enable-presto_libftdi}
220 @item
221 @option{--enable-presto_ftd2xx}
222 @item
223 @option{--enable-jlink} - From SEGGER
224 @item
225 @option{--enable-vsllink}
226 @item
227 @option{--enable-rlink} - dongle.
228 @end itemize
230 @section Parallel Port Dongles
232 If you want to access the parallel port using the PPDEV interface you have to specify
233 both the @option{--enable-parport} AND the @option{--enable-parport_ppdev} option since
234 the @option{--enable-parport_ppdev} option actually is an option to the parport driver
235 (see @uref{} for more info).
237 @section FT2232C Based USB Dongles
239 There are 2 methods of using the FTD2232, either (1) using the
240 FTDICHIP.COM closed source driver, or (2) the open (and free) driver
241 libftdi. Some claim the (closed) FTDICHIP.COM solution is faster.
243 The FTDICHIP drivers come as either a (win32) ZIP file, or a (linux)
244 TAR.GZ file. You must unpack them ``some where'' convient. As of this
245 writing (12/26/2008) FTDICHIP does not supply means to install these
246 files ``in an appropriate place'' As a result, there are two
247 ``./configure'' options that help.
249 Below is an example build process:
251 1) Check out the latest version of ``openocd'' from SVN.
253 2) Download & Unpack either the Windows or Linux FTD2xx Drivers
254 (@uref{})
256 @example
257 /home/duane/ftd2xx.win32 => the Cygwin/Win32 ZIP file contents.
258 /home/duane/libftd2xx0.4.16 => the Linux TAR file contents.
259 @end example
261 3) Configure with these options:
263 @example
264 Cygwin FTCICHIP solution
265 ./configure --prefix=/home/duane/mytools \
266 --enable-ft2232_ftd2xx \
267 --with-ftd2xx-win32-zipdir=/home/duane/ftd2xx.win32
269 Linux FTDICHIP solution
270 ./configure --prefix=/home/duane/mytools \
271 --enable-ft2232_ftd2xx \
272 --with-ft2xx-linux-tardir=/home/duane/libftd2xx0.4.16
274 Cygwin/Linux LIBFTDI solution
275 Assumes:
276 1a) For Windows: The windows port of LIBUSB is in place.
277 1b) For Linux: libusb has been built and is inplace.
279 2) And libftdi has been built and installed
280 Note: libftdi - relies upon libusb.
282 ./configure --prefix=/home/duane/mytools \
283 --enable-ft2232_libftdi
285 @end example
287 4) Then just type ``make'', and perhaps ``make install''.
290 @section Miscellaneous configure options
292 @itemize @bullet
293 @item
294 @option{--enable-gccwarnings} - enable extra gcc warnings during build
295 @end itemize
297 @node JTAG Hardware Dongles
298 @chapter JTAG Hardware Dongles
299 @cindex dongles
300 @cindex ftdi
301 @cindex wiggler
302 @cindex zy1000
303 @cindex printer port
304 @cindex usb adapter
305 @cindex rtck
307 Defined: @b{dongle}: A small device that plugins into a computer and serves as
308 an adapter .... [snip]
310 In the OpenOCD case, this generally refers to @b{a small adapater} one
311 attaches to your computer via USB or the Parallel Printer Port. The
312 execption being the Zylin ZY1000 which is a small box you attach via
313 an ethernet cable.
316 @section Choosing a Dongle
318 There are three things you should keep in mind when choosing a dongle.
320 @enumerate
321 @item @b{Voltage} What voltage is your target? 1.8, 2.8, 3.3, or 5V? Does your dongle support it?
322 @item @b{Connection} Printer Ports - Does your computer have one?
323 @item @b{Connection} Is that long printer bit-bang cable practical?
324 @item @b{RTCK} Do you require RTCK? Also known as ``adaptive clocking''
325 @end enumerate
327 @section Stand alone Systems
329 @b{ZY1000} See: @url{} Technically, not a
330 dongle, but a standalone box.
332 @section USB FT2232 Based
334 There are many USB jtag dongles on the market, many of them are based
335 on a chip from ``Future Technology Devices International'' (FTDI)
336 known as the FTDI FT2232.
338 See: @url{} or @url{}
340 As of 28/Nov/2008, the following are supported:
342 @itemize @bullet
343 @item @b{usbjtag}
344 @* Link @url{}
345 @item @b{jtagkey}
346 @* See: @url{}
347 @item @b{oocdlink}
348 @* See: @url{} By Joern Kaipf
349 @item @b{signalyzer}
350 @* See: @url{}
351 @item @b{evb_lm3s811}
352 @* See: @url{} - The Luminary Micro Stellaris LM3S811 eval board has an FTD2232C chip built in.
353 @item @b{olimex-jtag}
354 @* See: @url{}
355 @item @b{flyswatter}
356 @* See: @url{}
357 @item @b{turtelizer2}
358 @* See: @url{}, or @url{}
359 @item @b{comstick}
360 @* Link: @url{}
361 @item @b{stm32stick}
362 @* Link @url{}
363 @item @b{axm0432_jtag}
364 @* Axiom AXM-0432 Link @url{}
365 @end itemize
367 @section USB JLINK based
368 There are several OEM versions of the Segger @b{JLINK} adapter. It is
369 an example of a micro controller based JTAG adapter, it uses an
370 AT91SAM764 internally.
372 @itemize @bullet
373 @item @b{ATMEL SAMICE} Only works with ATMEL chips!
374 @* Link: @url{}
375 @item @b{SEGGER JLINK}
376 @* Link: @url{}
377 @item @b{IAR J-Link}
378 @* Link: @url{}
379 @end itemize
381 @section USB RLINK based
382 Raisonance has an adapter called @b{RLink}. It exists in a stripped-down form on the STM32 Primer, permanently attached to the JTAG lines. It also exists on the STM32 Primer2, but that is wired for SWD and not JTAG, thus not supported.
384 @itemize @bullet
385 @item @b{Raisonance RLink}
386 @* Link: @url{}
387 @item @b{STM32 Primer}
388 @* Link: @url{}
389 @item @b{STM32 Primer2}
390 @* Link: @url{}
391 @end itemize
393 @section USB Other
394 @itemize @bullet
395 @item @b{USBprog}
396 @* Link: @url{} - which uses an Atmel MEGA32 and a UBN9604
398 @item @b{USB - Presto}
399 @* Link: @url{}
401 @item @b{Versaloon-Link}
402 @* Link: @url{}
403 @end itemize
405 @section IBM PC Parallel Printer Port Based
407 The two well known ``JTAG Parallel Ports'' cables are the Xilnx DLC5
408 and the MacGraigor Wiggler. There are many clones and variations of
409 these on the market.
411 @itemize @bullet
413 @item @b{Wiggler} - There are many clones of this.
414 @* Link: @url{}
416 @item @b{DLC5} - From XILINX - There are many clones of this
417 @* Link: Search the web for: ``XILINX DLC5'' - it is no longer
418 produced, PDF schematics are easily found and it is easy to make.
420 @item @b{Amontec - JTAG Accelerator}
421 @* Link: @url{}
423 @item @b{GW16402}
424 @* Link: @url{}
426 @item @b{Wiggler2}
427 @* Link: @url{}
429 @item @b{Wiggler_ntrst_inverted}
430 @* Yet another variation - See the source code, src/jtag/parport.c
432 @item @b{old_amt_wiggler}
433 @* Unknown - probably not on the market today
435 @item @b{arm-jtag}
436 @* Link: Most likely @url{} [another wiggler clone]
438 @item @b{chameleon}
439 @* Link: @url{}
441 @item @b{Triton}
442 @* Unknown.
444 @item @b{Lattice}
445 @* ispDownload from Lattice Semiconductor @url{}
447 @item @b{flashlink}
448 @* From ST Microsystems, link:
449 @url{}
450 Title: FlashLINK JTAG programing cable for PSD and uPSD
452 @end itemize
454 @section Other...
455 @itemize @bullet
457 @item @b{ep93xx}
458 @* An EP93xx based linux machine using the GPIO pins directly.
460 @item @b{at91rm9200}
461 @* Like the EP93xx - but an ATMEL AT91RM9200 based solution using the GPIO pins on the chip.
463 @end itemize
465 @node Running
466 @chapter Running
467 @cindex running OpenOCD
468 @cindex --configfile
469 @cindex --debug_level
470 @cindex --logfile
471 @cindex --search
473 The @option{--help} option shows:
474 @verbatim
475 bash$ openocd --help
477 --help | -h display this help
478 --version | -v display OpenOCD version
479 --file | -f use configuration file <name>
480 --search | -s dir to search for config files and scripts
481 --debug | -d set debug level <0-3>
482 --log_output | -l redirect log output to file <name>
483 --command | -c run <command>
484 --pipe | -p use pipes when talking to gdb
485 @end verbatim
487 By default OpenOCD reads the file configuration file ``openocd.cfg''
488 in the current directory. To specify a different (or multiple)
489 configuration file, you can use the ``-f'' option. For example:
491 @example
492 openocd -f config1.cfg -f config2.cfg -f config3.cfg
493 @end example
495 Once started, OpenOCD runs as a daemon, waiting for connections from
496 clients (Telnet, GDB, Other).
498 If you are having problems, you can enable internal debug messages via
499 the ``-d'' option.
501 Also it is possible to interleave commands w/config scripts using the
502 @option{-c} command line switch.
504 To enable debug output (when reporting problems or working on OpenOCD
505 itself), use the @option{-d} command line switch. This sets the
506 @option{debug_level} to "3", outputting the most information,
507 including debug messages. The default setting is "2", outputting only
508 informational messages, warnings and errors. You can also change this
509 setting from within a telnet or gdb session using @option{debug_level
510 <n>} @xref{debug_level}.
512 You can redirect all output from the daemon to a file using the
513 @option{-l <logfile>} switch.
515 Search paths for config/script files can be added to OpenOCD by using
516 the @option{-s <search>} switch. The current directory and the OpenOCD
517 target library is in the search path by default.
519 For details on the @option{-p} option. @xref{Connecting to GDB}.
520 Option @option{-p} is not currently supported under native win32.
522 Note! OpenOCD will launch the GDB & telnet server even if it can not
523 establish a connection with the target. In general, it is possible for
524 the JTAG controller to be unresponsive until the target is set up
525 correctly via e.g. GDB monitor commands in a GDB init script.
527 @node Simple Configuration Files
528 @chapter Simple Configuration Files
529 @cindex configuration
531 @section Outline
532 There are 4 basic ways of ``configurating'' OpenOCD to run, they are:
534 @enumerate
535 @item A small openocd.cfg file which ``sources'' other configuration files
536 @item A monolithic openocd.cfg file
537 @item Many -f filename options on the command line
538 @item Your Mixed Solution
539 @end enumerate
541 @section Small configuration file method
543 This is the prefered method, it is simple and is works well for many
544 people. The developers of OpenOCD would encourage you to use this
545 method. If you create a new configuration please email new
546 configurations to the development list.
548 Here is an example of an openocd.cfg file for an ATMEL at91sam7x256
550 @example
551 source [find interface/signalyzer.cfg]
553 # Change the default telnet port...
554 telnet_port 4444
555 # GDB connects here
556 gdb_port 3333
557 # GDB can also flash my flash!
558 gdb_memory_map enable
559 gdb_flash_program enable
561 source [find target/sam7x256.cfg]
562 @end example
564 There are many example configuration scripts you can work with. You
565 should look in the directory: @t{$(INSTALLDIR)/lib/openocd}. You
566 should find:
568 @enumerate
569 @item @b{board} - eval board level configurations
570 @item @b{interface} - specific dongle configurations
571 @item @b{target} - the target chips
572 @item @b{tcl} - helper scripts
573 @item @b{xscale} - things specific to the xscale.
574 @end enumerate
576 Look first in the ``boards'' area, then the ``targets'' area. Often a board
577 configuration is a good example to work from.
579 @section Many -f filename options
580 Some believe this is a wonderful solution, others find it painful.
582 You can use a series of ``-f filename'' options on the command line,
583 OpenOCD will read each filename in sequence, for example:
585 @example
586 openocd -f file1.cfg -f file2.cfg -f file2.cfg
587 @end example
589 You can also intermix various commands with the ``-c'' command line
590 option.
592 @section Monolithic file
593 The ``Monolithic File'' dispenses with all ``source'' statements and
594 puts everything in one self contained (monolithic) file. This is not
595 encouraged.
597 Please try to ``source'' various files or use the multiple -f
598 technique.
600 @section Advice for you
601 Often, one uses a ``mixed approach''. Where possible, please try to
602 ``source'' common things, and if needed cut/paste parts of the
603 standard distribution configuration files as needed.
605 @b{REMEMBER:} The ``important parts'' of your configuration file are:
607 @enumerate
608 @item @b{Interface} - Defines the dongle
609 @item @b{Taps} - Defines the JTAG Taps
610 @item @b{GDB Targets} - What GDB talks to
611 @item @b{Flash Programing} - Very Helpful
612 @end enumerate
614 Some key things you should look at and understand are:
616 @enumerate
617 @item The RESET configuration of your debug environment as a hole
618 @item Is there a ``work area'' that OpenOCD can use?
619 @* For ARM - work areas mean up to 10x faster downloads.
620 @item For MMU/MPU based ARM chips (ie: ARM9 and later) will that work area still be available?
621 @item For complex targets (multiple chips) the JTAG SPEED becomes an issue.
622 @end enumerate
626 @node Config File Guidelines
627 @chapter Config File Guidelines
629 This section/chapter is aimed at developers and integrators of
630 OpenOCD. These are guidelines for creating new boards and new target
631 configurations as of 28/Nov/2008.
633 However, you the user of OpenOCD should be some what familiar with
634 this section as it should help explain some of the internals of what
635 you might be looking at.
637 The user should find under @t{$(INSTALLDIR)/lib/openocd} the
638 following directories:
640 @itemize @bullet
641 @item @b{interface}
642 @*Think JTAG Dongle. Files that configure the jtag dongle go here.
643 @item @b{board}
644 @* Thing Circuit Board, PWA, PCB, they go by many names. Board files
645 contain initialization items that are specific to a board - for
646 example: The SDRAM initialization sequence for the board, or the type
647 of external flash and what address it is found at. Any initialization
648 sequence to enable that external flash or sdram should be found in the
649 board file. Boards may also contain multiple targets, ie: Two cpus, or
650 a CPU and an FPGA or CPLD.
651 @item @b{target}
652 @* Think CHIP. The ``target'' directory represents a jtag tap (or
653 chip) OpenOCD should control, not a board. Two common types of targets
654 are ARM chips and FPGA or CPLD chips.
655 @end itemize
657 @b{If needed...} The user in their ``openocd.cfg'' file or the board
658 file might override a specific feature in any of the above files by
659 setting a variable or two before sourcing the target file. Or adding
660 various commands specific to their situation.
662 @section Interface Config Files
664 The user should be able to source one of these files via a command like this:
666 @example
667 source [find interface/FOOBAR.cfg]
668 Or:
669 openocd -f interface/FOOBAR.cfg
670 @end example
672 A preconfigured interface file should exist for every interface in use
673 today, that said, perhaps some interfaces have only been used by the
674 sole developer who created it.
676 @b{FIXME/NOTE:} We need to add support for a variable like TCL variable
677 tcl_platform(platform), it should be called jim_platform (because it
678 is jim, not real tcl) and it should contain 1 of 3 words: ``linux'',
679 ``cygwin'' or ``mingw''
681 Interface files should be found in @t{$(INSTALLDIR)/lib/openocd/interface}
683 @section Board Config Files
685 @b{Note: BOARD directory NEW as of 28/nov/2008}
687 The user should be able to source one of these files via a command like this:
689 @example
690 source [find board/FOOBAR.cfg]
691 Or:
692 openocd -f board/FOOBAR.cfg
693 @end example
696 The board file should contain one or more @t{source [find
697 target/FOO.cfg]} statements along with any board specific things.
699 In summery the board files should contain (if present)
701 @enumerate
702 @item External flash configuration (ie: the flash on CS0)
703 @item SDRAM configuration (size, speed, etc)
704 @item Board specific IO configuration (ie: GPIO pins might disable a 2nd flash)
705 @item Multiple TARGET source statements
706 @item All things that are not ``inside a chip''
707 @item Things inside a chip go in a 'target' file
708 @end enumerate
710 @section Target Config Files
712 The user should be able to source one of these files via a command like this:
714 @example
715 source [find target/FOOBAR.cfg]
716 Or:
717 openocd -f target/FOOBAR.cfg
718 @end example
720 In summery the target files should contain
722 @enumerate
723 @item Set Defaults
724 @item Create Taps
725 @item Reset Configuration
726 @item Work Areas
727 @item CPU/Chip/CPU-Core Specific features
728 @item OnChip Flash
729 @end enumerate
731 @subsection Important variable names
733 By default, the end user should never need to set these
734 variables. However, if the user needs to override a setting they only
735 need to set the variable in a simple way.
737 @itemize @bullet
738 @item @b{CHIPNAME}
739 @* This gives a name to the overall chip, and is used as part of the
740 tap identifier dotted name.
741 @item @b{ENDIAN}
742 @* By default little - unless the chip or board is not normally used that way.
743 @item @b{CPUTAPID}
744 @* When OpenOCD examines the JTAG chain, it will attempt to identify
745 every chip. If the @t{-expected-id} is nonzero, OpenOCD attempts
746 to verify the tap id number verses configuration file and may issue an
747 error or warning like this. The hope is this will help pin point
748 problem OpenOCD configurations.
750 @example
751 Info: JTAG tap: sam7x256.cpu tap/device found: 0x3f0f0f0f (Manufacturer: 0x787, Part: 0xf0f0, Version: 0x3)
752 Error: ERROR: Tap: sam7x256.cpu - Expected id: 0x12345678, Got: 0x3f0f0f0f
753 Error: ERROR: expected: mfg: 0x33c, part: 0x2345, ver: 0x1
754 Error: ERROR: got: mfg: 0x787, part: 0xf0f0, ver: 0x3
755 @end example
757 @item @b{_TARGETNAME}
758 @* By convention, this variable is created by the target configuration
759 script. The board configuration file may make use of this variable to
760 configure things like a ``reset init'' script, or other things
761 specific to that board and that target.
763 If the chip has 2 targets, use the names @b{_TARGETNAME0},
764 @b{_TARGETNAME1}, ... etc.
766 @b{Remember:} The ``board file'' may include multiple targets.
768 At no time should the name ``target0'' (the default target name if
769 none was specified) be used. The name ``target0'' is a hard coded name
770 - the next target on the board will be some other number.
772 The user (or board file) should reasonably be able to:
774 @example
775 source [find target/FOO.cfg]
776 $_TARGETNAME configure ... FOO specific parameters
778 source [find target/BAR.cfg]
779 $_TARGETNAME configure ... BAR specific parameters
780 @end example
782 @end itemize
784 @subsection TCL Variables Guide Line
785 The Full Tcl/Tk language supports ``namespaces'' - JIM-Tcl does not.
787 Thus the rule we follow in OpenOCD is this: Variables that begin with
788 a leading underscore are temporal in nature, and can be modified and
789 used at will within a ?TARGET? configuration file
791 @b{EXAMPLE:} The user should be able to do this:
793 @example
794 # Board has 3 chips,
795 # PXA270 #1 network side, big endian
796 # PXA270 #2 video side, little endian
797 # Xilinx Glue logic
798 set CHIPNAME network
799 set ENDIAN big
800 source [find target/pxa270.cfg]
801 # variable: _TARGETNAME = network.cpu
802 # other commands can refer to the "network.cpu" tap.
803 $_TARGETNAME configure .... params for this cpu..
805 set ENDIAN little
806 set CHIPNAME video
807 source [find target/pxa270.cfg]
808 # variable: _TARGETNAME = video.cpu
809 # other commands can refer to the "video.cpu" tap.
810 $_TARGETNAME configure .... params for this cpu..
812 unset ENDIAN
813 set CHIPNAME xilinx
814 source [find target/spartan3.cfg]
816 # Since $_TARGETNAME is temporal..
817 # these names still work!
818 network.cpu configure ... params
819 video.cpu configure ... params
821 @end example
823 @subsection Default Value Boiler Plate Code
825 All target configuration files should start with this (or a modified form)
827 @example
828 # SIMPLE example
829 if @{ [info exists CHIPNAME] @} @{
831 @} else @{
832 set _CHIPNAME sam7x256
833 @}
835 if @{ [info exists ENDIAN] @} @{
837 @} else @{
838 set _ENDIAN little
839 @}
841 if @{ [info exists CPUTAPID ] @} @{
843 @} else @{
844 set _CPUTAPID 0x3f0f0f0f
845 @}
847 @end example
849 @subsection Creating Taps
850 After the ``defaults'' are choosen, [see above], the taps are created.
852 @b{SIMPLE example:} such as an Atmel AT91SAM7X256
854 @example
855 # for an ARM7TDMI.
856 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
857 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
858 @end example
860 @b{COMPLEX example:}
862 This is an SNIP/example for an STR912 - which has 3 internal taps. Key features shown:
864 @enumerate
865 @item @b{Unform tap names} - See: Tap Naming Convention
866 @item @b{_TARGETNAME} is created at the end where used.
867 @end enumerate
869 @example
870 if @{ [info exists FLASHTAPID ] @} @{
872 @} else @{
873 set _FLASHTAPID 0x25966041
874 @}
875 jtag newtap $_CHIPNAME flash -irlen 8 -ircapture 0x1 -irmask 0x1 -expected-id $_FLASHTAPID
877 if @{ [info exists CPUTAPID ] @} @{
879 @} else @{
880 set _CPUTAPID 0x25966041
881 @}
882 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0xf -irmask 0xe -expected-id $_CPUTAPID
885 if @{ [info exists BSTAPID ] @} @{
887 @} else @{
888 set _BSTAPID 0x1457f041
889 @}
890 jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID
892 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
893 @end example
895 @b{Tap Naming Convention}
897 See the command ``jtag newtap'' for detail, but in breif the names you should use are:
899 @itemize @bullet
900 @item @b{tap}
901 @item @b{cpu}
902 @item @b{flash}
903 @item @b{bs}
904 @item @b{jrc}
905 @item @b{unknownN} - it happens :-(
906 @end itemize
908 @subsection Reset Configuration
910 Some chips have specific ways the TRST and SRST signals are
911 managed. If these are @b{CHIP SPECIFIC} they go here, if they are
912 @b{BOARD SPECIFIC} they go in the board file.
914 @subsection Work Areas
916 Work areas are small RAM areas used by OpenOCD to speed up downloads,
917 and to download small snippits of code to program flash chips.
919 If the chip includes an form of ``on-chip-ram'' - and many do - define
920 a reasonable work area and use the ``backup'' option.
922 @b{PROBLEMS:} On more complex chips, this ``work area'' may become
923 inaccessable if/when the application code enables or disables the MMU.
925 @subsection ARM Core Specific Hacks
927 If the chip has a DCC, enable it. If the chip is an arm9 with some
928 special high speed download - enable it.
930 If the chip has an ARM ``vector catch'' feature - by defeault enable
931 it for Undefined Instructions, Data Abort, and Prefetch Abort, if the
932 user is really writing a handler for those situations - they can
933 easily disable it. Experiance has shown the ``vector catch'' is
934 helpful - for common programing errors.
936 If present, the MMU, the MPU and the CACHE should be disabled.
938 @subsection Internal Flash Configuration
940 This applies @b{ONLY TO MICROCONTROLLERS} that have flash built in.
942 @b{Never ever} in the ``target configuration file'' define any type of
943 flash that is external to the chip. (For example the BOOT flash on
944 Chip Select 0). The BOOT flash information goes in a board file - not
945 the TARGET (chip) file.
947 Examples:
948 @itemize @bullet
949 @item at91sam7x256 - has 256K flash YES enable it.
950 @item str912 - has flash internal YES enable it.
951 @item imx27 - uses boot flash on CS0 - it goes in the board file.
952 @item pxa270 - again - CS0 flash - it goes in the board file.
953 @end itemize
955 @node About JIM-Tcl
956 @chapter About JIM-Tcl
957 @cindex JIM Tcl
958 @cindex tcl
960 OpenOCD includes a small ``TCL Interpreter'' known as JIM-TCL. You can
961 learn more about JIM here: @url{}
963 @itemize @bullet
964 @item @b{JIM vrs TCL}
965 @* JIM-TCL is a stripped down version of the well known Tcl language,
966 which can be found here: @url{}. JIM-Tcl has far
967 fewer features. JIM-Tcl is a single .C file and a single .H file and
968 impliments the basic TCL command set along. In contrast: Tcl 8.6 is a
969 4.2MEG zip file containing 1540 files.
971 @item @b{Missing Features}
972 @* Our practice has been: Add/clone the Real TCL feature if/when
973 needed. We welcome JIM Tcl improvements, not bloat.
975 @item @b{Scripts}
976 @* OpenOCD configuration scripts are JIM Tcl Scripts. OpenOCD's
977 command interpretor today (28/nov/2008) is a mixture of (newer)
978 JIM-Tcl commands, and (older) the orginal command interpretor.
980 @item @b{Commands}
981 @* At the OpenOCD telnet command line (or via the GDB mon command) one
982 can type a Tcl for() loop, set variables, etc.
984 @item @b{Historical Note}
985 @* JIM-Tcl was introduced to OpenOCD in Spring 2008.
987 @item @b{Need a Crash Course In TCL?}
988 @* See: @xref{TCL Crash Course}.
989 @end itemize
992 @node Daemon Configuration
993 @chapter Daemon Configuration
994 The commands here are commonly found in the openocd.cfg file and are
995 used to specify what TCP/IP ports are used, and how GDB should be
996 supported.
997 @section init
998 @cindex init
999 This command terminates the configuration stage and
1000 enters the normal command mode. This can be useful to add commands to
1001 the startup scripts and commands such as resetting the target,
1002 programming flash, etc. To reset the CPU upon startup, add "init" and
1003 "reset" at the end of the config script or at the end of the OpenOCD
1004 command line using the @option{-c} command line switch.
1006 If this command does not appear in any startup/configuration file
1007 OpenOCD executes the command for you after processing all
1008 configuration files and/or command line options.
1010 @b{NOTE:} This command normally occurs at or near the end of your
1011 openocd.cfg file to force OpenOCD to ``initialize'' and make the
1012 targets ready. For example: If your openocd.cfg file needs to
1013 read/write memory on your target - the init command must occur before
1014 the memory read/write commands.
1016 @section TCP/IP Ports
1017 @itemize @bullet
1018 @item @b{telnet_port} <@var{number}>
1019 @cindex telnet_port
1020 @*Intended for a human. Port on which to listen for incoming telnet connections.
1022 @item @b{tcl_port} <@var{number}>
1023 @cindex tcl_port
1024 @*Intended as a machine interface. Port on which to listen for
1025 incoming TCL syntax. This port is intended as a simplified RPC
1026 connection that can be used by clients to issue commands and get the
1027 output from the TCL engine.
1029 @item @b{gdb_port} <@var{number}>
1030 @cindex gdb_port
1031 @*First port on which to listen for incoming GDB connections. The GDB port for the
1032 first target will be gdb_port, the second target will listen on gdb_port + 1, and so on.
1033 @end itemize
1035 @section GDB Items
1036 @itemize @bullet
1037 @item @b{gdb_breakpoint_override} <@var{hard|soft|disabled}>
1038 @cindex gdb_breakpoint_override
1039 @anchor{gdb_breakpoint_override}
1040 @*Force breakpoint type for gdb 'break' commands.
1041 The raison d'etre for this option is to support GDB GUI's without
1042 a hard/soft breakpoint concept where the default OpenOCD and
1043 GDB behaviour is not sufficient. Note that GDB will use hardware
1044 breakpoints if the memory map has been set up for flash regions.
1046 This option replaces older arm7_9 target commands that addressed
1047 the same issue.
1049 @item @b{gdb_detach} <@var{resume|reset|halt|nothing}>
1050 @cindex gdb_detach
1051 @*Configures what OpenOCD will do when gdb detaches from the daeman.
1052 Default behaviour is <@var{resume}>
1054 @item @b{gdb_memory_map} <@var{enable|disable}>
1055 @cindex gdb_memory_map
1056 @*Set to <@var{enable}> to cause OpenOCD to send the memory configuration to gdb when
1057 requested. gdb will then know when to set hardware breakpoints, and program flash
1058 using the gdb load command. @option{gdb_flash_program enable} will also need enabling
1059 for flash programming to work.
1060 Default behaviour is <@var{enable}>
1061 @xref{gdb_flash_program}.
1063 @item @b{gdb_flash_program} <@var{enable|disable}>
1064 @cindex gdb_flash_program
1065 @anchor{gdb_flash_program}
1066 @*Set to <@var{enable}> to cause OpenOCD to program the flash memory when a
1067 vFlash packet is received.
1068 Default behaviour is <@var{enable}>
1069 @comment END GDB Items
1070 @end itemize
1072 @node Interface - Dongle Configuration
1073 @chapter Interface - Dongle Configuration
1074 Interface commands are normally found in an interface configuration
1075 file which is sourced by your openocd.cfg file. These commands tell
1076 OpenOCD what type of JTAG dongle you have and how to talk to it.
1077 @section Simple Complete Interface Examples
1078 @b{A Turtelizer FT2232 Based JTAG Dongle}
1079 @verbatim
1080 #interface
1081 interface ft2232
1082 ft2232_device_desc "Turtelizer JTAG/RS232 Adapter A"
1083 ft2232_layout turtelizer2
1084 ft2232_vid_pid 0x0403 0xbdc8
1085 @end verbatim
1086 @b{A SEGGER Jlink}
1087 @verbatim
1088 # jlink interface
1089 interface jlink
1090 @end verbatim
1091 @b{A Raisonance RLink}
1092 @verbatim
1093 # rlink interface
1094 interface rlink
1095 @end verbatim
1096 @b{Parallel Port}
1097 @verbatim
1098 interface parport
1099 parport_port 0xc8b8
1100 parport_cable wiggler
1101 jtag_speed 0
1102 @end verbatim
1103 @section Interface Conmmand
1105 The interface command tells OpenOCD what type of jtag dongle you are
1106 using. Depending upon the type of dongle, you may need to have one or
1107 more additional commands.
1109 @itemize @bullet
1111 @item @b{interface} <@var{name}>
1112 @cindex interface
1113 @*Use the interface driver <@var{name}> to connect to the
1114 target. Currently supported interfaces are
1116 @itemize @minus
1118 @item @b{parport}
1119 @* PC parallel port bit-banging (Wigglers, PLD download cable, ...)
1121 @item @b{amt_jtagaccel}
1122 @* Amontec Chameleon in its JTAG Accelerator configuration connected to a PC's EPP
1123 mode parallel port
1125 @item @b{ft2232}
1126 @* FTDI FT2232 (USB) based devices using either the open-source libftdi or the binary only
1127 FTD2XX driver. The FTD2XX is superior in performance, but not available on every
1128 platform. The libftdi uses libusb, and should be portable to all systems that provide
1129 libusb.
1131 @item @b{ep93xx}
1132 @*Cirrus Logic EP93xx based single-board computer bit-banging (in development)
1134 @item @b{presto}
1135 @* ASIX PRESTO USB JTAG programmer.
1137 @item @b{usbprog}
1138 @* usbprog is a freely programmable USB adapter.
1140 @item @b{gw16012}
1141 @* Gateworks GW16012 JTAG programmer.
1143 @item @b{jlink}
1144 @* Segger jlink usb adapter
1146 @item @b{rlink}
1147 @* Raisonance RLink usb adapter
1149 @item @b{vsllink}
1150 @* vsllink is part of Versaloon which is a versatile USB programmer.
1151 @comment - End parameters
1152 @end itemize
1153 @comment - End Interface
1154 @end itemize
1155 @subsection parport options
1157 @itemize @bullet
1158 @item @b{parport_port} <@var{number}>
1159 @cindex parport_port
1160 @*Either the address of the I/O port (default: 0x378 for LPT1) or the number of
1161 the @file{/dev/parport} device
1163 When using PPDEV to access the parallel port, use the number of the parallel port:
1164 @option{parport_port 0} (the default). If @option{parport_port 0x378} is specified
1165 you may encounter a problem.
1166 @item @b{parport_cable} <@var{name}>
1167 @cindex parport_cable
1168 @*The layout of the parallel port cable used to connect to the target.
1169 Currently supported cables are
1170 @itemize @minus
1171 @item @b{wiggler}
1172 @cindex wiggler
1173 The original Wiggler layout, also supported by several clones, such
1174 as the Olimex ARM-JTAG
1175 @item @b{wiggler2}
1176 @cindex wiggler2
1177 Same as original wiggler except an led is fitted on D5.
1178 @item @b{wiggler_ntrst_inverted}
1179 @cindex wiggler_ntrst_inverted
1180 Same as original wiggler except TRST is inverted.
1181 @item @b{old_amt_wiggler}
1182 @cindex old_amt_wiggler
1183 The Wiggler configuration that comes with Amontec's Chameleon Programmer. The new
1184 version available from the website uses the original Wiggler layout ('@var{wiggler}')
1185 @item @b{chameleon}
1186 @cindex chameleon
1187 The Amontec Chameleon's CPLD when operated in configuration mode. This is only used to
1188 program the Chameleon itself, not a connected target.
1189 @item @b{dlc5}
1190 @cindex dlc5
1191 The Xilinx Parallel cable III.
1192 @item @b{triton}
1193 @cindex triton
1194 The parallel port adapter found on the 'Karo Triton 1 Development Board'.
1195 This is also the layout used by the HollyGates design
1196 (see @uref{}).
1197 @item @b{flashlink}
1198 @cindex flashlink
1199 The ST Parallel cable.
1200 @item @b{arm-jtag}
1201 @cindex arm-jtag
1202 Same as original wiggler except SRST and TRST connections reversed and
1203 TRST is also inverted.
1204 @item @b{altium}
1205 @cindex altium
1206 Altium Universal JTAG cable.
1207 @end itemize
1208 @item @b{parport_write_on_exit} <@var{on}|@var{off}>
1209 @cindex parport_write_on_exit
1210 @*This will configure the parallel driver to write a known value to the parallel
1211 interface on exiting OpenOCD
1212 @end itemize
1214 @subsection amt_jtagaccel options
1215 @itemize @bullet
1216 @item @b{parport_port} <@var{number}>
1217 @cindex parport_port
1218 @*Either the address of the I/O port (default: 0x378 for LPT1) or the number of the
1219 @file{/dev/parport} device
1220 @end itemize
1221 @subsection ft2232 options
1223 @itemize @bullet
1224 @item @b{ft2232_device_desc} <@var{description}>
1225 @cindex ft2232_device_desc
1226 @*The USB device description of the FTDI FT2232 device. If not
1227 specified, the FTDI default value is used. This setting is only valid
1228 if compiled with FTD2XX support.
1230 @b{TODO:} Confirm the following: On windows the name needs to end with
1231 a ``space A''? Or not? It has to do with the FTD2xx driver. When must
1232 this be added and when must it not be added? Why can't the code in the
1233 interface or in OpenOCD automatically add this if needed? -- Duane.
1235 @item @b{ft2232_serial} <@var{serial-number}>
1236 @cindex ft2232_serial
1237 @*The serial number of the FTDI FT2232 device. If not specified, the FTDI default
1238 values are used.
1239 @item @b{ft2232_layout} <@var{name}>
1240 @cindex ft2232_layout
1241 @*The layout of the FT2232 GPIO signals used to control output-enables and reset
1242 signals. Valid layouts are
1243 @itemize @minus
1244 @item @b{usbjtag}
1245 "USBJTAG-1" layout described in the original OpenOCD diploma thesis
1246 @item @b{jtagkey}
1247 Amontec JTAGkey and JTAGkey-tiny
1248 @item @b{signalyzer}
1249 Signalyzer
1250 @item @b{olimex-jtag}
1251 Olimex ARM-USB-OCD
1252 @item @b{m5960}
1253 American Microsystems M5960
1254 @item @b{evb_lm3s811}
1255 Luminary Micro EVB_LM3S811 as a JTAG interface (not onboard processor), no TRST or
1256 SRST signals on external connector
1257 @item @b{comstick}
1258 Hitex STR9 comstick
1259 @item @b{stm32stick}
1260 Hitex STM32 Performance Stick
1261 @item @b{flyswatter}
1262 Tin Can Tools Flyswatter
1263 @item @b{turtelizer2}
1264 egnite Software turtelizer2
1265 @item @b{oocdlink}
1266 OOCDLink
1267 @item @b{axm0432_jtag}
1268 Axiom AXM-0432
1269 @end itemize
1271 @item @b{ft2232_vid_pid} <@var{vid}> <@var{pid}>
1272 @*The vendor ID and product ID of the FTDI FT2232 device. If not specified, the FTDI
1273 default values are used. Multiple <@var{vid}>, <@var{pid}> pairs may be given, eg.
1274 @example
1275 ft2232_vid_pid 0x0403 0xcff8 0x15ba 0x0003
1276 @end example
1277 @item @b{ft2232_latency} <@var{ms}>
1278 @*On some systems using ft2232 based JTAG interfaces the FT_Read function call in
1279 ft2232_read() fails to return the expected number of bytes. This can be caused by
1280 USB communication delays and has proved hard to reproduce and debug. Setting the
1281 FT2232 latency timer to a larger value increases delays for short USB packages but it
1282 also reduces the risk of timeouts before receiving the expected number of bytes.
1283 The OpenOCD default value is 2 and for some systems a value of 10 has proved useful.
1284 @end itemize
1286 @subsection ep93xx options
1287 @cindex ep93xx options
1288 Currently, there are no options available for the ep93xx interface.
1290 @section JTAG Speed
1291 @itemize @bullet
1292 @item @b{jtag_khz} <@var{reset speed kHz}>
1293 @cindex jtag_khz
1295 It is debatable if this command belongs here - or in a board
1296 configuration file. In fact, in some situations the jtag speed is
1297 changed during the target initialization process (ie: (1) slow at
1298 reset, (2) program the cpu clocks, (3) run fast)
1300 Speed 0 (khz) selects RTCK method. A non-zero speed is in KHZ. Hence: 3000 is 3mhz.
1302 Not all interfaces support ``rtck''. If the interface device can not
1303 support the rate asked for, or can not translate from kHz to
1304 jtag_speed, then an error is returned.
1306 Make sure the jtag clock is no more than @math{1/6th × CPU-Clock}. This is
1307 especially true for synthesized cores (-S). Also see RTCK.
1309 @b{NOTE: Script writers} If the target chip requires/uses RTCK -
1310 please use the command: 'jtag_rclk FREQ'. This TCL proc (in
1311 startup.tcl) attempts to enable RTCK, if that fails it falls back to
1312 the specified frequency.
1314 @example
1315 # Fall back to 3mhz if RCLK is not supported
1316 jtag_rclk 3000
1317 @end example
1319 @item @b{DEPRICATED} @b{jtag_speed} - please use jtag_khz above.
1320 @cindex jtag_speed
1321 @*Limit the maximum speed of the JTAG interface. Usually, a value of zero means maximum
1322 speed. The actual effect of this option depends on the JTAG interface used.
1324 The speed used during reset can be adjusted using setting jtag_speed during
1325 pre_reset and post_reset events.
1326 @itemize @minus
1328 @item wiggler: maximum speed / @var{number}
1329 @item ft2232: 6MHz / (@var{number}+1)
1330 @item amt jtagaccel: 8 / 2**@var{number}
1331 @item jlink: maximum speed in kHz (0-12000), 0 will use RTCK
1332 @item rlink: 24MHz / @var{number}, but only for certain values of @var{number}
1333 @comment end speed list.
1334 @end itemize
1336 @comment END command list
1337 @end itemize
1339 @node Reset Configuration
1340 @chapter Reset Configuration
1341 @cindex reset configuration
1343 Every system configuration may require a different reset
1344 configuration. This can also be quite confusing. Please see the
1345 various board files for example.
1347 @section jtag_nsrst_delay <@var{ms}>
1348 @cindex jtag_nsrst_delay
1349 @*How long (in milliseconds) OpenOCD should wait after deasserting
1350 nSRST before starting new JTAG operations.
1352 @section jtag_ntrst_delay <@var{ms}>
1353 @cindex jtag_ntrst_delay
1354 @*Same @b{jtag_nsrst_delay}, but for nTRST
1356 The jtag_n[st]rst_delay options are useful if reset circuitry (like a
1357 big resistor/capacitor, reset supervisor, or on-chip features). This
1358 keeps the signal asserted for some time after the external reset got
1359 deasserted.
1361 @section reset_config
1363 @b{Note:} To maintainer types and integrators. Where exactly the
1364 ``reset configuration'' goes is a good question. It touches several
1365 things at once. In the end, if you have a board file - the board file
1366 should define it and assume 100% that the DONGLE supports
1367 anything. However, that does not mean the target should not also make
1368 not of something the silicon vendor has done inside the
1369 chip. @i{Grr.... nothing is every pretty.}
1371 @* @b{Problems:}
1372 @enumerate
1373 @item Every JTAG Dongle is slightly different, some dongles impliment reset differently.
1374 @item Every board is also slightly different; some boards tie TRST and SRST together.
1375 @item Every chip is slightly different; some chips internally tie the two signals together.
1376 @item Some may not impliment all of the signals the same way.
1377 @item Some signals might be push-pull, others open-drain/collector.
1378 @end enumerate
1379 @b{Best Case:} OpenOCD can hold the SRST (push-button-reset), then
1380 reset the TAP via TRST and send commands through the JTAG tap to halt
1381 the CPU at the reset vector before the 1st instruction is executed,
1382 and finally release the SRST signal.
1383 @*Depending upon your board vendor, your chip vendor, etc, these
1384 signals may have slightly different names.
1386 OpenOCD defines these signals in these terms:
1387 @itemize @bullet
1388 @item @b{TRST} - is Tap Reset - and should reset only the TAP.
1389 @item @b{SRST} - is System Reset - typically equal to a reset push button.
1390 @end itemize
1392 The Command:
1394 @itemize @bullet
1395 @item @b{reset_config} <@var{signals}> [@var{combination}] [@var{trst_type}] [@var{srst_type}]
1396 @cindex reset_config
1397 @* The @t{reset_config} command tells OpenOCD the reset configuration
1398 of your combination of Dongle, Board, and Chips.
1399 If the JTAG interface provides SRST, but the target doesn't connect
1400 that signal properly, then OpenOCD can't use it. <@var{signals}> can
1401 be @option{none}, @option{trst_only}, @option{srst_only} or
1402 @option{trst_and_srst}.
1404 [@var{combination}] is an optional value specifying broken reset
1405 signal implementations. @option{srst_pulls_trst} states that the
1406 testlogic is reset together with the reset of the system (e.g. Philips
1407 LPC2000, "broken" board layout), @option{trst_pulls_srst} says that
1408 the system is reset together with the test logic (only hypothetical, I
1409 haven't seen hardware with such a bug, and can be worked around).
1410 @option{combined} imples both @option{srst_pulls_trst} and
1411 @option{trst_pulls_srst}. The default behaviour if no option given is
1412 @option{separate}.
1414 The [@var{trst_type}] and [@var{srst_type}] parameters allow the
1415 driver type of the reset lines to be specified. Possible values are
1416 @option{trst_push_pull} (default) and @option{trst_open_drain} for the
1417 test reset signal, and @option{srst_open_drain} (default) and
1418 @option{srst_push_pull} for the system reset. These values only affect
1419 JTAG interfaces with support for different drivers, like the Amontec
1420 JTAGkey and JTAGAccelerator.
1422 @comment - end command
1423 @end itemize
1427 @node Tap Creation
1428 @chapter Tap Creation
1429 @cindex tap creation
1430 @cindex tap configuration
1432 In order for OpenOCD to control a target, a JTAG tap must be
1433 defined/created.
1435 Commands to create taps are normally found in a configuration file and
1436 are not normally typed by a human.
1438 When a tap is created a @b{} is created for the tap. Other
1439 commands use that to manipulate or refer to the tap.
1441 Tap Uses:
1442 @itemize @bullet
1443 @item @b{Debug Target} A tap can be used by a GDB debug target
1444 @item @b{Flash Programing} Some chips program the flash via JTAG
1445 @item @b{Boundry Scan} Some chips support boundry scan.
1446 @end itemize
1449 @section jtag newtap
1450 @b{@t{jtag newtap CHIPNAME TAPNAME configparams ....}}
1451 @cindex jtag_device
1452 @cindex jtag newtap
1453 @cindex tap
1454 @cindex tap order
1455 @cindex tap geometry
1457 @comment START options
1458 @itemize @bullet
1459 @item @b{CHIPNAME}
1460 @* is a symbolic name of the chip.
1461 @item @b{TAPNAME}
1462 @* is a symbol name of a tap present on the chip.
1463 @item @b{Required configparams}
1464 @* Every tap has 3 required configparams, and several ``optional
1465 parameters'', the required parameters are:
1466 @comment START REQUIRED
1467 @itemize @bullet
1468 @item @b{-irlen NUMBER} - the length in bits of the instruction register
1469 @item @b{-ircapture NUMBER} - the ID code capture command.
1470 @item @b{-irmask NUMBER} - the corresponding mask for the ir register.
1471 @comment END REQUIRED
1472 @end itemize
1473 An example of a FOOBAR Tap
1474 @example
1475 jtag newtap foobar tap -irlen 7 -ircapture 0x42 -irmask 0x55
1476 @end example
1477 Creates the tap ``foobar.tap'' with the instruction register (IR) is 7
1478 bits long, during Capture-IR 0x42 is loaded into the IR, and bits
1479 [6,4,2,0] are checked.
1481 FIXME: The IDCODE - this was not used in the old code, it should be?
1482 Right? -Duane.
1483 @item @b{Optional configparams}
1484 @comment START Optional
1485 @itemize @bullet
1486 @item @b{-expected-id NUMBER}
1487 @* By default it is zero. If non-zero represents the
1488 expected tap ID used when the Jtag Chain is examined. See below.
1489 @item @b{-disable}
1490 @item @b{-enable}
1491 @* By default not specified the tap is enabled. Some chips have a
1492 jtag route controller (JRC) that is used to enable and/or disable
1493 specific jtag taps. You can later enable or disable any JTAG tap via
1494 the command @b{jtag tapenable DOTTED.NAME} or @b{jtag tapdisable
1496 @comment END Optional
1497 @end itemize
1499 @comment END OPTIONS
1500 @end itemize
1501 @b{Notes:}
1502 @comment START NOTES
1503 @itemize @bullet
1504 @item @b{Technically}
1505 @* newtap is a sub command of the ``jtag'' command
1506 @item @b{Big Picture Background}
1507 @*GDB Talks to OpenOCD using the GDB protocol via
1508 tcpip. OpenOCD then uses the JTAG interface (the dongle) to
1509 control the JTAG chain on your board. Your board has one or more chips
1510 in a @i{daisy chain configuration}. Each chip may have one or more
1511 jtag taps. GDB ends up talking via OpenOCD to one of the taps.
1512 @item @b{NAME Rules}
1513 @*Names follow ``C'' symbol name rules (start with alpha ...)
1514 @item @b{TAPNAME - Conventions}
1515 @itemize @bullet
1516 @item @b{tap} - should be used only FPGA or CPLD like devices with a single tap.
1517 @item @b{cpu} - the main cpu of the chip, alternatively @b{foo.arm} and @b{foo.dsp}
1518 @item @b{flash} - if the chip has a flash tap, example: str912.flash
1519 @item @b{bs} - for boundary scan if this is a seperate tap.
1520 @item @b{jrc} - for jtag route controller (example: OMAP3530 found on Beagleboards)
1521 @item @b{unknownN} - where N is a number if you have no idea what the tap is for
1522 @item @b{Other names} - Freescale IMX31 has a SDMA (smart dma) with a JTAG tap, that tap should be called the ``sdma'' tap.
1523 @item @b{When in doubt} - use the chip makers name in their data sheet.
1524 @end itemize
1525 @item @b{DOTTED.NAME}
1526 @* @b{CHIPNAME}.@b{TAPNAME} creates the tap name, aka: the
1527 @b{Dotted.Name} is the @b{CHIPNAME} and @b{TAPNAME} combined with a
1528 dot (period); for example: @b{xilinx.tap}, @b{str912.flash},
1529 @b{omap3530.jrc}, or @b{stm32.cpu} The @b{} is used in
1530 numerous other places to refer to various taps.
1531 @item @b{ORDER}
1532 @* The order this command appears via the config files is
1533 important.
1534 @item @b{Multi Tap Example}
1535 @* This example is based on the ST Microsystems STR912. See the ST
1536 document titled: @b{STR91xFAxxx, Section 3.15 Jtag Interface, Page:
1537 28/102, Figure 3: Jtag chaining inside the STR91xFA}.
1539 @url{}
1540 @*@b{checked: 28/nov/2008}
1542 The diagram shows the TDO pin connects to the flash tap, flash TDI
1543 connects to the CPU debug tap, CPU TDI connects to the boundary scan
1544 tap which then connects to the TDI pin.
1546 @example
1547 # The order is...
1548 # create tap: 'str912.flash'
1549 jtag newtap str912 flash ... params ...
1550 # create tap: 'str912.cpu'
1551 jtag newtap str912 cpu ... params ...
1552 # create tap: ''
1553 jtag newtap str912 bs ... params ...
1554 @end example
1556 @item @b{Note: Deprecated} - Index Numbers
1557 @* Prior to 28/nov/2008, JTAG taps where numbered from 0..N this
1558 feature is still present, however its use is highly discouraged and
1559 should not be counted upon.
1560 @item @b{Multiple chips}
1561 @* If your board has multiple chips, you should be
1562 able to @b{source} two configuration files, in the proper order, and
1563 have the taps created in the proper order.
1564 @comment END NOTES
1565 @end itemize
1566 @comment at command level
1567 @comment DOCUMENT old command
1568 @section jtag_device - REMOVED
1569 @example
1570 @b{jtag_device} <@var{IR length}> <@var{IR capture}> <@var{IR mask}> <@var{IDCODE instruction}>
1571 @end example
1572 @cindex jtag_device
1574 @* @b{Removed: 28/nov/2008} This command has been removed and replaced
1575 by the ``jtag newtap'' command. The documentation remains here so that
1576 one can easily convert the old syntax to the new syntax. About the old
1577 syntax: The old syntax is positional, ie: The 4th parameter is the
1578 ``irmask''. The new syntax requires named prefixes, and supports
1579 additional options, for example ``-irmask 4''. Please refer to the
1580 @b{jtag newtap} command for details.
1581 @example
1582 OLD: jtag_device 8 0x01 0x0e3 0xfe
1583 NEW: jtag newtap CHIPNAME TAPNAME -irlen 8 -ircapture 0xe3 -irmask 0xfe
1584 @end example
1586 @section Enable/Disable Taps
1587 @b{Note:} These commands are intended to be used as a machine/script
1588 interface. Humans might find the ``scan_chain'' command more helpful
1589 when querying the state of the JTAG taps.
1591 @b{By default, all taps are enabled}
1593 @itemize @bullet
1594 @item @b{jtag tapenable} @var{DOTTED.NAME}
1595 @item @b{jtag tapdisable} @var{DOTTED.NAME}
1596 @item @b{jtag tapisenabled} @var{DOTTED.NAME}
1597 @end itemize
1598 @cindex tap enable
1599 @cindex tap disable
1600 @cindex JRC
1601 @cindex route controller
1603 These commands are used when your target has a JTAG Route controller
1604 that effectively adds or removes a tap from the jtag chain in a
1605 non-standard way.
1607 The ``standard way'' to remove a tap would be to place the tap in
1608 bypass mode. But with the advent of modern chips, this is not always a
1609 good solution. Some taps operate slowly, others operate fast, and
1610 there are other JTAG clock syncronization problems one must face. To
1611 solve that problem, the JTAG Route controller was introduced. Rather
1612 then ``bypass'' the tap, the tap is completely removed from the
1613 circuit and skipped.
1616 From OpenOCD's view point, a JTAG TAP is in one of 3 states:
1618 @itemize @bullet
1619 @item @b{Enabled - Not In ByPass} and has a variable bit length
1620 @item @b{Enabled - In ByPass} and has a length of exactly 1 bit.
1621 @item @b{Disabled} and has a length of ZERO and is removed from the circuit.
1622 @end itemize
1624 The IEEE JTAG definition has no concept of a ``disabled'' tap.
1625 @b{Historical note:} this feature was added 28/nov/2008
1627 @b{jtag tapisenabled DOTTED.NAME}
1629 This command returns 1 if the named tap is currently enabled, 0 if not.
1630 This command exists so that scripts that manipulate a JRC (like the
1631 Omap3530 has) can determine if OpenOCD thinks a tap is presently
1632 enabled, or disabled.
1634 @page
1635 @node Target Configuration
1636 @chapter Target Configuration
1638 This chapter discusses how to create a GDB Debug Target. Before
1639 creating a ``target'' a JTAG Tap DOTTED.NAME must exist first.
1641 @section targets [NAME]
1642 @b{Note:} This command name is PLURAL - not singular.
1644 With NO parameter, this plural @b{targets} command lists all known
1645 targets in a human friendly form.
1647 With a parameter, this pural @b{targets} command sets the current
1648 target to the given name. (ie: If there are multiple debug targets)
1650 Example:
1651 @verbatim
1652 (gdb) mon targets
1653 CmdName Type Endian ChainPos State
1654 -- ---------- ---------- ---------- -------- ----------
1655 0: target0 arm7tdmi little 0 halted
1656 @end verbatim
1658 @section target COMMANDS
1659 @b{Note:} This command name is SINGULAR - not plural. It is used to
1660 manipulate specific targets, to create targets and other things.
1662 Once a target is created, a TARGETNAME (object) command is created;
1663 see below for details.
1665 The TARGET command accepts these sub-commands:
1666 @itemize @bullet
1667 @item @b{create} .. parameters ..
1668 @* creates a new target, See below for details.
1669 @item @b{types}
1670 @* Lists all supported target types (perhaps some are not yet in this document).
1671 @item @b{names}
1672 @* Lists all current debug target names, for example: 'str912.cpu' or 'pxa27.cpu' example usage:
1673 @verbatim
1674 foreach t [target names] {
1675 puts [format "Target: %s\n" $t]
1676 }
1677 @end verbatim
1678 @item @b{current}
1679 @* Returns the current target. OpenOCD always has, or refers to the ``current target'' in some way.
1680 By default, commands like: ``mww'' (used to write memory) operate on the current target.
1681 @item @b{number} @b{NUMBER}
1682 @* Internally OpenOCD maintains a list of targets - in numerical index
1683 (0..N-1) this command returns the name of the target at index N.
1684 Example usage:
1685 @verbatim
1686 set thename [target number $x]
1687 puts [format "Target %d is: %s\n" $x $thename]
1688 @end verbatim
1689 @item @b{count}
1690 @* Returns the number of targets known to OpenOCD (see number above)
1691 Example:
1692 @verbatim
1693 set c [target count]
1694 for { set x 0 } { $x < $c } { incr x } {
1695 # Assuming you have created this function
1696 print_target_details $x
1697 }
1698 @end verbatim
1700 @end itemize
1702 @section TARGETNAME (object) commands
1703 @b{Use:} Once a target is created, an ``object name'' that represents the
1704 target is created. By convention, the target name is identical to the
1705 tap name. In a multiple target system, one can preceed many common
1706 commands with a specific target name and effect only that target.
1707 @example
1708 str912.cpu mww 0x1234 0x42
1709 omap3530.cpu mww 0x5555 123
1710 @end example
1712 @b{Model:} The Tcl/Tk language has the concept of object commands. A
1713 good example is a on screen button, once a button is created a button
1714 has a name (a path in TK terms) and that name is useable as a 1st
1715 class command. For example in TK, one can create a button and later
1716 configure it like this:
1718 @example
1719 # Create
1720 button .foobar -background red -command @{ foo @}
1721 # Modify
1722 .foobar configure -foreground blue
1723 # Query
1724 set x [.foobar cget -background]
1725 # Report
1726 puts [format "The button is %s" $x]
1727 @end example
1729 In OpenOCD's terms, the ``target'' is an object just like a Tcl/Tk
1730 button. Commands avaialble as a ``target object'' are:
1732 @comment START targetobj commands.
1733 @itemize @bullet
1734 @item @b{configure} - configure the target; see Target Config/Cget Options below
1735 @item @b{cget} - query the target configuration; see Target Config/Cget Options below
1736 @item @b{curstate} - current target state (running, halt, etc)
1737 @item @b{eventlist}
1738 @* Intended for a human to see/read the currently configure target events.
1739 @item @b{Various Memory Commands} See the ``mww'' command elsewhere.
1740 @comment start memory
1741 @itemize @bullet
1742 @item @b{mww} ...
1743 @item @b{mwh} ...
1744 @item @b{mwb} ...
1745 @item @b{mdw} ...
1746 @item @b{mdh} ...
1747 @item @b{mdb} ...
1748 @comment end memory
1749 @end itemize
1750 @item @b{Memory To Array, Array To Memory}
1751 @* These are aimed at a machine interface to memory
1752 @itemize @bullet
1753 @item @b{mem2array ARRAYNAME WIDTH ADDRESS COUNT}
1754 @item @b{array2mem ARRAYNAME WIDTH ADDRESS COUNT}
1755 @* Where:
1756 @* @b{ARRAYNAME} is the name of an array variable
1757 @* @b{WIDTH} is 8/16/32 - indicating the memory access size
1758 @* @b{ADDRESS} is the target memory address
1759 @* @b{COUNT} is the number of elements to process
1760 @end itemize
1761 @item @b{Used during ``reset''}
1762 @* These commands are used internally by the OpenOCD scripts to deal
1763 with odd reset situations and are not documented here.
1764 @itemize @bullet
1765 @item @b{arp_examine}
1766 @item @b{arp_poll}
1767 @item @b{arp_reset}
1768 @item @b{arp_halt}
1769 @item @b{arp_waitstate}
1770 @end itemize
1771 @item @b{invoke-event} @b{EVENT-NAME}
1772 @* Invokes the specific event manually for the target
1773 @end itemize
1775 @section Target Events
1776 At various times, certain things can happen, or you want them to happen.
1778 Examples:
1779 @itemize @bullet
1780 @item What should happen when GDB connects? Should your target reset?
1781 @item When GDB tries to flash the target, do you need to enable the flash via a special command?
1782 @item During reset, do you need to write to certain memory location to reconfigure the SDRAM?
1783 @end itemize
1785 All of the above items are handled by target events.
1787 To specify an event action, either during target creation, or later
1788 via ``$_TARGETNAME configure'' see this example.
1790 Syntactially, the option is: ``-event NAME BODY'' where NAME is a
1791 target event name, and BODY is a tcl procedure or string of commands
1792 to execute.
1794 The programmers model is the ``-command'' option used in Tcl/Tk
1795 buttons and events. Below are two identical examples, the first
1796 creates and invokes small procedure. The second inlines the procedure.
1798 @example
1799 proc my_attach_proc @{ @} @{
1800 puts "RESET...."
1801 reset halt
1802 @}
1803 mychip.cpu configure -event gdb-attach my_attach_proc
1804 mychip.cpu configure -event gdb-attach @{ puts "Reset..." ; reset halt @}
1805 @end example
1807 @section Current Events
1808 The following events are available:
1809 @itemize @bullet
1810 @item @b{debug-halted}
1811 @* The target has halted for debug reasons (ie: breakpoint)
1812 @item @b{debug-resumed}
1813 @* The target has resumed (ie: gdb said run)
1814 @item @b{early-halted}
1815 @* Occurs early in the halt process
1816 @item @b{examine-end}
1817 @* Currently not used (goal: when JTAG examine completes)
1818 @item @b{examine-start}
1819 @* Currently not used (goal: when JTAG examine starts)
1820 @item @b{gdb-attach}
1821 @* When GDB connects
1822 @item @b{gdb-detach}
1823 @* When GDB disconnects
1824 @item @b{gdb-end}
1825 @* When the taret has halted and GDB is not doing anything (see early halt)
1826 @item @b{gdb-flash-erase-start}
1827 @* Before the GDB flash process tries to erase the flash
1828 @item @b{gdb-flash-erase-end}
1829 @* After the GDB flash process has finished erasing the flash
1830 @item @b{gdb-flash-write-start}
1831 @* Before GDB writes to the flash
1832 @item @b{gdb-flash-write-end}
1833 @* After GDB writes to the flash
1834 @item @b{gdb-start}
1835 @* Before the taret steps, gdb is trying to start/resume the tarfget
1836 @item @b{halted}
1837 @* The target has halted
1838 @item @b{old-gdb_program_config}
1839 @* DO NOT USE THIS: Used internally
1840 @item @b{old-pre_resume}
1841 @* DO NOT USE THIS: Used internally
1842 @item @b{reset-assert-pre}
1843 @* Before reset is asserted on the tap.
1844 @item @b{reset-assert-post}
1845 @* Reset is now asserted on the tap.
1846 @item @b{reset-deassert-pre}
1847 @* Reset is about to be released on the tap
1848 @item @b{reset-deassert-post}
1849 @* Reset has been released on the tap
1850 @item @b{reset-end}
1851 @* Currently not used.
1852 @item @b{reset-halt-post}
1853 @* Currently not usd
1854 @item @b{reset-halt-pre}
1855 @* Currently not used
1856 @item @b{reset-init}
1857 @* Currently not used
1858 @item @b{reset-start}
1859 @* Currently not used
1860 @item @b{reset-wait-pos}
1861 @* Currently not used
1862 @item @b{reset-wait-pre}
1863 @* Currently not used
1864 @item @b{resume-start}
1865 @* Before any target is resumed
1866 @item @b{resume-end}
1867 @* After all targets have resumed
1868 @item @b{resume-ok}
1869 @* Success
1870 @item @b{resumed}
1871 @* Target has resumed
1872 @item @b{tap-enable}
1873 @* Executed by @b{jtag tapenable DOTTED.NAME} command. Example:
1874 @example
1875 jtag configure DOTTED.NAME -event tap-enable @{
1876 puts "Enabling CPU"
1877 ...
1878 @}
1879 @end example
1880 @item @b{tap-disable}
1881 @*Executed by @b{jtag tapdisable DOTTED.NAME} command. Example:
1882 @example
1883 jtag configure DOTTED.NAME -event tap-disable @{
1884 puts "Disabling CPU"
1885 ...
1886 @}
1887 @end example
1888 @end itemize
1891 @section target create
1892 @cindex target
1893 @cindex target creation
1895 @example
1896 @b{target} @b{create} <@var{NAME}> <@var{TYPE}> <@var{PARAMS ...}>
1897 @end example
1898 @*This command creates a GDB debug target that refers to a specific JTAG tap.
1899 @comment START params
1900 @itemize @bullet
1901 @item @b{NAME}
1902 @* Is the name of the debug target. By convention it should be the tap
1903 DOTTED.NAME, this name is also used to create the target object
1904 command.
1905 @item @b{TYPE}
1906 @* Specifies the target type, ie: arm7tdmi, or cortexM3. Currently supported targes are:
1907 @comment START types
1908 @itemize @minus
1909 @item @b{arm7tdmi}
1910 @item @b{arm720t}
1911 @item @b{arm9tdmi}
1912 @item @b{arm920t}
1913 @item @b{arm922t}
1914 @item @b{arm926ejs}
1915 @item @b{arm966e}
1916 @item @b{cortex_m3}
1917 @item @b{feroceon}
1918 @item @b{xscale}
1919 @item @b{arm11}
1920 @item @b{mips_m4k}
1921 @comment end TYPES
1922 @end itemize
1923 @item @b{PARAMS}
1924 @*PARAMs are various target configure parameters, the following are mandatory
1925 at configuration:
1926 @comment START mandatory
1927 @itemize @bullet
1928 @item @b{-endian big|little}
1929 @item @b{-chain-position DOTTED.NAME}
1930 @comment end MANDATORY
1931 @end itemize
1932 @comment END params
1933 @end itemize
1935 @section Target Config/Cget Options
1936 These options can be specified when the target is created, or later
1937 via the configure option or to query the target via cget.
1938 @itemize @bullet
1939 @item @b{-type} - returns the target type
1940 @item @b{-event NAME BODY} see Target events
1941 @item @b{-work-area-virt [ADDRESS]} specify/set the work area
1942 @item @b{-work-area-phys [ADDRESS]} specify/set the work area
1943 @item @b{-work-area-size [ADDRESS]} specify/set the work area
1944 @item @b{-work-area-backup [0|1]} does the work area get backed up
1945 @item @b{-endian [big|little]}
1946 @item @b{-variant [NAME]} some chips have varients OpenOCD needs to know about
1947 @item @b{-chain-position DOTTED.NAME} the tap name this target refers to.
1948 @end itemize
1949 Example:
1950 @example
1951 for @{ set x 0 @} @{ $x < [target count] @} @{ incr x @} @{
1952 set name [target number $x]
1953 set y [$name cget -endian]
1954 set z [$name cget -type]
1955 puts [format "Chip %d is %s, Endian: %s, type: %s" $x $y $z]
1956 @}
1957 @end example
1959 @section Target Varients
1960 @itemize @bullet
1961 @item @b{arm7tdmi}
1962 @* Unknown (please write me)
1963 @item @b{arm720t}
1964 @* Unknown (please write me) (simular to arm7tdmi)
1965 @item @b{arm9tdmi}
1966 @* Varients: @option{arm920t}, @option{arm922t} and @option{arm940t}
1967 This enables the hardware single-stepping support found on these
1968 cores.
1969 @item @b{arm920t}
1970 @* None.
1971 @item @b{arm966e}
1972 @* None (this is also used as the ARM946)
1973 @item @b{cortex_m3}
1974 @* use variant <@var{-variant lm3s}> when debugging luminary lm3s targets. This will cause
1975 OpenOCD to use a software reset rather than asserting SRST to avoid a issue with clearing
1976 the debug registers. This is fixed in Fury Rev B, DustDevil Rev B, Tempest, these revisions will
1977 be detected and the normal reset behaviour used.
1978 @item @b{xscale}
1979 @* Supported variants are @option{ixp42x}, @option{ixp45x}, @option{ixp46x},@option{pxa250}, @option{pxa255}, @option{pxa26x}.
1980 @item @b{arm11}
1981 @* Supported variants are @option{arm1136}, @option{arm1156}, @option{arm1176}
1982 @item @b{mips_m4k}
1983 @* Use variant @option{ejtag_srst} when debugging targets that do not
1984 provide a functional SRST line on the EJTAG connector. This causes
1985 OpenOCD to instead use an EJTAG software reset command to reset the
1986 processor. You still need to enable @option{srst} on the reset
1987 configuration command to enable OpenOCD hardware reset functionality.
1988 @comment END varients
1989 @end itemize
1990 @section working_area - Command Removed
1991 @cindex working_area
1992 @*@b{Please use the ``$_TARGETNAME configure -work-area-... parameters instead}
1993 @* This documentation remains because there are existing scripts that
1994 still use this that need to be converted.
1995 @example
1996 working_area target# address size backup| [virtualaddress]
1997 @end example
1998 @* The target# is a the 0 based target numerical index.
2000 This command specifies a working area for the debugger to use. This
2001 may be used to speed-up downloads to target memory and flash
2002 operations, or to perform otherwise unavailable operations (some
2003 coprocessor operations on ARM7/9 systems, for example). The last
2004 parameter decides whether the memory should be preserved
2005 (<@var{backup}>) or can simply be overwritten (<@var{nobackup}>). If
2006 possible, use a working_area that doesn't need to be backed up, as
2007 performing a backup slows down operation.
2009 @node Flash Configuration
2010 @chapter Flash Programing
2011 @cindex Flash Configuration
2013 @b{Note:} As of 28/nov/2008 OpenOCD does not know how to program a SPI
2014 flash that a micro may boot from. Perhaps you the reader would like to
2015 contribute support for this.
2017 Flash Steps:
2018 @enumerate
2019 @item Configure via the command @b{flash bank}
2020 @* Normally this is done in a configuration file.
2021 @item Operate on the flash via @b{flash SOMECOMMAND}
2022 @* Often commands to manipulate the flash are typed by a human, or run
2023 via a script in some automated way. For example: To program the boot
2024 flash on your board.
2025 @item GDB Flashing
2026 @* Flashing via GDB requires the flash be configured via ``flash
2027 bank'', and the GDB flash features be enabled. See the Daemon
2028 configuration section for more details.
2029 @end enumerate
2031 @section Flash commands
2032 @cindex Flash commands
2033 @subsection flash banks
2034 @b{flash banks}
2035 @cindex flash banks
2036 @*List configured flash banks
2037 @*@b{NOTE:} the singular form: 'flash bank' is used to configure the flash banks.
2038 @subsection flash info
2039 @b{flash info} <@var{num}>
2040 @cindex flash info
2041 @*Print info about flash bank <@option{num}>
2042 @subsection flash probe
2043 @b{flash probe} <@var{num}>
2044 @cindex flash probe
2045 @*Identify the flash, or validate the parameters of the configured flash. Operation
2046 depends on the flash type.
2047 @subsection flash erase_check
2048 @b{flash erase_check} <@var{num}>
2049 @cindex flash erase_check
2050 @*Check erase state of sectors in flash bank <@var{num}>. This is the only operation that
2051 updates the erase state information displayed by @option{flash info}. That means you have
2052 to issue an @option{erase_check} command after erasing or programming the device to get
2053 updated information.
2054 @subsection flash protect_check
2055 @b{flash protect_check} <@var{num}>
2056 @cindex flash protect_check
2057 @*Check protection state of sectors in flash bank <num>.
2058 @option{flash erase_sector} using the same syntax.
2059 @subsection flash erase_sector
2060 @b{flash erase_sector} <@var{num}> <@var{first}> <@var{last}>
2061 @cindex flash erase_sector
2062 @anchor{flash erase_sector}
2063 @*Erase sectors at bank <@var{num}>, starting at sector <@var{first}> up to and including
2064 <@var{last}>. Sector numbering starts at 0. Depending on the flash type, erasing may
2065 require the protection to be disabled first (e.g. Intel Advanced Bootblock flash using
2066 the CFI driver).
2067 @subsection flash erase_address
2068 @b{flash erase_address} <@var{address}> <@var{length}>
2069 @cindex flash erase_address
2070 @*Erase sectors starting at <@var{address}> for <@var{length}> bytes
2071 @subsection flash write_bank
2072 @b{flash write_bank} <@var{num}> <@var{file}> <@var{offset}>
2073 @cindex flash write_bank
2074 @anchor{flash write_bank}
2075 @*Write the binary <@var{file}> to flash bank <@var{num}>, starting at
2076 <@option{offset}> bytes from the beginning of the bank.
2077 @subsection flash write_image
2078 @b{flash write_image} [@var{erase}] <@var{file}> [@var{offset}] [@var{type}]
2079 @cindex flash write_image
2080 @anchor{flash write_image}
2081 @*Write the image <@var{file}> to the current target's flash bank(s). A relocation
2082 [@var{offset}] can be specified and the file [@var{type}] can be specified
2083 explicitly as @option{bin} (binary), @option{ihex} (Intel hex), @option{elf}
2084 (ELF file) or @option{s19} (Motorola s19). Flash memory will be erased prior to programming
2085 if the @option{erase} parameter is given.
2086 @subsection flash protect
2087 @b{flash protect} <@var{num}> <@var{first}> <@var{last}> <@option{on}|@option{off}>
2088 @cindex flash protect
2089 @*Enable (@var{on}) or disable (@var{off}) protection of flash sectors <@var{first}> to
2090 <@var{last}> of @option{flash bank} <@var{num}>.
2092 @subsection mFlash commands
2093 @cindex mFlash commands
2094 @itemize @bullet
2095 @item @b{mflash probe}
2096 @cindex mflash probe
2097 Probe mflash.
2098 @item @b{mflash write} <@var{num}> <@var{file}> <@var{offset}>
2099 @cindex mflash write
2100 Write the binary <@var{file}> to mflash bank <@var{num}>, starting at
2101 <@var{offset}> bytes from the beginning of the bank.
2102 @item @b{mflash dump} <@var{num}> <@var{file}> <@var{offset}> <@var{size}>
2103 @cindex mflash dump
2104 Dump <size> bytes, starting at <@var{offset}> bytes from the beginning of the <@var{num}> bank
2105 to a <@var{file}>.
2106 @end itemize
2108 @section flash bank command
2109 The @b{flash bank} command is used to configure one or more flash chips (or banks in OpenOCD terms)
2111 @example
2112 @b{flash bank} <@var{driver}> <@var{base}> <@var{size}> <@var{chip_width}>
2113 <@var{bus_width}> <@var{target#}> [@var{driver_options ...}]
2114 @end example
2115 @cindex flash bank
2116 @*Configures a flash bank at <@var{base}> of <@var{size}> bytes and <@var{chip_width}>
2117 and <@var{bus_width}> bytes using the selected flash <driver>.
2119 @subsection External Flash - cfi options
2120 @cindex cfi options
2121 CFI flash are external flash chips - often they are connected to a
2122 specific chip select on the micro. By default at hard reset most
2123 micros have the ablity to ``boot'' from some flash chip - typically
2124 attached to the chips CS0 pin.
2126 For other chip selects: OpenOCD does not know how to configure, or
2127 access a specific chip select. Instead you the human might need to via
2128 other commands (like: mww) configure additional chip selects, or
2129 perhaps configure a GPIO pin that controls the ``write protect'' pin
2130 on the FLASH chip.
2132 @b{flash bank cfi} <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}>
2133 <@var{target#}> [@var{jedec_probe}|@var{x16_as_x8}]
2134 @*CFI flashes require the number of the target they're connected to as an additional
2135 argument. The CFI driver makes use of a working area (specified for the target)
2136 to significantly speed up operation.
2138 @var{chip_width} and @var{bus_width} are specified in bytes.
2140 The @var{jedec_probe} option is used to detect certain non-CFI flash roms, like AM29LV010 and similar types.
2142 @var{x16_as_x8} ???
2144 @subsection Internal Flash (Micro Controllers)
2145 @subsubsection lpc2000 options
2146 @cindex lpc2000 options
2148 @b{flash bank lpc2000} <@var{base}> <@var{size}> 0 0 <@var{target#}> <@var{variant}>
2149 <@var{clock}> [@var{calc_checksum}]
2150 @*LPC flashes don't require the chip and bus width to be specified. Additional
2151 parameters are the <@var{variant}>, which may be @var{lpc2000_v1} (older LPC21xx and LPC22xx)
2152 or @var{lpc2000_v2} (LPC213x, LPC214x, LPC210[123], LPC23xx and LPC24xx), the number
2153 of the target this flash belongs to (first is 0), the frequency at which the core
2154 is currently running (in kHz - must be an integral number), and the optional keyword
2155 @var{calc_checksum}, telling the driver to calculate a valid checksum for the exception
2156 vector table.
2159 @subsubsection at91sam7 options
2160 @cindex at91sam7 options
2162 @b{flash bank at91sam7} 0 0 0 0 <@var{target#}>
2163 @*AT91SAM7 flashes only require the @var{target#}, all other values are looked up after
2164 reading the chip-id and type.
2166 @subsubsection str7 options
2167 @cindex str7 options
2169 @b{flash bank str7x} <@var{base}> <@var{size}> 0 0 <@var{target#}> <@var{variant}>
2170 @*variant can be either STR71x, STR73x or STR75x.
2172 @subsubsection str9 options
2173 @cindex str9 options
2175 @b{flash bank str9x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2176 @*The str9 needs the flash controller to be configured prior to Flash programming, eg.
2177 @example
2178 str9x flash_config 0 4 2 0 0x80000
2179 @end example
2180 This will setup the BBSR, NBBSR, BBADR and NBBADR registers respectively.
2182 @subsubsection str9 options (str9xpec driver)
2184 @b{flash bank str9xpec} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2185 @*Before using the flash commands the turbo mode will need enabling using str9xpec
2186 @option{enable_turbo} <@var{num>.}
2188 Only use this driver for locking/unlocking the device or configuring the option bytes.
2189 Use the standard str9 driver for programming. @xref{STR9 specific commands}.
2191 @subsubsection stellaris (LM3Sxxx) options
2192 @cindex stellaris (LM3Sxxx) options
2194 @b{flash bank stellaris} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2195 @*stellaris flash plugin only require the @var{target#}.
2197 @subsubsection stm32x options
2198 @cindex stm32x options
2200 @b{flash bank stm32x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2201 @*stm32x flash plugin only require the @var{target#}.
2203 @subsubsection aduc702x options
2204 @cindex aduc702x options
2206 @b{flash bank aduc702x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2207 @*aduc702x flash plugin require the flash @var{base}, @var{size} and @var{target#}.
2209 @subsection mFlash configuration
2210 @cindex mFlash configuration
2211 @b{mflash bank} <@var{soc}> <@var{base}> <@var{chip_width}> <@var{bus_width}>
2212 <@var{RST pin}> <@var{WP pin}> <@var{DPD pin}> <@var{target #}>
2213 @cindex mflash bank
2214 @*Configures a mflash for <@var{soc}> host bank at
2215 <@var{base}>. <@var{chip_width}> and <@var{bus_width}> are bytes
2216 order. Pin number format is dependent on host GPIO calling convention.
2217 If WP or DPD pin was not used, write -1. Currently, mflash bank
2218 support s3c2440 and pxa270.
2220 (ex. of s3c2440) mflash <@var{RST pin}> is GPIO B1, <@var{WP pin}> and <@var{DPD pin}> are not used.
2221 @example
2222 mflash bank s3c2440 0x10000000 2 2 1b -1 -1 0
2223 @end example
2224 (ex. of pxa270) mflash <@var{RST pin}> is GPIO 43, <@var{DPD pin}> is not used and <@var{DPD pin}> is GPIO 51.
2225 @example
2226 mflash bank pxa270 0x08000000 2 2 43 -1 51 0
2227 @end example
2229 @section Micro Controller Specific Flash Commands
2231 @subsection AT91SAM7 specific commands
2232 @cindex AT91SAM7 specific commands
2233 The flash configuration is deduced from the chip identification register. The flash
2234 controller handles erases automatically on a page (128/265 byte) basis so erase is
2235 not necessary for flash programming. AT91SAM7 processors with less than 512K flash
2236 only have a single flash bank embedded on chip. AT91SAM7xx512 have two flash planes
2237 that can be erased separatly. Only an EraseAll command is supported by the controller
2238 for each flash plane and this is called with
2239 @itemize @bullet
2240 @item @b{flash erase} <@var{num}> @var{first_plane} @var{last_plane}
2241 @*bulk erase flash planes first_plane to last_plane.
2242 @item @b{at91sam7 gpnvm} <@var{num}> <@var{bit}> <@option{set}|@option{clear}>
2243 @cindex at91sam7 gpnvm
2244 @*set or clear a gpnvm bit for the processor
2245 @end itemize
2247 @subsection STR9 specific commands
2248 @cindex STR9 specific commands
2249 @anchor{STR9 specific commands}
2250 These are flash specific commands when using the str9xpec driver.
2251 @itemize @bullet
2252 @item @b{str9xpec enable_turbo} <@var{num}>
2253 @cindex str9xpec enable_turbo
2254 @*enable turbo mode, simply this will remove the str9 from the chain and talk
2255 directly to the embedded flash controller.
2256 @item @b{str9xpec disable_turbo} <@var{num}>
2257 @cindex str9xpec disable_turbo
2258 @*restore the str9 into jtag chain.
2259 @item @b{str9xpec lock} <@var{num}>
2260 @cindex str9xpec lock
2261 @*lock str9 device. The str9 will only respond to an unlock command that will
2262 erase the device.
2263 @item @b{str9xpec unlock} <@var{num}>
2264 @cindex str9xpec unlock
2265 @*unlock str9 device.
2266 @item @b{str9xpec options_read} <@var{num}>
2267 @cindex str9xpec options_read
2268 @*read str9 option bytes.
2269 @item @b{str9xpec options_write} <@var{num}>
2270 @cindex str9xpec options_write
2271 @*write str9 option bytes.
2272 @end itemize
2274 Note: Before using the str9xpec driver here is some background info to help
2275 you better understand how the drivers works. OpenOCD has two flash drivers for
2276 the str9.
2277 @enumerate
2278 @item
2279 Standard driver @option{str9x} programmed via the str9 core. Normally used for
2280 flash programming as it is faster than the @option{str9xpec} driver.
2281 @item
2282 Direct programming @option{str9xpec} using the flash controller, this is
2283 ISC compilant (IEEE 1532) tap connected in series with the str9 core. The str9
2284 core does not need to be running to program using this flash driver. Typical use
2285 for this driver is locking/unlocking the target and programming the option bytes.
2286 @end enumerate
2288 Before we run any cmds using the @option{str9xpec} driver we must first disable
2289 the str9 core. This example assumes the @option{str9xpec} driver has been
2290 configured for flash bank 0.
2291 @example
2292 # assert srst, we do not want core running
2293 # while accessing str9xpec flash driver
2294 jtag_reset 0 1
2295 # turn off target polling
2296 poll off
2297 # disable str9 core
2298 str9xpec enable_turbo 0
2299 # read option bytes
2300 str9xpec options_read 0
2301 # re-enable str9 core
2302 str9xpec disable_turbo 0
2303 poll on
2304 reset halt
2305 @end example
2306 The above example will read the str9 option bytes.
2307 When performing a unlock remember that you will not be able to halt the str9 - it
2308 has been locked. Halting the core is not required for the @option{str9xpec} driver
2309 as mentioned above, just issue the cmds above manually or from a telnet prompt.
2311 @subsection STR9 configuration
2312 @cindex STR9 configuration
2313 @itemize @bullet
2314 @item @b{str9x flash_config} <@var{bank}> <@var{BBSR}> <@var{NBBSR}>
2315 <@var{BBADR}> <@var{NBBADR}>
2316 @cindex str9x flash_config
2317 @*Configure str9 flash controller.
2318 @example
2319 eg. str9x flash_config 0 4 2 0 0x80000
2320 This will setup
2321 BBSR - Boot Bank Size register
2322 NBBSR - Non Boot Bank Size register
2323 BBADR - Boot Bank Start Address register
2324 NBBADR - Boot Bank Start Address register
2325 @end example
2326 @end itemize
2328 @subsection STR9 option byte configuration
2329 @cindex STR9 option byte configuration
2330 @itemize @bullet
2331 @item @b{str9xpec options_cmap} <@var{num}> <@option{bank0}|@option{bank1}>
2332 @cindex str9xpec options_cmap
2333 @*configure str9 boot bank.
2334 @item @b{str9xpec options_lvdthd} <@var{num}> <@option{2.4v}|@option{2.7v}>
2335 @cindex str9xpec options_lvdthd
2336 @*configure str9 lvd threshold.
2337 @item @b{str9xpec options_lvdsel} <@var{num}> <@option{vdd}|@option{vdd_vddq}>
2338 @cindex str9xpec options_lvdsel
2339 @*configure str9 lvd source.
2340 @item @b{str9xpec options_lvdwarn} <@var{bank}> <@option{vdd}|@option{vdd_vddq}>
2341 @cindex str9xpec options_lvdwarn
2342 @*configure str9 lvd reset warning source.
2343 @end itemize
2345 @subsection STM32x specific commands
2346 @cindex STM32x specific commands
2348 These are flash specific commands when using the stm32x driver.
2349 @itemize @bullet
2350 @item @b{stm32x lock} <@var{num}>
2351 @cindex stm32x lock
2352 @*lock stm32 device.
2353 @item @b{stm32x unlock} <@var{num}>
2354 @cindex stm32x unlock
2355 @*unlock stm32 device.
2356 @item @b{stm32x options_read} <@var{num}>
2357 @cindex stm32x options_read
2358 @*read stm32 option bytes.
2359 @item @b{stm32x options_write} <@var{num}> <@option{SWWDG}|@option{HWWDG}>
2360 <@option{RSTSTNDBY}|@option{NORSTSTNDBY}> <@option{RSTSTOP}|@option{NORSTSTOP}>
2361 @cindex stm32x options_write
2362 @*write stm32 option bytes.
2363 @item @b{stm32x mass_erase} <@var{num}>
2364 @cindex stm32x mass_erase
2365 @*mass erase flash memory.
2366 @end itemize
2368 @subsection Stellaris specific commands
2369 @cindex Stellaris specific commands
2371 These are flash specific commands when using the Stellaris driver.
2372 @itemize @bullet
2373 @item @b{stellaris mass_erase} <@var{num}>
2374 @cindex stellaris mass_erase
2375 @*mass erase flash memory.
2376 @end itemize
2379 @node General Commands
2380 @chapter General Commands
2381 @cindex commands
2383 The commands documented in this chapter here are common commands that
2384 you a human may want to type and see the output of. Configuration type
2385 commands are documented elsewhere.
2387 Intent:
2388 @itemize @bullet
2389 @item @b{Source Of Commands}
2390 @* OpenOCD commands can occur in a configuration script (discussed
2391 elsewhere) or typed manually by a human or supplied programatically,
2392 or via one of several Tcp/Ip Ports.
2394 @item @b{From the human}
2395 @* A human should interact with the Telnet interface (default port: 4444,
2396 or via GDB, default port 3333)
2398 To issue commands from within a GDB session, use the @option{monitor}
2399 command, e.g. use @option{monitor poll} to issue the @option{poll}
2400 command. All output is relayed through the GDB session.
2402 @item @b{Machine Interface}
2403 The TCL interface intent is to be a machine interface. The default TCL
2404 port is 5555.
2405 @end itemize
2408 @section Daemon Commands
2410 @subsection sleep [@var{msec}]
2411 @cindex sleep
2412 @*Wait for n milliseconds before resuming. Useful in connection with script files
2413 (@var{script} command and @var{target_script} configuration).
2415 @subsection shutdown
2416 @cindex shutdown
2417 @*Close the OpenOCD daemon, disconnecting all clients (GDB, Telnet, Other).
2419 @subsection debug_level [@var{n}]
2420 @cindex debug_level
2421 @anchor{debug_level}
2422 @*Display or adjust debug level to n<0-3>
2424 @subsection fast [@var{enable|disable}]
2425 @cindex fast
2426 @*Default disabled. Set default behaviour of OpenOCD to be "fast and dangerous". For instance ARM7/9 DCC memory
2427 downloads and fast memory access will work if the JTAG interface isn't too fast and
2428 the core doesn't run at a too low frequency. Note that this option only changes the default
2429 and that the indvidual options, like DCC memory downloads, can be enabled and disabled
2430 individually.
2432 The target specific "dangerous" optimisation tweaking options may come and go
2433 as more robust and user friendly ways are found to ensure maximum throughput
2434 and robustness with a minimum of configuration.
2436 Typically the "fast enable" is specified first on the command line:
2438 @example
2439 openocd -c "fast enable" -c "interface dummy" -f target/str710.cfg
2440 @end example
2442 @subsection log_output <@var{file}>
2443 @cindex log_output
2444 @*Redirect logging to <file> (default: stderr)
2446 @subsection script <@var{file}>
2447 @cindex script
2448 @*Execute commands from <file>
2449 Also see: ``source [find FILENAME]''
2451 @section Target state handling
2452 @subsection power <@var{on}|@var{off}>
2453 @cindex reg
2454 @*Turn power switch to target on/off.
2455 No arguments: print status.
2456 Not all interfaces support this.
2458 @subsection reg [@option{#}|@option{name}] [value]
2459 @cindex reg
2460 @*Access a single register by its number[@option{#}] or by its [@option{name}].
2461 No arguments: list all available registers for the current target.
2462 Number or name argument: display a register
2463 Number or name and value arguments: set register value
2465 @subsection poll [@option{on}|@option{off}]
2466 @cindex poll
2467 @*Poll the target for its current state. If the target is in debug mode, architecture
2468 specific information about the current state is printed. An optional parameter
2469 allows continuous polling to be enabled and disabled.
2471 @subsection halt [@option{ms}]
2472 @cindex halt
2473 @*Send a halt request to the target and wait for it to halt for up to [@option{ms}] milliseconds.
2474 Default [@option{ms}] is 5 seconds if no arg given.
2475 Optional arg @option{ms} is a timeout in milliseconds. Using 0 as the [@option{ms}]
2476 will stop OpenOCD from waiting.
2478 @subsection wait_halt [@option{ms}]
2479 @cindex wait_halt
2480 @*Wait for the target to enter debug mode. Optional [@option{ms}] is
2481 a timeout in milliseconds. Default [@option{ms}] is 5 seconds if no
2482 arg given.
2484 @subsection resume [@var{address}]
2485 @cindex resume
2486 @*Resume the target at its current code position, or at an optional address.
2487 OpenOCD will wait 5 seconds for the target to resume.
2489 @subsection step [@var{address}]
2490 @cindex step
2491 @*Single-step the target at its current code position, or at an optional address.
2493 @subsection reset [@option{run}|@option{halt}|@option{init}]
2494 @cindex reset
2495 @*Perform a hard-reset. The optional parameter specifies what should happen after the reset.
2497 With no arguments a "reset run" is executed
2498 @itemize @minus
2499 @item @b{run}
2500 @cindex reset run
2501 @*Let the target run.
2502 @item @b{halt}
2503 @cindex reset halt
2504 @*Immediately halt the target (works only with certain configurations).
2505 @item @b{init}
2506 @cindex reset init
2507 @*Immediately halt the target, and execute the reset script (works only with certain
2508 configurations)
2509 @end itemize
2511 @subsection soft_reset_halt
2512 @cindex reset
2513 @*Requesting target halt and executing a soft reset. This often used
2514 when a target cannot be reset and halted. The target, after reset is
2515 released begins to execute code. OpenOCD attempts to stop the CPU and
2516 then sets the Program counter back at the reset vector. Unfortunatlly
2517 that code that was executed may have left hardware in an unknown
2518 state.
2521 @section Memory access commands
2522 @subsection meminfo
2523 display available ram memory.
2524 @subsection Memory Peek/Poke type commands
2525 These commands allow accesses of a specific size to the memory
2526 system. Often these are used to configure the current target in some
2527 special way. For example - one may need to write certian values to the
2528 SDRAM controller to enable SDRAM.
2530 @enumerate
2531 @item To change the current target see the ``targets'' (plural) command
2532 @item In system level scripts these commands are depricated, please use the TARGET object versions.
2533 @end enumerate
2535 @itemize @bullet
2536 @item @b{mdw} <@var{addr}> [@var{count}]
2537 @cindex mdw
2538 @*display memory words (32bit)
2539 @item @b{mdh} <@var{addr}> [@var{count}]
2540 @cindex mdh
2541 @*display memory half-words (16bit)
2542 @item @b{mdb} <@var{addr}> [@var{count}]
2543 @cindex mdb
2544 @*display memory bytes (8bit)
2545 @item @b{mww} <@var{addr}> <@var{value}>
2546 @cindex mww
2547 @*write memory word (32bit)
2548 @item @b{mwh} <@var{addr}> <@var{value}>
2549 @cindex mwh
2550 @*write memory half-word (16bit)
2551 @item @b{mwb} <@var{addr}> <@var{value}>
2552 @cindex mwb
2553 @*write memory byte (8bit)
2554 @end itemize
2556 @section Image Loading Commands
2557 @subsection load_image
2558 @b{load_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
2559 @cindex load_image
2560 @anchor{load_image}
2561 @*Load image <@var{file}> to target memory at <@var{address}>
2562 @subsection fast_load_image
2563 @b{fast_load_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
2564 @cindex fast_load_image
2565 @anchor{fast_load_image}
2566 @*Normally you should be using @b{load_image} or GDB load. However, for
2567 testing purposes or when IO overhead is significant(OpenOCD running on embedded
2568 host), then storing the image in memory and uploading the image to the target
2569 can be a way to upload e.g. multiple debug sessions when the binary does not change.
2570 Arguments as @b{load_image}, but image is stored in OpenOCD host
2571 memory, i.e. does not affect target. This approach is also useful when profiling
2572 target programming performance as IO and target programming can easily be profiled
2573 seperately.
2574 @subsection fast_load
2575 @b{fast_load}
2576 @cindex fast_image
2577 @anchor{fast_image}
2578 @*Loads image stored in memory by @b{fast_load_image} to current target. Must be preceeded by fast_load_image.
2579 @subsection dump_image
2580 @b{dump_image} <@var{file}> <@var{address}> <@var{size}>
2581 @cindex dump_image
2582 @anchor{dump_image}
2583 @*Dump <@var{size}> bytes of target memory starting at <@var{address}> to a
2584 (binary) <@var{file}>.
2585 @subsection verify_image
2586 @b{verify_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
2587 @cindex verify_image
2588 @*Verify <@var{file}> against target memory starting at <@var{address}>.
2589 This will first attempt comparison using a crc checksum, if this fails it will try a binary compare.
2592 @section Breakpoint commands
2593 @cindex Breakpoint commands
2594 @itemize @bullet
2595 @item @b{bp} <@var{addr}> <@var{len}> [@var{hw}]
2596 @cindex bp
2597 @*set breakpoint <address> <length> [hw]
2598 @item @b{rbp} <@var{addr}>
2599 @cindex rbp
2600 @*remove breakpoint <adress>
2601 @item @b{wp} <@var{addr}> <@var{len}> <@var{r}|@var{w}|@var{a}> [@var{value}] [@var{mask}]
2602 @cindex wp
2603 @*set watchpoint <address> <length> <r/w/a> [value] [mask]
2604 @item @b{rwp} <@var{addr}>
2605 @cindex rwp
2606 @*remove watchpoint <adress>
2607 @end itemize
2609 @section Misc Commands
2610 @cindex Other Target Commands
2611 @itemize
2612 @item @b{profile} <@var{seconds}> <@var{gmon.out}>
2614 Profiling samples the CPU PC as quickly as OpenOCD is able, which will be used as a random sampling of PC.
2615 @end itemize
2617 @section Target Specific Commands
2618 @cindex Target Specific Commands
2621 @page
2622 @section Architecture Specific Commands
2623 @cindex Architecture Specific Commands
2625 @subsection ARMV4/5 specific commands
2626 @cindex ARMV4/5 specific commands
2628 These commands are specific to ARM architecture v4 and v5, like all ARM7/9 systems
2629 or Intel XScale (XScale isn't supported yet).
2630 @itemize @bullet
2631 @item @b{armv4_5 reg}
2632 @cindex armv4_5 reg
2633 @*Display a list of all banked core registers, fetching the current value from every
2634 core mode if necessary. OpenOCD versions before rev. 60 didn't fetch the current
2635 register value.
2636 @item @b{armv4_5 core_mode} [@var{arm}|@var{thumb}]
2637 @cindex armv4_5 core_mode
2638 @*Displays the core_mode, optionally changing it to either ARM or Thumb mode.
2639 The target is resumed in the currently set @option{core_mode}.
2640 @end itemize
2642 @subsection ARM7/9 specific commands
2643 @cindex ARM7/9 specific commands
2645 These commands are specific to ARM7 and ARM9 targets, like ARM7TDMI, ARM720t,
2646 ARM920t or ARM926EJ-S.
2647 @itemize @bullet
2648 @item @b{arm7_9 dbgrq} <@var{enable}|@var{disable}>
2649 @cindex arm7_9 dbgrq
2650 @*Enable use of the DBGRQ bit to force entry into debug mode. This should be
2651 safe for all but ARM7TDMI--S cores (like Philips LPC).
2652 @item @b{arm7_9 fast_memory_access} <@var{enable}|@var{disable}>
2653 @cindex arm7_9 fast_memory_access
2654 @anchor{arm7_9 fast_memory_access}
2655 @*Allow OpenOCD to read and write memory without checking completion of
2656 the operation. This provides a huge speed increase, especially with USB JTAG
2657 cables (FT2232), but might be unsafe if used with targets running at a very low
2658 speed, like the 32kHz startup clock of an AT91RM9200.
2659 @item @b{arm7_9 dcc_downloads} <@var{enable}|@var{disable}>
2660 @cindex arm7_9 dcc_downloads
2661 @*Enable the use of the debug communications channel (DCC) to write larger (>128 byte)
2662 amounts of memory. DCC downloads offer a huge speed increase, but might be potentially
2663 unsafe, especially with targets running at a very low speed. This command was introduced
2664 with OpenOCD rev. 60.
2665 @end itemize
2667 @subsection ARM720T specific commands
2668 @cindex ARM720T specific commands
2670 @itemize @bullet
2671 @item @b{arm720t cp15} <@var{num}> [@var{value}]
2672 @cindex arm720t cp15
2673 @*display/modify cp15 register <@option{num}> [@option{value}].
2674 @item @b{arm720t md<bhw>_phys} <@var{addr}> [@var{count}]
2675 @cindex arm720t md<bhw>_phys
2676 @*Display memory at physical address addr.
2677 @item @b{arm720t mw<bhw>_phys} <@var{addr}> <@var{value}>
2678 @cindex arm720t mw<bhw>_phys
2679 @*Write memory at physical address addr.
2680 @item @b{arm720t virt2phys} <@var{va}>
2681 @cindex arm720t virt2phys
2682 @*Translate a virtual address to a physical address.
2683 @end itemize
2685 @subsection ARM9TDMI specific commands
2686 @cindex ARM9TDMI specific commands
2688 @itemize @bullet
2689 @item @b{arm9tdmi vector_catch} <@var{all}|@var{none}>
2690 @cindex arm9tdmi vector_catch
2691 @*Catch arm9 interrupt vectors, can be @option{all} @option{none} or any of the following:
2692 @option{reset} @option{undef} @option{swi} @option{pabt} @option{dabt} @option{reserved}
2693 @option{irq} @option{fiq}.
2695 Can also be used on other arm9 based cores, arm966, arm920t and arm926ejs.
2696 @end itemize
2698 @subsection ARM966E specific commands
2699 @cindex ARM966E specific commands
2701 @itemize @bullet
2702 @item @b{arm966e cp15} <@var{num}> [@var{value}]
2703 @cindex arm966e cp15
2704 @*display/modify cp15 register <@option{num}> [@option{value}].
2705 @end itemize
2707 @subsection ARM920T specific commands
2708 @cindex ARM920T specific commands
2710 @itemize @bullet
2711 @item @b{arm920t cp15} <@var{num}> [@var{value}]
2712 @cindex arm920t cp15
2713 @*display/modify cp15 register <@option{num}> [@option{value}].
2714 @item @b{arm920t cp15i} <@var{num}> [@var{value}] [@var{address}]
2715 @cindex arm920t cp15i
2716 @*display/modify cp15 (interpreted access) <@option{opcode}> [@option{value}] [@option{address}]
2717 @item @b{arm920t cache_info}
2718 @cindex arm920t cache_info
2719 @*Print information about the caches found. This allows you to see if your target
2720 is a ARM920T (2x16kByte cache) or ARM922T (2x8kByte cache).
2721 @item @b{arm920t md<bhw>_phys} <@var{addr}> [@var{count}]
2722 @cindex arm920t md<bhw>_phys
2723 @*Display memory at physical address addr.
2724 @item @b{arm920t mw<bhw>_phys} <@var{addr}> <@var{value}>
2725 @cindex arm920t mw<bhw>_phys
2726 @*Write memory at physical address addr.
2727 @item @b{arm920t read_cache} <@var{filename}>
2728 @cindex arm920t read_cache
2729 @*Dump the content of ICache and DCache to a file.
2730 @item @b{arm920t read_mmu} <@var{filename}>
2731 @cindex arm920t read_mmu
2732 @*Dump the content of the ITLB and DTLB to a file.
2733 @item @b{arm920t virt2phys} <@var{va}>
2734 @cindex arm920t virt2phys
2735 @*Translate a virtual address to a physical address.
2736 @end itemize
2738 @subsection ARM926EJS specific commands
2739 @cindex ARM926EJS specific commands
2741 @itemize @bullet
2742 @item @b{arm926ejs cp15} <@var{num}> [@var{value}]
2743 @cindex arm926ejs cp15
2744 @*display/modify cp15 register <@option{num}> [@option{value}].
2745 @item @b{arm926ejs cache_info}
2746 @cindex arm926ejs cache_info
2747 @*Print information about the caches found.
2748 @item @b{arm926ejs md<bhw>_phys} <@var{addr}> [@var{count}]
2749 @cindex arm926ejs md<bhw>_phys
2750 @*Display memory at physical address addr.
2751 @item @b{arm926ejs mw<bhw>_phys} <@var{addr}> <@var{value}>
2752 @cindex arm926ejs mw<bhw>_phys
2753 @*Write memory at physical address addr.
2754 @item @b{arm926ejs virt2phys} <@var{va}>
2755 @cindex arm926ejs virt2phys
2756 @*Translate a virtual address to a physical address.
2757 @end itemize
2759 @subsection CORTEX_M3 specific commands
2760 @cindex CORTEX_M3 specific commands
2762 @itemize @bullet
2763 @item @b{cortex_m3 maskisr} <@var{on}|@var{off}>
2764 @cindex cortex_m3 maskisr
2765 @*Enable masking (disabling) interrupts during target step/resume.
2766 @end itemize
2768 @page
2769 @section Debug commands
2770 @cindex Debug commands
2771 The following commands give direct access to the core, and are most likely
2772 only useful while debugging OpenOCD.
2773 @itemize @bullet
2774 @item @b{arm7_9 write_xpsr} <@var{32-bit value}> <@option{0=cpsr}, @option{1=spsr}>
2775 @cindex arm7_9 write_xpsr
2776 @*Immediately write either the current program status register (CPSR) or the saved
2777 program status register (SPSR), without changing the register cache (as displayed
2778 by the @option{reg} and @option{armv4_5 reg} commands).
2779 @item @b{arm7_9 write_xpsr_im8} <@var{8-bit value}> <@var{rotate 4-bit}>
2780 <@var{0=cpsr},@var{1=spsr}>
2781 @cindex arm7_9 write_xpsr_im8
2782 @*Write the 8-bit value rotated right by 2*rotate bits, using an immediate write
2783 operation (similar to @option{write_xpsr}).
2784 @item @b{arm7_9 write_core_reg} <@var{num}> <@var{mode}> <@var{value}>
2785 @cindex arm7_9 write_core_reg
2786 @*Write a core register, without changing the register cache (as displayed by the
2787 @option{reg} and @option{armv4_5 reg} commands). The <@var{mode}> argument takes the
2788 encoding of the [M4:M0] bits of the PSR.
2789 @end itemize
2791 @section Target Requests
2792 @cindex Target Requests
2793 OpenOCD can handle certain target requests, currently debugmsg are only supported for arm7_9 and cortex_m3.
2794 See libdcc in the contrib dir for more details.
2795 @itemize @bullet
2796 @item @b{target_request debugmsgs} <@var{enable}|@var{disable}>
2797 @cindex target_request debugmsgs
2798 @*Enable/disable target debugmsgs requests. debugmsgs enable messages to be sent to the debugger while the target is running.
2799 @end itemize
2801 @node JTAG Commands
2802 @chapter JTAG Commands
2803 @cindex JTAG commands
2804 Generally most people will not use the bulk of these commands. They
2805 are mostly used by the OpenOCD developers or those who need to
2806 directly manipulate the JTAG taps.
2808 In general these commands control JTAG taps at a very low level. For
2809 example if you need to control a JTAG Route Controller (ie: the
2810 OMAP3530 on the Beagle Board has one) you might use these commands in
2811 a script or an event procedure.
2812 @section Commands
2813 @cindex Commands
2814 @itemize @bullet
2815 @item @b{scan_chain}
2816 @cindex scan_chain
2817 @*Print current scan chain configuration.
2818 @item @b{jtag_reset} <@var{trst}> <@var{srst}>
2819 @cindex jtag_reset
2820 @*Toggle reset lines.
2821 @item @b{endstate} <@var{tap_state}>
2822 @cindex endstate
2823 @*Finish JTAG operations in <@var{tap_state}>.
2824 @item @b{runtest} <@var{num_cycles}>
2825 @cindex runtest
2826 @*Move to Run-Test/Idle, and execute <@var{num_cycles}>
2827 @item @b{statemove} [@var{tap_state}]
2828 @cindex statemove
2829 @*Move to current endstate or [@var{tap_state}]
2830 @item @b{irscan} <@var{device}> <@var{instr}> [@var{dev2}] [@var{instr2}] ...
2831 @cindex irscan
2832 @*Execute IR scan <@var{device}> <@var{instr}> [@var{dev2}] [@var{instr2}] ...
2833 @item @b{drscan} <@var{device}> [@var{dev2}] [@var{var2}] ...
2834 @cindex drscan
2835 @*Execute DR scan <@var{device}> [@var{dev2}] [@var{var2}] ...
2836 @item @b{verify_ircapture} <@option{enable}|@option{disable}>
2837 @cindex verify_ircapture
2838 @*Verify value captured during Capture-IR. Default is enabled.
2839 @item @b{var} <@var{name}> [@var{num_fields}|@var{del}] [@var{size1}] ...
2840 @cindex var
2841 @*Allocate, display or delete variable <@var{name}> [@var{num_fields}|@var{del}] [@var{size1}] ...
2842 @item @b{field} <@var{var}> <@var{field}> [@var{value}|@var{flip}]
2843 @cindex field
2844 Display/modify variable field <@var{var}> <@var{field}> [@var{value}|@var{flip}].
2845 @end itemize
2847 @section Tap states
2848 @cindex Tap states
2849 Available tap_states are:
2850 @itemize @bullet
2851 @item @b{RESET}
2852 @cindex RESET
2853 @item @b{IDLE}
2854 @cindex IDLE
2855 @item @b{DRSELECT}
2856 @cindex DRSELECT
2857 @item @b{DRCAPTURE}
2858 @cindex DRCAPTURE
2859 @item @b{DRSHIFT}
2860 @cindex DRSHIFT
2861 @item @b{DREXIT1}
2862 @cindex DREXIT1
2863 @item @b{DRPAUSE}
2864 @cindex DRPAUSE
2865 @item @b{DREXIT2}
2866 @cindex DREXIT2
2867 @item @b{DRUPDATE}
2868 @cindex DRUPDATE
2869 @item @b{IRSELECT}
2870 @cindex IRSELECT
2871 @item @b{IRCAPTURE}
2872 @cindex IRCAPTURE
2873 @item @b{IRSHIFT}
2874 @cindex IRSHIFT
2875 @item @b{IREXIT1}
2876 @cindex IREXIT1
2877 @item @b{IRPAUSE}
2878 @cindex IRPAUSE
2879 @item @b{IREXIT2}
2880 @cindex IREXIT2
2881 @item @b{IRUPDATE}
2882 @cindex IRUPDATE
2883 @end itemize
2886 @node TFTP
2887 @chapter TFTP
2888 @cindex TFTP
2889 If OpenOCD runs on an embedded host(as ZY1000 does), then tftp can
2890 be used to access files on PCs(either developer PC or some other PC).
2892 The way this works on the ZY1000 is to prefix a filename by
2893 "/tftp/ip/" and append the tftp path on the tftp
2894 server(tftpd). E.g. "load_image /tftp/\temp\abc.elf" will
2895 load c:\temp\abc.elf from the developer pc ( into memory as
2896 if the file was hosted on the embedded host.
2898 In order to achieve decent performance, you must choose a tftp server
2899 that supports a packet size bigger than the default packet size(512 bytes). There
2900 are numerous tftp servers out there(free and commercial) and you will have to do
2901 a bit of googling to find something that fits your requirements.
2903 @node Sample Scripts
2904 @chapter Sample Scripts
2905 @cindex scripts
2907 This page shows how to use the target library.
2909 The configuration script can be divided in the following section:
2910 @itemize @bullet
2911 @item daemon configuration
2912 @item interface
2913 @item jtag scan chain
2914 @item target configuration
2915 @item flash configuration
2916 @end itemize
2918 Detailed information about each section can be found at OpenOCD configuration.
2920 @section AT91R40008 example
2921 @cindex AT91R40008 example
2922 To start OpenOCD with a target script for the AT91R40008 CPU and reset
2923 the CPU upon startup of the OpenOCD daemon.
2924 @example
2925 openocd -f interface/parport.cfg -f target/at91r40008.cfg -c init -c reset
2926 @end example
2929 @node GDB and OpenOCD
2930 @chapter GDB and OpenOCD
2931 @cindex GDB and OpenOCD
2932 OpenOCD complies with the remote gdbserver protocol, and as such can be used
2933 to debug remote targets.
2935 @section Connecting to GDB
2936 @cindex Connecting to GDB
2937 @anchor{Connecting to GDB}
2938 Use GDB 6.7 or newer with OpenOCD if you run into trouble. For
2939 instance 6.3 has a known bug where it produces bogus memory access
2940 errors, which has since been fixed: look up 1836 in
2941 @url{}
2943 @*OpenOCD can communicate with GDB in two ways:
2944 @enumerate
2945 @item
2946 A socket (tcp) connection is typically started as follows:
2947 @example
2948 target remote localhost:3333
2949 @end example
2950 This would cause GDB to connect to the gdbserver on the local pc using port 3333.
2951 @item
2952 A pipe connection is typically started as follows:
2953 @example
2954 target remote openocd --pipe
2955 @end example
2956 This would cause GDB to run OpenOCD and communicate using pipes (stdin/stdout).
2957 Using this method has the advantage of GDB starting/stopping OpenOCD for debug session.
2958 @end enumerate
2960 @*To see a list of available OpenOCD commands type @option{monitor help} on the
2961 GDB commandline.
2963 OpenOCD supports the gdb @option{qSupported} packet, this enables information
2964 to be sent by the gdb server (OpenOCD) to GDB. Typical information includes
2965 packet size and device memory map.
2967 Previous versions of OpenOCD required the following GDB options to increase
2968 the packet size and speed up GDB communication.
2969 @example
2970 set remote memory-write-packet-size 1024
2971 set remote memory-write-packet-size fixed
2972 set remote memory-read-packet-size 1024
2973 set remote memory-read-packet-size fixed
2974 @end example
2975 This is now handled in the @option{qSupported} PacketSize and should not be required.
2977 @section Programming using GDB
2978 @cindex Programming using GDB
2980 By default the target memory map is sent to GDB, this can be disabled by
2981 the following OpenOCD config option:
2982 @example
2983 gdb_memory_map disable
2984 @end example
2985 For this to function correctly a valid flash config must also be configured
2986 in OpenOCD. For faster performance you should also configure a valid
2987 working area.
2989 Informing GDB of the memory map of the target will enable GDB to protect any
2990 flash area of the target and use hardware breakpoints by default. This means
2991 that the OpenOCD option @option{gdb_breakpoint_override} is not required when
2992 using a memory map. @xref{gdb_breakpoint_override}.
2994 To view the configured memory map in GDB, use the gdb command @option{info mem}
2995 All other unasigned addresses within GDB are treated as RAM.
2997 GDB 6.8 and higher set any memory area not in the memory map as inaccessible,
2998 this can be changed to the old behaviour by using the following GDB command.
2999 @example
3000 set mem inaccessible-by-default off
3001 @end example
3003 If @option{gdb_flash_program enable} is also used, GDB will be able to
3004 program any flash memory using the vFlash interface.
3006 GDB will look at the target memory map when a load command is given, if any
3007 areas to be programmed lie within the target flash area the vFlash packets
3008 will be used.
3010 If the target needs configuring before GDB programming, an event
3011 script can be executed.
3012 @example
3013 $_TARGETNAME configure -event EVENTNAME BODY
3014 @end example
3016 To verify any flash programming the GDB command @option{compare-sections}
3017 can be used.
3019 @node TCL scripting API
3020 @chapter TCL scripting API
3021 @cindex TCL scripting API
3022 API rules
3024 The commands are stateless. E.g. the telnet command line has a concept
3025 of currently active target, the Tcl API proc's take this sort of state
3026 information as an argument to each proc.
3028 There are three main types of return values: single value, name value
3029 pair list and lists.
3031 Name value pair. The proc 'foo' below returns a name/value pair
3032 list.
3034 @verbatim
3036 > set foo(me) Duane
3037 > set foo(you) Oyvind
3038 > set foo(mouse) Micky
3039 > set foo(duck) Donald
3041 If one does this:
3043 > set foo
3045 The result is:
3047 me Duane you Oyvind mouse Micky duck Donald
3049 Thus, to get the names of the associative array is easy:
3051 foreach { name value } [set foo] {
3052 puts "Name: $name, Value: $value"
3053 }
3054 @end verbatim
3056 Lists returned must be relatively small. Otherwise a range
3057 should be passed in to the proc in question.
3059 Low level commands are prefixed with "openocd_", e.g. openocd_flash_banks
3060 is the low level API upon which "flash banks" is implemented.
3062 @itemize @bullet
3063 @item @b{ocd_mem2array} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
3065 Read memory and return as a TCL array for script processing
3066 @item @b{ocd_array2mem} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
3068 Convert a TCL array to memory locations and write the values
3069 @item @b{ocd_flash_banks} <@var{driver}> <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}> <@var{target}> [@option{driver options} ...]
3071 Return information about the flash banks
3072 @end itemize
3074 OpenOCD commands can consist of two words, e.g. "flash banks". The
3075 startup.tcl "unknown" proc will translate this into a tcl proc
3076 called "flash_banks".
3079 @node Upgrading
3080 @chapter Deprecated/Removed Commands
3081 @cindex Deprecated/Removed Commands
3082 Certain OpenOCD commands have been deprecated/removed during the various revisions.
3084 @itemize @bullet
3085 @item @b{arm7_9 fast_writes}
3086 @cindex arm7_9 fast_writes
3087 @*use @option{arm7_9 fast_memory_access} command with same args. @xref{arm7_9 fast_memory_access}.
3088 @item @b{arm7_9 force_hw_bkpts}
3089 @cindex arm7_9 force_hw_bkpts
3090 @*Use @option{gdb_breakpoint_override} instead. Note that GDB will use hardware breakpoints
3091 for flash if the gdb memory map has been set up(default when flash is declared in
3092 target configuration). @xref{gdb_breakpoint_override}.
3093 @item @b{arm7_9 sw_bkpts}
3094 @cindex arm7_9 sw_bkpts
3095 @*On by default. See also @option{gdb_breakpoint_override}. @xref{gdb_breakpoint_override}.
3096 @item @b{daemon_startup}
3097 @cindex daemon_startup
3098 @*this config option has been removed, simply adding @option{init} and @option{reset halt} to
3099 the end of your config script will give the same behaviour as using @option{daemon_startup reset}
3100 and @option{target cortex_m3 little reset_halt 0}.
3101 @item @b{dump_binary}
3102 @cindex dump_binary
3103 @*use @option{dump_image} command with same args. @xref{dump_image}.
3104 @item @b{flash erase}
3105 @cindex flash erase
3106 @*use @option{flash erase_sector} command with same args. @xref{flash erase_sector}.
3107 @item @b{flash write}
3108 @cindex flash write
3109 @*use @option{flash write_bank} command with same args. @xref{flash write_bank}.
3110 @item @b{flash write_binary}
3111 @cindex flash write_binary
3112 @*use @option{flash write_bank} command with same args. @xref{flash write_bank}.
3113 @item @b{flash auto_erase}
3114 @cindex flash auto_erase
3115 @*use @option{flash write_image} command passing @option{erase} as the first parameter. @xref{flash write_image}.
3116 @item @b{load_binary}
3117 @cindex load_binary
3118 @*use @option{load_image} command with same args. @xref{load_image}.
3119 @item @b{run_and_halt_time}
3120 @cindex run_and_halt_time
3121 @*This command has been removed for simpler reset behaviour, it can be simulated with the
3122 following commands:
3123 @smallexample
3124 reset run
3125 sleep 100
3126 halt
3127 @end smallexample
3128 @item @b{target} <@var{type}> <@var{endian}> <@var{jtag-position}>
3129 @cindex target
3130 @*use the create subcommand of @option{target}.
3131 @item @b{target_script} <@var{target#}> <@var{eventname}> <@var{scriptname}>
3132 @cindex target_script
3133 @*use <@var{target_name}> configure -event <@var{eventname}> "script <@var{scriptname}>"
3134 @item @b{working_area}
3135 @cindex working_area
3136 @*use the @option{configure} subcommand of @option{target} to set the work-area-virt, work-area-phy, work-area-size, and work-area-backup properties of the target.
3137 @end itemize
3139 @node FAQ
3140 @chapter FAQ
3141 @cindex faq
3142 @enumerate
3143 @item @b{RTCK, also known as: Adaptive Clocking - What is it?}
3144 @cindex RTCK
3145 @cindex adaptive clocking
3146 @*
3148 In digital circuit design it is often refered to as ``clock
3149 syncronization'' the JTAG interface uses one clock (TCK or TCLK)
3150 operating at some speed, your target is operating at another. The two
3151 clocks are not syncronized, they are ``asynchronous''
3153 In order for the two to work together they must syncronize. Otherwise
3154 the two systems will get out of sync with each other and nothing will
3155 work. There are 2 basic options. @b{1.} use a special circuit or
3156 @b{2.} one clock must be some multile slower the the other.
3158 @b{Does this really matter?} For some chips and some situations, this
3159 is a non-issue (ie: A 500mhz ARM926) but for others - for example some
3160 ATMEL SAM7 and SAM9 chips start operation from reset at 32khz -
3161 program/enable the oscillators and eventually the main clock. It is in
3162 those critical times you must slow the jtag clock to sometimes 1 to
3163 4khz.
3165 Imagine debugging that 500mhz arm926 hand held battery powered device
3166 that ``deep sleeps'' at 32khz between every keystroke. It can be
3167 painful.
3169 @b{Solution #1 - A special circuit}
3171 In order to make use of this your jtag dongle must support the RTCK
3172 feature. Not all dongles support this - keep reading!
3174 The RTCK signal often found in some ARM chips is used to help with
3175 this problem. ARM has a good description of the problem described at
3176 this link: @url{} [checked
3177 28/nov/2008]. Link title: ``How does the jtag synchronisation logic
3178 work? / how does adaptive clocking working?''.
3180 The nice thing about adaptive clocking is that ``battery powered hand
3181 held device example'' - the adaptiveness works perfectly all the
3182 time. One can set a break point or halt the system in the deep power
3183 down code, slow step out until the system speeds up.
3185 @b{Solution #2 - Always works - but is slower}
3187 Often this is a perfectly acceptable solution.
3189 In the most simple terms: Often the JTAG clock must be 1/10 to 1/12 of
3190 the target clock speed. But what is that ``magic division'' it varies
3191 depending upon the chips on your board. @b{ARM Rule of thumb} Most ARM
3192 based systems require an 8:1 division. @b{Xilinx Rule of thumb} is
3193 1/12 the clock speed.
3195 Note: Many FTDI2232C based JTAG dongles are limited to 6mhz.
3197 You can still debug the 'lower power' situations - you just need to
3198 manually adjust the clock speed at every step. While painful and
3199 teadious, it is not always practical.
3201 It is however easy to ``code your way around it'' - ie: Cheat a little
3202 have a special debug mode in your application that does a ``high power
3203 sleep''. If you are careful - 98% of your problems can be debugged
3204 this way.
3206 To set the JTAG frequency use the command:
3208 @example
3209 # Example: 1.234mhz
3210 jtag_khz 1234
3211 @end example
3214 @item @b{Win32 Pathnames} Why does not backslashes in paths under Windows doesn't work?
3216 OpenOCD uses Tcl and a backslash is an escape char. Use @{ and @}
3217 around Windows filenames.
3219 @example
3220 > echo \a
3222 > echo @{\a@}
3223 \a
3224 > echo "\a"
3226 >
3227 @end example
3230 @item @b{Missing: cygwin1.dll} OpenOCD complains about a missing cygwin1.dll.
3232 Make sure you have Cygwin installed, or at least a version of OpenOCD that
3233 claims to come with all the necessary dlls. When using Cygwin, try launching
3234 OpenOCD from the Cygwin shell.
3236 @item @b{Breakpoint Issue} I'm trying to set a breakpoint using GDB (or a frontend like Insight or
3237 Eclipse), but OpenOCD complains that "Info: arm7_9_common.c:213
3238 arm7_9_add_breakpoint(): sw breakpoint requested, but software breakpoints not enabled".
3240 GDB issues software breakpoints when a normal breakpoint is requested, or to implement
3241 source-line single-stepping. On ARMv4T systems, like ARM7TDMI, ARM720t or ARM920t,
3242 software breakpoints consume one of the two available hardware breakpoints.
3244 @item @b{LPC2000 Flash} When erasing or writing LPC2000 on-chip flash, the operation fails sometimes
3245 and works sometimes fine.
3247 Make sure the core frequency specified in the @option{flash lpc2000} line matches the
3248 clock at the time you're programming the flash. If you've specified the crystal's
3249 frequency, make sure the PLL is disabled, if you've specified the full core speed
3250 (e.g. 60MHz), make sure the PLL is enabled.
3252 @item @b{Amontec Chameleon} When debugging using an Amontec Chameleon in its JTAG Accelerator configuration,
3253 I keep getting "Error: amt_jtagaccel.c:184 amt_wait_scan_busy(): amt_jtagaccel timed
3254 out while waiting for end of scan, rtck was disabled".
3256 Make sure your PC's parallel port operates in EPP mode. You might have to try several
3257 settings in your PC BIOS (ECP, EPP, and different versions of those).
3259 @item @b{Data Aborts} When debugging with OpenOCD and GDB (plain GDB, Insight, or Eclipse),
3260 I get lots of "Error: arm7_9_common.c:1771 arm7_9_read_memory():
3261 memory read caused data abort".
3263 The errors are non-fatal, and are the result of GDB trying to trace stack frames
3264 beyond the last valid frame. It might be possible to prevent this by setting up
3265 a proper "initial" stack frame, if you happen to know what exactly has to
3266 be done, feel free to add this here.
3268 @b{Simple:} In your startup code - push 8 registers of ZEROs onto the
3269 stack before calling main(). What GDB is doing is ``climbing'' the run
3270 time stack by reading various values on the stack using the standard
3271 call frame for the target. GDB keeps going - until one of 2 things
3272 happen @b{#1} an invalid frame is found, or @b{#2} some huge number of
3273 stackframes have been processed. By pushing ZEROs on the stack, GDB
3274 gracefully stops.
3276 @b{Debugging Interrupt Service Routines} - In your ISR before you call
3277 your C code, do the same, artifically push some zeros on to the stack,
3278 remember to pop them off when the ISR is done.
3280 @b{Also note:} If you have a multi-threaded operating system, they
3281 often do not @b{in the intrest of saving memory} waste these few
3282 bytes. Painful...
3285 @item @b{JTAG Reset Config} I get the following message in the OpenOCD console (or log file):
3286 "Warning: arm7_9_common.c:679 arm7_9_assert_reset(): srst resets test logic, too".
3288 This warning doesn't indicate any serious problem, as long as you don't want to
3289 debug your core right out of reset. Your .cfg file specified @option{jtag_reset
3290 trst_and_srst srst_pulls_trst} to tell OpenOCD that either your board,
3291 your debugger or your target uC (e.g. LPC2000) can't assert the two reset signals
3292 independently. With this setup, it's not possible to halt the core right out of
3293 reset, everything else should work fine.
3295 @item @b{USB Power} When using OpenOCD in conjunction with Amontec JTAGkey and the Yagarto
3296 Toolchain (Eclipse, arm-elf-gcc, arm-elf-gdb), the debugging seems to be
3297 unstable. When single-stepping over large blocks of code, GDB and OpenOCD
3298 quit with an error message. Is there a stability issue with OpenOCD?
3300 No, this is not a stability issue concerning OpenOCD. Most users have solved
3301 this issue by simply using a self-powered USB hub, which they connect their
3302 Amontec JTAGkey to. Apparently, some computers do not provide a USB power
3303 supply stable enough for the Amontec JTAGkey to be operated.
3305 @b{Laptops running on battery have this problem too...}
3307 @item @b{USB Power} When using the Amontec JTAGkey, sometimes OpenOCD crashes with the
3308 following error messages: "Error: ft2232.c:201 ft2232_read(): FT_Read returned:
3309 4" and "Error: ft2232.c:365 ft2232_send_and_recv(): couldn't read from FT2232".
3310 What does that mean and what might be the reason for this?
3312 First of all, the reason might be the USB power supply. Try using a self-powered
3313 hub instead of a direct connection to your computer. Secondly, the error code 4
3314 corresponds to an FT_IO_ERROR, which means that the driver for the FTDI USB
3315 chip ran into some sort of error - this points us to a USB problem.
3317 @item @b{GDB Disconnects} When using the Amontec JTAGkey, sometimes OpenOCD crashes with the following
3318 error message: "Error: gdb_server.c:101 gdb_get_char(): read: 10054".
3319 What does that mean and what might be the reason for this?
3321 Error code 10054 corresponds to WSAECONNRESET, which means that the debugger (GDB)
3322 has closed the connection to OpenOCD. This might be a GDB issue.
3324 @item @b{LPC2000 Flash} In the configuration file in the section where flash device configurations
3325 are described, there is a parameter for specifying the clock frequency
3326 for LPC2000 internal flash devices (e.g. @option{flash bank lpc2000
3327 0x0 0x40000 0 0 0 lpc2000_v1 14746 calc_checksum}), which must be
3328 specified in kilohertz. However, I do have a quartz crystal of a
3329 frequency that contains fractions of kilohertz (e.g. 14,745,600 Hz,
3330 i.e. 14,745.600 kHz). Is it possible to specify real numbers for the
3331 clock frequency?
3333 No. The clock frequency specified here must be given as an integral number.
3334 However, this clock frequency is used by the In-Application-Programming (IAP)
3335 routines of the LPC2000 family only, which seems to be very tolerant concerning
3336 the given clock frequency, so a slight difference between the specified clock
3337 frequency and the actual clock frequency will not cause any trouble.
3339 @item @b{Command Order} Do I have to keep a specific order for the commands in the configuration file?
3341 Well, yes and no. Commands can be given in arbitrary order, yet the
3342 devices listed for the JTAG scan chain must be given in the right
3343 order (jtag newdevice), with the device closest to the TDO-Pin being
3344 listed first. In general, whenever objects of the same type exist
3345 which require an index number, then these objects must be given in the
3346 right order (jtag newtap, targets and flash banks - a target
3347 references a jtag newtap and a flash bank references a target).
3349 You can use the ``scan_chain'' command to verify and display the tap order.
3351 @item @b{JTAG Tap Order} JTAG Tap Order - Command Order
3353 Many newer devices have multiple JTAG taps. For example: ST
3354 Microsystems STM32 chips have two taps, a ``boundary scan tap'' and
3355 ``cortexM3'' tap. Example: The STM32 reference manual, Document ID:
3356 RM0008, Section 26.5, Figure 259, page 651/681, the ``TDI'' pin is
3357 connected to the Boundary Scan Tap, which then connects to the
3358 CortexM3 Tap, which then connects to the TDO pin.
3360 Thus, the proper order for the STM32 chip is: (1) The CortexM3, then
3361 (2) The Boundary Scan Tap. If your board includes an additional JTAG
3362 chip in the scan chain (for example a Xilinx CPLD or FPGA) you could
3363 place it before or after the stm32 chip in the chain. For example:
3365 @itemize @bullet
3366 @item OpenOCD_TDI(output) -> STM32 TDI Pin (BS Input)
3367 @item STM32 BS TDO (output) -> STM32 CortexM3 TDI (input)
3368 @item STM32 CortexM3 TDO (output) -> SM32 TDO Pin
3369 @item STM32 TDO Pin (output) -> Xilinx TDI Pin (input)
3370 @item Xilinx TDO Pin -> OpenOCD TDO (input)
3371 @end itemize
3373 The ``jtag device'' commands would thus be in the order shown below. Note
3375 @itemize @bullet
3376 @item jtag newtap Xilinx tap -irlen ...
3377 @item jtag newtap stm32 cpu -irlen ...
3378 @item jtag newtap stm32 bs -irlen ...
3379 @item # Create the debug target and say where it is
3380 @item target create stm32.cpu -chain-position stm32.cpu ...
3381 @end itemize
3384 @item @b{SYSCOMP} Sometimes my debugging session terminates with an error. When I look into the
3385 log file, I can see these error messages: Error: arm7_9_common.c:561
3386 arm7_9_execute_sys_speed(): timeout waiting for SYSCOMP
3388 TODO.
3390 @end enumerate
3392 @node TCL Crash Course
3393 @chapter TCL Crash Course
3394 @cindex TCL
3396 Not everyone knows TCL - this is not intended to be a replacement for
3397 learning TCL, the intent of this chapter is to give you some idea of
3398 how the TCL Scripts work.
3400 This chapter is written with two audiences in mind. (1) OpenOCD users
3401 who need to understand a bit more of how JIM-Tcl works so they can do
3402 something useful, and (2) those that want to add a new command to
3403 OpenOCD.
3405 @section TCL Rule #1
3406 There is a famous joke, it goes like this:
3407 @enumerate
3408 @item Rule #1: The wife is always correct
3409 @item Rule #2: If you think otherwise, See Rule #1
3410 @end enumerate
3412 The TCL equal is this:
3414 @enumerate
3415 @item Rule #1: Everything is a string
3416 @item Rule #2: If you think otherwise, See Rule #1
3417 @end enumerate
3419 As in the famous joke, the consequences of Rule #1 are profound. Once
3420 you understand Rule #1, you will understand TCL.
3422 @section TCL Rule #1b
3423 There is a second pair of rules.
3424 @enumerate
3425 @item Rule #1: Control flow does not exist. Only commands
3426 @* For example: the classic FOR loop or IF statement is not a control
3427 flow item, they are commands, there is no such thing as control flow
3428 in TCL.
3429 @item Rule #2: If you think otherwise, See Rule #1
3430 @* Actually what happens is this: There are commands that by
3431 convention, act like control flow key words in other languages. One of
3432 those commands is the word ``for'', another command is ``if''.
3433 @end enumerate
3435 @section Per Rule #1 - All Results are strings
3436 Every TCL command results in a string. The word ``result'' is used
3437 deliberatly. No result is just an empty string. Remember: @i{Rule #1 -
3438 Everything is a string}
3440 @section TCL Quoting Operators
3441 In life of a TCL script, there are two important periods of time, the
3442 difference is subtle.
3443 @enumerate
3444 @item Parse Time
3445 @item Evaluation Time
3446 @end enumerate
3448 The two key items here are how ``quoted things'' work in TCL. TCL has
3449 three primary quoting constructs, the [square-brackets] the
3450 @{curly-braces@} and ``double-quotes''
3452 By now you should know $VARIABLES always start with a $DOLLAR
3453 sign. BTW, to set a variable, you actually use the command ``set'', as
3454 in ``set VARNAME VALUE'' much like the ancient BASIC langauge ``let x
3455 = 1'' statement, but without the equal sign.
3457 @itemize @bullet
3458 @item @b{[square-brackets]}
3459 @* @b{[square-brackets]} are command subsitution. It operates much
3460 like Unix Shell `back-ticks`. The result of a [square-bracket]
3461 operation is exactly 1 string. @i{Remember Rule #1 - Everything is a
3462 string}. These two statments are roughly identical.
3463 @example
3464 # bash example
3465 X=`date`
3466 echo "The Date is: $X"
3467 # TCL example
3468 set X [date]
3469 puts "The Date is: $X"
3470 @end example
3471 @item @b{``double-quoted-things''}
3472 @* @b{``double-quoted-things''} are just simply quoted
3473 text. $VARIABLES and [square-brackets] are expanded in place - the
3474 result however is exactly 1 string. @i{Remember Rule #1 - Everything
3475 is a string}
3476 @example
3477 set x "Dinner"
3478 puts "It is now \"[date]\", $x is in 1 hour"
3479 @end example
3480 @item @b{@{Curly-Braces@}}
3481 @*@b{@{Curly-Braces@}} are magic: $VARIABLES and [square-brackets] are
3482 parsed, but are NOT expanded or executed. @{Curly-Braces@} are like
3483 'single-quote' operators in BASH shell scripts, with the added
3484 feature: @{curly-braces@} nest, single quotes can not. @{@{@{this is
3485 nested 3 times@}@}@} NOTE: [date] is perhaps a bad example, as of
3486 28/nov/2008, Jim/OpenOCD does not have a date command.
3487 @end itemize
3489 @section Consequences of Rule 1/2/3/4
3491 The consequences of Rule 1 is profound.
3493 @subsection Tokenizing & Execution.
3495 Of course, whitespace, blank lines and #comment lines are handled in
3496 the normal way.
3498 As a script is parsed, each (multi) line in the script file is
3499 tokenized and according to the quoting rules. After tokenizing, that
3500 line is immedatly executed.
3502 Multi line statements end with one or more ``still-open''
3503 @{curly-braces@} which - eventually - a few lines later closes.
3505 @subsection Command Execution
3507 Remember earlier: There is no such thing as ``control flow''
3508 statements in TCL. Instead there are COMMANDS that simpily act like
3509 control flow operators.
3511 Commands are executed like this:
3513 @enumerate
3514 @item Parse the next line into (argc) and (argv[]).
3515 @item Look up (argv[0]) in a table and call its function.
3516 @item Repeat until End Of File.
3517 @end enumerate
3519 It sort of works like this:
3520 @example
3521 for(;;)@{
3522 ReadAndParse( &argc, &argv );
3524 cmdPtr = LookupCommand( argv[0] );
3526 (*cmdPtr->Execute)( argc, argv );
3527 @}
3528 @end example
3530 When the command ``proc'' is parsed (which creates a procedure
3531 function) it gets 3 parameters on the command line. @b{1} the name of
3532 the proc (function), @b{2} the list of parameters, and @b{3} the body
3533 of the function. Not the choice of words: LIST and BODY. The PROC
3534 command stores these items in a table somewhere so it can be found by
3535 ``LookupCommand()''
3537 @subsection The FOR Command
3539 The most interesting command to look at is the FOR command. In TCL,
3540 the FOR command is normally implimented in C. Remember, FOR is a
3541 command just like any other command.
3543 When the ascii text containing the FOR command is parsed, the parser
3544 produces 5 parameter strings, @i{(If in doubt: Refer to Rule #1)} they
3545 are:
3547 @enumerate 0
3548 @item The ascii text 'for'
3549 @item The start text
3550 @item The test expression
3551 @item The next text
3552 @item The body text
3553 @end enumerate
3555 Sort of reminds you of ``main( int argc, char **argv )'' does it not?
3556 Remember @i{Rule #1 - Everything is a string.} The key point is this:
3557 Often many of those parameters are in @{curly-braces@} - thus the
3558 variables inside are not expanded or replaced until later.
3560 Remember that every TCL command looks like the classic ``main( argc,
3561 argv )'' function in C. In JimTCL - they actually look like this:
3563 @example
3564 int
3565 MyCommand( Jim_Interp *interp,
3566 int *argc,
3567 Jim_Obj * const *argvs );
3568 @end example
3570 Real TCL is nearly identical. Although the newer versions have
3571 introduced a byte-code parser and intepreter, but at the core, it
3572 still operates in the same basic way.
3574 @subsection FOR Command Implimentation
3576 To understand TCL it is perhaps most helpful to see the FOR
3577 command. Remember, it is a COMMAND not a control flow structure.
3579 In TCL there are two underying C helper functions.
3581 Remember Rule #1 - You are a string.
3583 The @b{first} helper parses and executes commands found in an ascii
3584 string. Commands can be seperated by semi-colons, or newlines. While
3585 parsing, variables are expanded per the quoting rules
3587 The @b{second} helper evaluates an ascii string as a numerical
3588 expression and returns a value.
3590 Here is an example of how the @b{FOR} command could be
3591 implimented. The pseudo code below does not show error handling.
3592 @example
3593 void Execute_AsciiString( void *interp, const char *string );
3595 int Evaluate_AsciiExpression( void *interp, const char *string );
3597 int
3598 MyForCommand( void *interp,
3599 int argc,
3600 char **argv )
3601 @{
3602 if( argc != 5 )@{
3603 SetResult( interp, "WRONG number of parameters");
3604 return ERROR;
3605 @}
3607 // argv[0] = the ascii string just like C
3609 // Execute the start statement.
3610 Execute_AsciiString( interp, argv[1] );
3612 // Top of loop test
3613 for(;;)@{
3614 i = Evaluate_AsciiExpression(interp, argv[2]);
3615 if( i == 0 )
3616 break;
3618 // Execute the body
3619 Execute_AsciiString( interp, argv[3] );
3621 // Execute the LOOP part
3622 Execute_AsciiString( interp, argv[4] );
3623 @}
3625 // Return no error
3626 SetResult( interp, "" );
3627 return SUCCESS;
3628 @}
3629 @end example
3631 Every other command IF, WHILE, FORMAT, PUTS, EXPR, everything works
3632 in the same basic way.
3634 @section OpenOCD TCL Usage
3636 @subsection source and find commands
3637 @b{Where:} In many configuration files
3638 @* Example: @b{ source [find FILENAME] }
3639 @*Remember the parsing rules
3640 @enumerate
3641 @item The FIND command is in square brackets.
3642 @* The FIND command is executed with the parameter FILENAME. It should
3643 find the full path to the named file. The RESULT is a string, which is
3644 subsituted on the orginal command line.
3645 @item The command source is executed with the resulting filename.
3646 @* SOURCE reads a file and executes as a script.
3647 @end enumerate
3648 @subsection format command
3649 @b{Where:} Generally occurs in numerous places.
3650 @* TCL no command like @b{printf()}, intead it has @b{format}, which is really more like
3651 @b{sprintf()}.
3652 @b{Example}
3653 @example
3654 set x 6
3655 set y 7
3656 puts [format "The answer: %d" [expr $x * $y]]
3657 @end example
3658 @enumerate
3659 @item The SET command creates 2 variables, X and Y.
3660 @item The double [nested] EXPR command performs math
3661 @* The EXPR command produces numerical result as a string.
3662 @* Refer to Rule #1
3663 @item The format command is executed, producing a single string
3664 @* Refer to Rule #1.
3665 @item The PUTS command outputs the text.
3666 @end enumerate
3667 @subsection Body Or Inlined Text
3668 @b{Where:} Various TARGET scripts.
3669 @example
3670 #1 Good
3671 proc someproc @{@} @{
3672 ... multiple lines of stuff ...
3673 @}
3674 $_TARGETNAME configure -event FOO someproc
3675 #2 Good - no variables
3676 $_TARGETNAME confgure -event foo "this ; that;"
3677 #3 Good Curly Braces
3678 $_TARGETNAME configure -event FOO @{
3679 puts "Time: [date]"
3680 @}
3682 $_TARGETNAME configure -event foo "puts \"Time: [date]\""
3683 @end example
3684 @enumerate
3685 @item The $_TARGETNAME is an OpenOCD variable convention.
3686 @*@b{$_TARGETNAME} represents the last target created, the value changes
3687 each time a new target is created. Remember the parsing rules. When
3688 the ascii text is parsed, the @b{$_TARGETNAME} becomes a simple string,
3689 the name of the target which happens to be a TARGET (object)
3690 command.
3691 @item The 2nd parameter to the @option{-event} parameter is a TCBODY
3692 @*There are 4 examples:
3693 @enumerate
3694 @item The TCLBODY is a simple string that happens to be a proc name
3695 @item The TCLBODY is several simple commands semi-colon seperated
3696 @item The TCLBODY is a multi-line @{curly-brace@} quoted string
3697 @item The TCLBODY is a string with variables that get expanded.
3698 @end enumerate
3700 In the end, when the target event FOO occurs the TCLBODY is
3701 evaluated. Method @b{#1} and @b{#2} are functionally identical. For
3702 Method @b{#3} and @b{#4} it is more interesting. What is the TCLBODY?
3704 Remember the parsing rules. In case #3, @{curly-braces@} mean the
3705 $VARS and [square-brackets] are expanded later, when the EVENT occurs,
3706 and the text is evaluated. In case #4, they are replaced before the
3707 ``Target Object Command'' is executed. This occurs at the same time
3708 $_TARGETNAME is replaced. In case #4 the date will never
3709 change. @{BTW: [date] is perhaps a bad example, as of 28/nov/2008,
3710 Jim/OpenOCD does not have a date command@}
3711 @end enumerate
3712 @subsection Global Variables
3713 @b{Where:} You might discover this when writing your own procs @* In
3714 simple terms: Inside a PROC, if you need to access a global variable
3715 you must say so. Also see ``upvar''. Example:
3716 @example
3717 proc myproc @{ @} @{
3718 set y 0 #Local variable Y
3719 global x #Global variable X
3720 puts [format "X=%d, Y=%d" $x $y]
3721 @}
3722 @end example
3723 @section Other Tcl Hacks
3724 @b{Dynamic Variable Creation}
3725 @example
3726 # Dynamically create a bunch of variables.
3727 for @{ set x 0 @} @{ $x < 32 @} @{ set x [expr $x + 1]@} @{
3728 # Create var name
3729 set vn [format "BIT%d" $x]
3730 # Make it a global
3731 global $vn
3732 # Set it.
3733 set $vn [expr (1 << $x)]
3734 @}
3735 @end example
3736 @b{Dynamic Proc/Command Creation}
3737 @example
3738 # One "X" function - 5 uart functions.
3739 foreach who @{A B C D E@}
3740 proc [format "show_uart%c" $who] @{ @} "show_UARTx $who"
3741 @}
3742 @end example
3744 @node Target library
3745 @chapter Target library
3746 @cindex Target library
3748 OpenOCD comes with a target configuration script library. These scripts can be
3749 used as-is or serve as a starting point.
3751 The target library is published together with the OpenOCD executable and
3752 the path to the target library is in the OpenOCD script search path.
3753 Similarly there are example scripts for configuring the JTAG interface.
3755 The command line below uses the example parport configuration scripts
3756 that ship with OpenOCD, then configures the str710.cfg target and
3757 finally issues the init and reset command. The communication speed
3758 is set to 10kHz for reset and 8MHz for post reset.
3761 @example
3762 openocd -f interface/parport.cfg -f target/str710.cfg -c "init" -c "reset"
3763 @end example
3766 To list the target scripts available:
3768 @example
3769 $ ls /usr/local/lib/openocd/target
3771 arm7_fast.cfg lm3s6965.cfg pxa255.cfg stm32.cfg xba_revA3.cfg
3772 at91eb40a.cfg lpc2148.cfg pxa255_sst.cfg str710.cfg zy1000.cfg
3773 at91r40008.cfg lpc2294.cfg sam7s256.cfg str912.cfg
3774 at91sam9260.cfg nslu2.cfg sam7x256.cfg wi-9c.cfg
3775 @end example
3779 @include fdl.texi
3781 @node OpenOCD Index
3782 @comment DO NOT use the plain word ``Index'', reason: CYGWIN filename
3783 @comment case issue with ``Index.html'' and ``index.html''
3784 @comment Occurs when creating ``--html --no-split'' output
3785 @comment This fix is based on:
3786 @unnumbered OpenOCD Index
3788 @printindex cp
3790 @bye

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 (RSA)