Laurentiu Cocanu - more help text
[openocd.git] / doc / openocd.texi
1 \input texinfo @c -*-texinfo-*-
2 @c %**start of header
3 @setfilename
4 @settitle Open On-Chip Debugger (OpenOCD)
5 @dircategory Development
6 @direntry
7 * OpenOCD: (openocd). Open On-Chip Debugger.
8 @end direntry
9 @c %**end of header
11 @include version.texi
13 @copying
14 Copyright @copyright{} 2007-2008 Spen @email{}@*
15 Copyright @copyright{} 2008 Oyvind Harboe @email{}
16 @quotation
17 Permission is granted to copy, distribute and/or modify this document
18 under the terms of the GNU Free Documentation License, Version 1.2 or
19 any later version published by the Free Software Foundation; with no
20 Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
21 Texts. A copy of the license is included in the section entitled ``GNU
22 Free Documentation License''.
23 @end quotation
24 @end copying
26 @titlepage
27 @title Open On-Chip Debugger (OpenOCD)
28 @subtitle Edition @value{EDITION} for OpenOCD version @value{VERSION}
29 @subtitle @value{UPDATED}
30 @page
31 @vskip 0pt plus 1filll
32 @insertcopying
33 @end titlepage
35 @contents
37 @node Top, About, , (dir)
38 @top OpenOCD
40 This manual documents edition @value{EDITION} of the Open On-Chip Debugger
41 (OpenOCD) version @value{VERSION}, @value{UPDATED}.
43 @insertcopying
45 @menu
46 * About:: About OpenOCD.
47 * Developers:: OpenOCD developers
48 * Building:: Building OpenOCD
49 * Running:: Running OpenOCD
50 * Configuration:: OpenOCD Configuration.
51 * Target library:: Target library
52 * Commands:: OpenOCD Commands
53 * Sample Scripts:: Sample Target Scripts
54 * GDB and OpenOCD:: Using GDB and OpenOCD
55 * TCL and OpenOCD:: Using TCL and OpenOCD
56 * TCL scripting API:: Tcl scripting API
57 * Upgrading:: Deprecated/Removed Commands
58 * FAQ:: Frequently Asked Questions
59 * License:: GNU Free Documentation License
60 * Index:: Main index.
61 @end menu
63 @node About
64 @unnumbered About
65 @cindex about
67 The Open On-Chip Debugger (OpenOCD) aims to provide debugging, in-system programming
68 and boundary-scan testing for embedded target devices. The targets are interfaced
69 using JTAG (IEEE 1149.1) compliant hardware, but this may be extended to other
70 connection types in the future.
72 OpenOCD currently supports Wiggler (clones), FTDI FT2232 based JTAG interfaces, the
73 Amontec JTAG Accelerator, and the Gateworks GW1602. It allows ARM7 (ARM7TDMI and ARM720t),
74 ARM9 (ARM920t, ARM922t, ARM926ej--s, ARM966e--s), XScale (PXA25x, IXP42x) and
75 Cortex-M3 (Luminary Stellaris LM3 and ST STM32) based cores to be debugged.
77 Flash writing is supported for external CFI compatible flashes (Intel and AMD/Spansion
78 command set) and several internal flashes (LPC2000, AT91SAM7, STR7x, STR9x, LM3
79 and STM32x). Preliminary support for using the LPC3180's NAND flash controller is included.
81 @node Developers
82 @chapter Developers
83 @cindex developers
85 OpenOCD was created by Dominic Rath as part of a diploma thesis written at the
86 University of Applied Sciences Augsburg (@uref{}).
87 Others interested in improving the state of free and open debug and testing technology
88 are welcome to participate.
90 Other developers have contributed support for additional targets and flashes as well
91 as numerous bugfixes and enhancements. See the AUTHORS file for regular contributors.
93 The main OpenOCD web site is available at @uref{}
95 @node Building
96 @chapter Building
97 @cindex building OpenOCD
99 If you are interested in getting actual work done rather than building
100 OpenOCD, then check if your interface supplier provides binaries for
101 you. Chances are that that binary is from some SVN version that is more
102 stable than SVN trunk where bleeding edge development takes place.
105 You can download the current SVN version with SVN client of your choice from the
106 following repositories:
108 (@uref{svn://})
110 or
112 (@uref{})
114 Using the SVN command line client, you can use the following command to fetch the
115 latest version (make sure there is no (non-svn) directory called "openocd" in the
116 current directory):
118 @smallexample
119 svn checkout svn:// openocd
120 @end smallexample
122 Building OpenOCD requires a recent version of the GNU autotools.
123 On my build system, I'm using autoconf 2.13 and automake 1.9. For building on Windows,
124 you have to use Cygwin. Make sure that your @env{PATH} environment variable contains no
125 other locations with Unix utils (like UnxUtils) - these can't handle the Cygwin
126 paths, resulting in obscure dependency errors (This is an observation I've gathered
127 from the logs of one user - correct me if I'm wrong).
129 You further need the appropriate driver files, if you want to build support for
130 a FTDI FT2232 based interface:
131 @itemize @bullet
132 @item @b{ftdi2232} libftdi (@uref{})
133 @item @b{ftd2xx} libftd2xx (@uref{})
134 @item When using the Amontec JTAGkey, you have to get the drivers from the Amontec
135 homepage (@uref{}), as the JTAGkey uses a non-standard VID/PID.
136 @end itemize
138 libftdi is supported under windows. Versions earlier than 0.13 will require patching.
139 see contrib/libftdi for more details.
141 In general, the D2XX driver provides superior performance (several times as fast),
142 but has the draw-back of being binary-only - though that isn't that bad, as it isn't
143 a kernel module, only a user space library.
145 To build OpenOCD (on both Linux and Cygwin), use the following commands:
146 @smallexample
147 ./bootstrap
148 @end smallexample
149 Bootstrap generates the configure script, and prepares building on your system.
150 @smallexample
151 ./configure
152 @end smallexample
153 Configure generates the Makefiles used to build OpenOCD.
154 @smallexample
155 make
156 @end smallexample
157 Make builds OpenOCD, and places the final executable in ./src/.
159 The configure script takes several options, specifying which JTAG interfaces
160 should be included:
162 @itemize @bullet
163 @item
164 @option{--enable-parport}
165 @item
166 @option{--enable-parport_ppdev}
167 @item
168 @option{--enable-parport_giveio}
169 @item
170 @option{--enable-amtjtagaccel}
171 @item
172 @option{--enable-ft2232_ftd2xx}
173 @footnote{Using the latest D2XX drivers from FTDI and following their installation
174 instructions, I had to use @option{--enable-ft2232_libftd2xx} for OpenOCD to
175 build properly.}
176 @item
177 @option{--enable-ft2232_libftdi}
178 @item
179 @option{--with-ftd2xx=/path/to/d2xx/}
180 @item
181 @option{--enable-gw16012}
182 @item
183 @option{--enable-usbprog}
184 @item
185 @option{--enable-presto_libftdi}
186 @item
187 @option{--enable-presto_ftd2xx}
188 @item
189 @option{--enable-jlink}
190 @end itemize
192 If you want to access the parallel port using the PPDEV interface you have to specify
193 both the @option{--enable-parport} AND the @option{--enable-parport_ppdev} option since
194 the @option{--enable-parport_ppdev} option actually is an option to the parport driver
195 (see @uref{} for more info).
197 Cygwin users have to specify the location of the FTDI D2XX package. This should be an
198 absolute path containing no spaces.
200 Linux users should copy the various parts of the D2XX package to the appropriate
201 locations, i.e. /usr/include, /usr/lib.
203 Miscellaneous configure options
205 @itemize @bullet
206 @item
207 @option{--enable-gccwarnings} - enable extra gcc warnings during build
208 @end itemize
210 @node Running
211 @chapter Running
212 @cindex running OpenOCD
213 @cindex --configfile
214 @cindex --debug_level
215 @cindex --logfile
216 @cindex --search
217 OpenOCD runs as a daemon, waiting for connections from clients (Telnet, GDB, Other).
218 Run with @option{--help} or @option{-h} to view the available command line switches.
220 It reads its configuration by default from the file openocd.cfg located in the current
221 working directory. This may be overwritten with the @option{-f <configfile>} command line
222 switch. The @option{-f} command line switch can be specified multiple times, in which case the config files
223 are executed in order.
225 Also it is possible to interleave commands w/config scripts using the @option{-c} command line switch.
227 To enable debug output (when reporting problems or working on OpenOCD itself), use
228 the @option{-d} command line switch. This sets the @option{debug_level} to "3", outputting
229 the most information, including debug messages. The default setting is "2", outputting
230 only informational messages, warnings and errors. You can also change this setting
231 from within a telnet or gdb session using @option{debug_level <n>} @xref{debug_level}.
233 You can redirect all output from the daemon to a file using the @option{-l <logfile>} switch.
235 Search paths for config/script files can be added to OpenOCD by using
236 the @option{-s <search>} switch. The current directory and the OpenOCD target library
237 is in the search path by default.
239 Note! OpenOCD will launch the GDB & telnet server even if it can not establish a connection
240 with the target. In general, it is possible for the JTAG controller to be unresponsive until
241 the target is set up correctly via e.g. GDB monitor commands in a GDB init script.
243 @node Configuration
244 @chapter Configuration
245 @cindex configuration
246 OpenOCD runs as a daemon, and reads it current configuration
247 by default from the file openocd.cfg in the current directory. A different configuration
248 file can be specified with the @option{-f <conf.file>} command line switch specified when starting OpenOCD.
250 The configuration file is used to specify on which ports the daemon listens for new
251 connections, the JTAG interface used to connect to the target, the layout of the JTAG
252 chain, the targets that should be debugged, and connected flashes.
254 @section Daemon configuration
256 @itemize @bullet
257 @item @b{init}
258 @*This command terminates the configuration stage and enters the normal
259 command mode. This can be useful to add commands to the startup scripts and commands
260 such as resetting the target, programming flash, etc. To reset the CPU upon startup,
261 add "init" and "reset" at the end of the config script or at the end of the
262 OpenOCD command line using the @option{-c} command line switch.
263 @cindex init
264 @item @b{telnet_port} <@var{number}>
265 @cindex telnet_port
266 @*Port on which to listen for incoming telnet connections
267 @item @b{tcl_port} <@var{number}>
268 @cindex tcl_port
269 @*Port on which to listen for incoming TCL syntax. This port is intended as
270 a simplified RPC connection that can be used by clients to issue commands
271 and get the output from the TCL engine.
272 @item @b{gdb_port} <@var{number}>
273 @cindex gdb_port
274 @*First port on which to listen for incoming GDB connections. The GDB port for the
275 first target will be gdb_port, the second target will listen on gdb_port + 1, and so on.
276 @item @b{gdb_breakpoint_override} <@var{hard|soft|disabled}>
277 @cindex gdb_breakpoint_override
278 @anchor{gdb_breakpoint_override}
279 @*Force breakpoint type for gdb 'break' commands.
280 The raison d'etre for this option is to support GDB GUI's without
281 a hard/soft breakpoint concept where the default OpenOCD and
282 GDB behaviour is not sufficient. Note that GDB will use hardware
283 breakpoints if the memory map has been set up for flash regions.
285 This option replaces older arm7_9 target commands that addressed
286 the same issue.
287 @item @b{gdb_detach} <@var{resume|reset|halt|nothing}>
288 @cindex gdb_detach
289 @*Configures what OpenOCD will do when gdb detaches from the daeman.
290 Default behaviour is <@var{resume}>
291 @item @b{gdb_memory_map} <@var{enable|disable}>
292 @cindex gdb_memory_map
293 @*Set to <@var{enable}> to cause OpenOCD to send the memory configuration to gdb when
294 requested. gdb will then know when to set hardware breakpoints, and program flash
295 using the gdb load command. @option{gdb_flash_program enable} will also need enabling
296 for flash programming to work.
297 Default behaviour is <@var{enable}>
298 @xref{gdb_flash_program}.
299 @item @b{gdb_flash_program} <@var{enable|disable}>
300 @cindex gdb_flash_program
301 @anchor{gdb_flash_program}
302 @*Set to <@var{enable}> to cause OpenOCD to program the flash memory when a
303 vFlash packet is received.
304 Default behaviour is <@var{enable}>
305 @end itemize
307 @section JTAG interface configuration
309 @itemize @bullet
310 @item @b{interface} <@var{name}>
311 @cindex interface
312 @*Use the interface driver <@var{name}> to connect to the target. Currently supported
313 interfaces are
314 @itemize @minus
315 @item @b{parport}
316 PC parallel port bit-banging (Wigglers, PLD download cable, ...)
317 @end itemize
318 @itemize @minus
319 @item @b{amt_jtagaccel}
320 Amontec Chameleon in its JTAG Accelerator configuration connected to a PC's EPP
321 mode parallel port
322 @end itemize
323 @itemize @minus
324 @item @b{ft2232}
325 FTDI FT2232 based devices using either the open-source libftdi or the binary only
326 FTD2XX driver. The FTD2XX is superior in performance, but not available on every
327 platform. The libftdi uses libusb, and should be portable to all systems that provide
328 libusb.
329 @end itemize
330 @itemize @minus
331 @item @b{ep93xx}
332 Cirrus Logic EP93xx based single-board computer bit-banging (in development)
333 @end itemize
334 @itemize @minus
335 @item @b{presto}
336 ASIX PRESTO USB JTAG programmer.
337 @end itemize
338 @itemize @minus
339 @item @b{usbprog}
340 usbprog is a freely programmable USB adapter.
341 @end itemize
342 @itemize @minus
343 @item @b{gw16012}
344 Gateworks GW16012 JTAG programmer.
345 @end itemize
346 @itemize @minus
347 @item @b{jlink}
348 Segger jlink usb adapter
349 @end itemize
350 @end itemize
352 @itemize @bullet
353 @item @b{jtag_speed} <@var{reset speed}>
354 @cindex jtag_speed
355 @*Limit the maximum speed of the JTAG interface. Usually, a value of zero means maximum
356 speed. The actual effect of this option depends on the JTAG interface used.
358 The speed used during reset can be adjusted using setting jtag_speed during
359 pre_reset and post_reset events.
360 @itemize @minus
362 @item wiggler: maximum speed / @var{number}
363 @item ft2232: 6MHz / (@var{number}+1)
364 @item amt jtagaccel: 8 / 2**@var{number}
365 @item jlink: maximum speed in kHz (0-12000), 0 will use RTCK
366 @end itemize
368 Note: Make sure the jtag clock is no more than @math{1/6th × CPU-Clock}. This is
369 especially true for synthesized cores (-S).
371 @item @b{jtag_khz} <@var{reset speed kHz}>
372 @cindex jtag_khz
373 @*Same as jtag_speed, except that the speed is specified in maximum kHz. If
374 the device can not support the rate asked for, or can not translate from
375 kHz to jtag_speed, then an error is returned. 0 means RTCK. If RTCK
376 is not supported, then an error is reported.
378 @item @b{reset_config} <@var{signals}> [@var{combination}] [@var{trst_type}] [@var{srst_type}]
379 @cindex reset_config
380 @*The configuration of the reset signals available on the JTAG interface AND the target.
381 If the JTAG interface provides SRST, but the target doesn't connect that signal properly,
382 then OpenOCD can't use it. <@var{signals}> can be @option{none}, @option{trst_only},
383 @option{srst_only} or @option{trst_and_srst}.
385 [@var{combination}] is an optional value specifying broken reset signal implementations.
386 @option{srst_pulls_trst} states that the testlogic is reset together with the reset of
387 the system (e.g. Philips LPC2000, "broken" board layout), @option{trst_pulls_srst} says
388 that the system is reset together with the test logic (only hypothetical, I haven't
389 seen hardware with such a bug, and can be worked around).
390 @option{combined} imples both @option{srst_pulls_trst} and @option{trst_pulls_srst}.
391 The default behaviour if no option given is @option{separate}.
393 The [@var{trst_type}] and [@var{srst_type}] parameters allow the driver type of the
394 reset lines to be specified. Possible values are @option{trst_push_pull} (default)
395 and @option{trst_open_drain} for the test reset signal, and @option{srst_open_drain}
396 (default) and @option{srst_push_pull} for the system reset. These values only affect
397 JTAG interfaces with support for different drivers, like the Amontec JTAGkey and JTAGAccelerator.
399 @item @b{jtag_device} <@var{IR length}> <@var{IR capture}> <@var{IR mask}> <@var{IDCODE instruction}>
400 @cindex jtag_device
401 @*Describes the devices that form the JTAG daisy chain, with the first device being
402 the one closest to TDO. The parameters are the length of the instruction register
403 (4 for all ARM7/9s), the value captured during Capture-IR (0x1 for ARM7/9), and a mask
404 of bits that should be validated when doing IR scans (all four bits (0xf) for ARM7/9).
405 The IDCODE instruction will in future be used to query devices for their JTAG
406 identification code. This line is the same for all ARM7 and ARM9 devices.
407 Other devices, like CPLDs, require different parameters. An example configuration
408 line for a Xilinx XC9500 CPLD would look like this:
409 @smallexample
410 jtag_device 8 0x01 0x0e3 0xfe
411 @end smallexample
412 The instruction register (IR) is 8 bits long, during Capture-IR 0x01 is loaded into
413 the IR, but only bits 0-1 and 5-7 should be checked, the others (2-4) might vary.
414 The IDCODE instruction is 0xfe.
416 @item @b{jtag_nsrst_delay} <@var{ms}>
417 @cindex jtag_nsrst_delay
418 @*How long (in milliseconds) OpenOCD should wait after deasserting nSRST before
419 starting new JTAG operations.
420 @item @b{jtag_ntrst_delay} <@var{ms}>
421 @cindex jtag_ntrst_delay
422 @*Same @b{jtag_nsrst_delay}, but for nTRST
424 The jtag_n[st]rst_delay options are useful if reset circuitry (like a reset supervisor,
425 or on-chip features) keep a reset line asserted for some time after the external reset
426 got deasserted.
427 @end itemize
429 @section parport options
431 @itemize @bullet
432 @item @b{parport_port} <@var{number}>
433 @cindex parport_port
434 @*Either the address of the I/O port (default: 0x378 for LPT1) or the number of
435 the @file{/dev/parport} device
437 When using PPDEV to access the parallel port, use the number of the parallel port:
438 @option{parport_port 0} (the default). If @option{parport_port 0x378} is specified
439 you may encounter a problem.
440 @item @b{parport_cable} <@var{name}>
441 @cindex parport_cable
442 @*The layout of the parallel port cable used to connect to the target.
443 Currently supported cables are
444 @itemize @minus
445 @item @b{wiggler}
446 @cindex wiggler
447 The original Wiggler layout, also supported by several clones, such
448 as the Olimex ARM-JTAG
449 @item @b{wiggler2}
450 @cindex wiggler2
451 Same as original wiggler except an led is fitted on D5.
452 @item @b{wiggler_ntrst_inverted}
453 @cindex wiggler_ntrst_inverted
454 Same as original wiggler except TRST is inverted.
455 @item @b{old_amt_wiggler}
456 @cindex old_amt_wiggler
457 The Wiggler configuration that comes with Amontec's Chameleon Programmer. The new
458 version available from the website uses the original Wiggler layout ('@var{wiggler}')
459 @item @b{chameleon}
460 @cindex chameleon
461 The Amontec Chameleon's CPLD when operated in configuration mode. This is only used to
462 program the Chameleon itself, not a connected target.
463 @item @b{dlc5}
464 @cindex dlc5
465 The Xilinx Parallel cable III.
466 @item @b{triton}
467 @cindex triton
468 The parallel port adapter found on the 'Karo Triton 1 Development Board'.
469 This is also the layout used by the HollyGates design
470 (see @uref{}).
471 @item @b{flashlink}
472 @cindex flashlink
473 The ST Parallel cable.
474 @item @b{arm-jtag}
475 @cindex arm-jtag
476 Same as original wiggler except SRST and TRST connections reversed and
477 TRST is also inverted.
478 @item @b{altium}
479 @cindex altium
480 Altium Universal JTAG cable.
481 @end itemize
482 @item @b{parport_write_on_exit} <@var{on}|@var{off}>
483 @cindex parport_write_on_exit
484 @*This will configure the parallel driver to write a known value to the parallel
485 interface on exiting OpenOCD
486 @end itemize
488 @section amt_jtagaccel options
489 @itemize @bullet
490 @item @b{parport_port} <@var{number}>
491 @cindex parport_port
492 @*Either the address of the I/O port (default: 0x378 for LPT1) or the number of the
493 @file{/dev/parport} device
494 @end itemize
495 @section ft2232 options
497 @itemize @bullet
498 @item @b{ft2232_device_desc} <@var{description}>
499 @cindex ft2232_device_desc
500 @*The USB device description of the FTDI FT2232 device. If not specified, the FTDI
501 default value is used. This setting is only valid if compiled with FTD2XX support.
502 @item @b{ft2232_serial} <@var{serial-number}>
503 @cindex ft2232_serial
504 @*The serial number of the FTDI FT2232 device. If not specified, the FTDI default
505 values are used.
506 @item @b{ft2232_layout} <@var{name}>
507 @cindex ft2232_layout
508 @*The layout of the FT2232 GPIO signals used to control output-enables and reset
509 signals. Valid layouts are
510 @itemize @minus
511 @item @b{usbjtag}
512 "USBJTAG-1" layout described in the original OpenOCD diploma thesis
513 @item @b{jtagkey}
514 Amontec JTAGkey and JTAGkey-tiny
515 @item @b{signalyzer}
516 Signalyzer
517 @item @b{olimex-jtag}
518 Olimex ARM-USB-OCD
519 @item @b{m5960}
520 American Microsystems M5960
521 @item @b{evb_lm3s811}
522 Luminary Micro EVB_LM3S811 as a JTAG interface (not onboard processor), no TRST or
523 SRST signals on external connector
524 @item @b{comstick}
525 Hitex STR9 comstick
526 @item @b{stm32stick}
527 Hitex STM32 Performance Stick
528 @item @b{flyswatter}
529 Tin Can Tools Flyswatter
530 @item @b{turtelizer2}
531 egnite Software turtelizer2
532 @item @b{oocdlink}
533 OOCDLink
534 @end itemize
536 @item @b{ft2232_vid_pid} <@var{vid}> <@var{pid}>
537 @*The vendor ID and product ID of the FTDI FT2232 device. If not specified, the FTDI
538 default values are used. Multiple <@var{vid}>, <@var{pid}> pairs may be given, eg.
539 @smallexample
540 ft2232_vid_pid 0x0403 0xcff8 0x15ba 0x0003
541 @end smallexample
542 @item @b{ft2232_latency} <@var{ms}>
543 @*On some systems using ft2232 based JTAG interfaces the FT_Read function call in
544 ft2232_read() fails to return the expected number of bytes. This can be caused by
545 USB communication delays and has proved hard to reproduce and debug. Setting the
546 FT2232 latency timer to a larger value increases delays for short USB packages but it
547 also reduces the risk of timeouts before receiving the expected number of bytes.
548 The OpenOCD default value is 2 and for some systems a value of 10 has proved useful.
549 @end itemize
551 @section ep93xx options
552 @cindex ep93xx options
553 Currently, there are no options available for the ep93xx interface.
555 @page
556 @section Target configuration
558 @itemize @bullet
559 @item @b{target} <@var{type}> <@var{endianess}> <@var{JTAG pos}>
560 <@var{variant}>
561 @cindex target
562 @*Defines a target that should be debugged. Currently supported types are:
563 @itemize @minus
564 @item @b{arm7tdmi}
565 @item @b{arm720t}
566 @item @b{arm9tdmi}
567 @item @b{arm920t}
568 @item @b{arm922t}
569 @item @b{arm926ejs}
570 @item @b{arm966e}
571 @item @b{cortex_m3}
572 @item @b{feroceon}
573 @item @b{xscale}
574 @item @b{mips_m4k}
575 @end itemize
577 If you want to use a target board that is not on this list, see Adding a new
578 target board
580 Endianess may be @option{little} or @option{big}.
582 @item @b{target_script} <@var{target#}> <@var{event}> <@var{script_file}>
583 @cindex target_script
584 @*Event is one of the following:
585 @option{pre_reset}, @option{reset}, @option{post_reset}, @option{post_halt},
586 @option{pre_resume} or @option{gdb_program_config}.
587 @option{post_reset} and @option{reset} will produce the same results.
589 @item @b{working_area} <@var{target#}> <@var{address}> <@var{size}> <@var{backup}|@var{nobackup}> [@option{virtual address}]
590 @cindex working_area
591 @*Specifies a working area for the debugger to use. This may be used to speed-up
592 downloads to target memory and flash operations, or to perform otherwise unavailable
593 operations (some coprocessor operations on ARM7/9 systems, for example). The last
594 parameter decides whether the memory should be preserved (<@var{backup}>) or can simply be overwritten (<@var{nobackup}>). If possible, use
595 a working_area that doesn't need to be backed up, as performing a backup slows down operation.
596 @end itemize
598 @subsection arm7tdmi options
599 @cindex arm7tdmi options
600 target arm7tdmi <@var{endianess}> <@var{jtag#}>
601 @*The arm7tdmi target definition requires at least one additional argument, specifying
602 the position of the target in the JTAG daisy-chain. The first JTAG device is number 0.
603 The optional [@var{variant}] parameter has been removed in recent versions.
604 The correct feature set is determined at runtime.
606 @subsection arm720t options
607 @cindex arm720t options
608 ARM720t options are similar to ARM7TDMI options.
610 @subsection arm9tdmi options
611 @cindex arm9tdmi options
612 ARM9TDMI options are similar to ARM7TDMI options. Supported variants are
613 @option{arm920t}, @option{arm922t} and @option{arm940t}.
614 This enables the hardware single-stepping support found on these cores.
616 @subsection arm920t options
617 @cindex arm920t options
618 ARM920t options are similar to ARM9TDMI options.
620 @subsection arm966e options
621 @cindex arm966e options
622 ARM966e options are similar to ARM9TDMI options.
624 @subsection cortex_m3 options
625 @cindex cortex_m3 options
626 use variant <@var{variant}> @option{lm3s} when debugging luminary lm3s targets. This will cause
627 openocd to use a software reset rather than asserting SRST to avoid a issue with clearing
628 the debug registers. This is fixed in Fury Rev B, DustDevil Rev B, Tempest, these revisions will
629 be detected and the normal reset behaviour used.
631 @subsection xscale options
632 @cindex xscale options
633 Supported variants are @option{ixp42x}, @option{ixp45x}, @option{ixp46x},
634 @option{pxa250}, @option{pxa255}, @option{pxa26x}.
636 @section Flash configuration
637 @cindex Flash configuration
639 @itemize @bullet
640 @item @b{flash bank} <@var{driver}> <@var{base}> <@var{size}> <@var{chip_width}>
641 <@var{bus_width}> <@var{target#}> [@var{driver_options ...}]
642 @cindex flash bank
643 @*Configures a flash bank at <@var{base}> of <@var{size}> bytes and <@var{chip_width}>
644 and <@var{bus_width}> bytes using the selected flash <driver>.
645 @end itemize
647 @subsection lpc2000 options
648 @cindex lpc2000 options
650 @b{flash bank lpc2000} <@var{base}> <@var{size}> 0 0 <@var{target#}> <@var{variant}>
651 <@var{clock}> [@var{calc_checksum}]
652 @*LPC flashes don't require the chip and bus width to be specified. Additional
653 parameters are the <@var{variant}>, which may be @var{lpc2000_v1} (older LPC21xx and LPC22xx)
654 or @var{lpc2000_v2} (LPC213x, LPC214x, LPC210[123], LPC23xx and LPC24xx), the number
655 of the target this flash belongs to (first is 0), the frequency at which the core
656 is currently running (in kHz - must be an integral number), and the optional keyword
657 @var{calc_checksum}, telling the driver to calculate a valid checksum for the exception
658 vector table.
660 @subsection cfi options
661 @cindex cfi options
663 @b{flash bank cfi} <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}>
664 <@var{target#}> [@var{jedec_probe}|@var{x16_as_x8}]
665 @*CFI flashes require the number of the target they're connected to as an additional
666 argument. The CFI driver makes use of a working area (specified for the target)
667 to significantly speed up operation.
669 @var{chip_width} and @var{bus_width} are specified in bytes.
671 The @var{jedec_probe} option is used to detect certain non-CFI flash roms, like AM29LV010 and similar types.
673 @var{x16_as_x8} ???
675 @subsection at91sam7 options
676 @cindex at91sam7 options
678 @b{flash bank at91sam7} 0 0 0 0 <@var{target#}>
679 @*AT91SAM7 flashes only require the @var{target#}, all other values are looked up after
680 reading the chip-id and type.
682 @subsection str7 options
683 @cindex str7 options
685 @b{flash bank str7x} <@var{base}> <@var{size}> 0 0 <@var{target#}> <@var{variant}>
686 @*variant can be either STR71x, STR73x or STR75x.
688 @subsection str9 options
689 @cindex str9 options
691 @b{flash bank str9x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
692 @*The str9 needs the flash controller to be configured prior to Flash programming, eg.
693 @smallexample
694 str9x flash_config 0 4 2 0 0x80000
695 @end smallexample
696 This will setup the BBSR, NBBSR, BBADR and NBBADR registers respectively.
698 @subsection str9 options (str9xpec driver)
700 @b{flash bank str9xpec} <@var{base}> <@var{size}> 0 0 <@var{target#}>
701 @*Before using the flash commands the turbo mode will need enabling using str9xpec
702 @option{enable_turbo} <@var{num>.}
704 Only use this driver for locking/unlocking the device or configuring the option bytes.
705 Use the standard str9 driver for programming.
707 @subsection stellaris (LM3Sxxx) options
708 @cindex stellaris (LM3Sxxx) options
710 @b{flash bank stellaris} <@var{base}> <@var{size}> 0 0 <@var{target#}>
711 @*stellaris flash plugin only require the @var{target#}.
713 @subsection stm32x options
714 @cindex stm32x options
716 @b{flash bank stm32x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
717 @*stm32x flash plugin only require the @var{target#}.
719 @subsection aduc702x options
720 @cindex aduc702x options
722 @b{flash bank aduc702x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
723 @*aduc702x flash plugin require the flash @var{base}, @var{size} and @var{target#}.
725 @section mFlash configuration
726 @cindex mFlash configuration
728 @itemize @bullet
729 @item @b{mflash bank} <@var{soc}> <@var{base}> <@var{chip_width}> <@var{bus_width}>
730 <@var{RST pin}> <@var{WP pin}> <@var{DPD pin}> <@var{target #}>
731 @cindex mflash bank
732 @*Configures a mflash for <@var{soc}> host bank at <@var{base}>. <@var{chip_width}> and
733 <@var{bus_width}> are bytes order. Pin number format is dependent on host GPIO calling convention.
734 If WP or DPD pin was not used, write -1. Currently, mflash bank support s3c2440 and pxa270.
735 @end itemize
736 (ex. of s3c2440) mflash <@var{RST pin}> is GPIO B1, <@var{WP pin}> and <@var{DPD pin}> are not used.
737 @smallexample
738 mflash bank s3c2440 0x10000000 2 2 1b -1 -1 0
739 @end smallexample
740 (ex. of pxa270) mflash <@var{RST pin}> is GPIO 43, <@var{DPD pin}> is not used and <@var{DPD pin}> is GPIO 51.
741 @smallexample
742 mflash bank pxa270 0x08000000 2 2 43 -1 51 0
743 @end smallexample
745 @node Target library
746 @chapter Target library
747 @cindex Target library
749 OpenOCD comes with a target configuration script library. These scripts can be
750 used as-is or serve as a starting point.
752 The target library is published together with the openocd executable and
753 the path to the target library is in the OpenOCD script search path.
754 Similarly there are example scripts for configuring the JTAG interface.
756 The command line below uses the example parport configuration scripts
757 that ship with OpenOCD, then configures the str710.cfg target and
758 finally issues the init and reset command. The communication speed
759 is set to 10kHz for reset and 8MHz for post reset.
762 @smallexample
763 openocd -f interface/parport.cfg -f target/str710.cfg -c "init" -c "reset"
764 @end smallexample
767 To list the target scripts available:
769 @smallexample
770 $ ls /usr/local/lib/openocd/target
772 arm7_fast.cfg lm3s6965.cfg pxa255.cfg stm32.cfg xba_revA3.cfg
773 at91eb40a.cfg lpc2148.cfg pxa255_sst.cfg str710.cfg zy1000.cfg
774 at91r40008.cfg lpc2294.cfg sam7s256.cfg str912.cfg
775 at91sam9260.cfg nslu2.cfg sam7x256.cfg wi-9c.cfg
776 @end smallexample
779 @node Commands
780 @chapter Commands
781 @cindex commands
783 OpenOCD allows user interaction through a GDB server (default: port 3333),
784 a telnet interface (default: port 4444), and a TCL interface (default: port 5555). The command line interpreter
785 is available from both the telnet interface and a GDB session. To issue commands to the
786 interpreter from within a GDB session, use the @option{monitor} command, e.g. use
787 @option{monitor poll} to issue the @option{poll} command. All output is relayed through the
788 GDB session.
790 The TCL interface is used as a simplified RPC mechanism that feeds all the
791 input into the TCL interpreter and returns the output from the evaluation of
792 the commands.
794 @section Daemon
796 @itemize @bullet
797 @item @b{sleep} <@var{msec}>
798 @cindex sleep
799 @*Wait for n milliseconds before resuming. Useful in connection with script files
800 (@var{script} command and @var{target_script} configuration).
802 @item @b{shutdown}
803 @cindex shutdown
804 @*Close the OpenOCD daemon, disconnecting all clients (GDB, Telnet, Other).
806 @item @b{debug_level} [@var{n}]
807 @cindex debug_level
808 @anchor{debug_level}
809 @*Display or adjust debug level to n<0-3>
811 @item @b{fast} [@var{enable|disable}]
812 @cindex fast
813 @*Default disabled. Set default behaviour of OpenOCD to be "fast and dangerous". For instance ARM7/9 DCC memory
814 downloads and fast memory access will work if the JTAG interface isn't too fast and
815 the core doesn't run at a too low frequency. Note that this option only changes the default
816 and that the indvidual options, like DCC memory downloads, can be enabled and disabled
817 individually.
819 The target specific "dangerous" optimisation tweaking options may come and go
820 as more robust and user friendly ways are found to ensure maximum throughput
821 and robustness with a minimum of configuration.
823 Typically the "fast enable" is specified first on the command line:
825 @smallexample
826 openocd -c "fast enable" -c "interface dummy" -f target/str710.cfg
827 @end smallexample
829 @item @b{log_output} <@var{file}>
830 @cindex log_output
831 @*Redirect logging to <file> (default: stderr)
833 @item @b{script} <@var{file}>
834 @cindex script
835 @*Execute commands from <file>
837 @end itemize
839 @subsection Target state handling
840 @itemize @bullet
841 @item @b{power} <@var{on}|@var{off}>
842 @cindex reg
843 @*Turn power switch to target on/off.
844 No arguments: print status.
847 @item @b{reg} [@option{#}|@option{name}] [value]
848 @cindex reg
849 @*Access a single register by its number[@option{#}] or by its [@option{name}].
850 No arguments: list all available registers for the current target.
851 Number or name argument: display a register
852 Number or name and value arguments: set register value
854 @item @b{poll} [@option{on}|@option{off}]
855 @cindex poll
856 @*Poll the target for its current state. If the target is in debug mode, architecture
857 specific information about the current state is printed. An optional parameter
858 allows continuous polling to be enabled and disabled.
860 @item @b{halt} [@option{ms}]
861 @cindex halt
862 @*Send a halt request to the target and wait for it to halt for up to [@option{ms}] milliseconds.
863 Default [@option{ms}] is 5 seconds if no arg given.
864 Optional arg @option{ms} is a timeout in milliseconds. Using 0 as the [@option{ms}]
865 will stop OpenOCD from waiting.
867 @item @b{wait_halt} [@option{ms}]
868 @cindex wait_halt
869 @*Wait for the target to enter debug mode. Optional [@option{ms}] is
870 a timeout in milliseconds. Default [@option{ms}] is 5 seconds if no
871 arg given.
873 @item @b{resume} [@var{address}]
874 @cindex resume
875 @*Resume the target at its current code position, or at an optional address.
876 OpenOCD will wait 5 seconds for the target to resume.
878 @item @b{step} [@var{address}]
879 @cindex step
880 @*Single-step the target at its current code position, or at an optional address.
882 @item @b{reset} [@option{run}|@option{halt}|@option{init}]
883 @cindex reset
884 @*Perform a hard-reset. The optional parameter specifies what should happen after the reset.
886 With no arguments a "reset run" is executed
887 @itemize @minus
888 @item @b{run}
889 @cindex reset run
890 @*Let the target run.
891 @item @b{halt}
892 @cindex reset halt
893 @*Immediately halt the target (works only with certain configurations).
894 @item @b{init}
895 @cindex reset init
896 @*Immediately halt the target, and execute the reset script (works only with certain
897 configurations)
898 @end itemize
900 @item @b{soft_reset_halt}
901 @cindex reset
902 @*Requesting target halt and executing a soft reset.
903 @end itemize
905 @subsection Memory access commands
906 @itemize @bullet
907 @item @b{meminfo}
909 display available ram memory.
910 @end itemize
911 These commands allow accesses of a specific size to the memory system:
912 @itemize @bullet
913 @item @b{mdw} <@var{addr}> [@var{count}]
914 @cindex mdw
915 @*display memory words
916 @item @b{mdh} <@var{addr}> [@var{count}]
917 @cindex mdh
918 @*display memory half-words
919 @item @b{mdb} <@var{addr}> [@var{count}]
920 @cindex mdb
921 @*display memory bytes
922 @item @b{mww} <@var{addr}> <@var{value}>
923 @cindex mww
924 @*write memory word
925 @item @b{mwh} <@var{addr}> <@var{value}>
926 @cindex mwh
927 @*write memory half-word
928 @item @b{mwb} <@var{addr}> <@var{value}>
929 @cindex mwb
930 @*write memory byte
932 @item @b{load_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
933 @cindex load_image
934 @anchor{load_image}
935 @*Load image <@var{file}> to target memory at <@var{address}>
936 @item @b{fast_load_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
937 @cindex fast_load_image
938 @anchor{fast_load_image}
939 @*Same functionality and arguments as load_image, but image is stored in memory
940 @item @b{fast_load}
941 @cindex fast_image
942 @anchor{fast_image}
943 @*Load active fast load image to current target
944 @item @b{dump_image} <@var{file}> <@var{address}> <@var{size}>
945 @cindex dump_image
946 @anchor{dump_image}
947 @*Dump <@var{size}> bytes of target memory starting at <@var{address}> to a
948 (binary) <@var{file}>.
949 @item @b{verify_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
950 @cindex verify_image
951 @*Verify <@var{file}> against target memory starting at <@var{address}>.
952 This will first attempt comparison using a crc checksum, if this fails it will try a binary compare.
953 @end itemize
955 @subsection Breakpoint commands
956 @cindex Breakpoint commands
957 @itemize @bullet
958 @item @b{bp} <@var{addr}> <@var{len}> [@var{hw}]
959 @cindex bp
960 @*set breakpoint <address> <length> [hw]
961 @item @b{rbp} <@var{addr}>
962 @cindex rbp
963 @*remove breakpoint <adress>
964 @item @b{wp} <@var{addr}> <@var{len}> <@var{r}|@var{w}|@var{a}> [@var{value}] [@var{mask}]
965 @cindex wp
966 @*set watchpoint <address> <length> <r/w/a> [value] [mask]
967 @item @b{rwp} <@var{addr}>
968 @cindex rwp
969 @*remove watchpoint <adress>
970 @end itemize
972 @subsection Flash commands
973 @cindex Flash commands
974 @itemize @bullet
975 @item @b{flash banks}
976 @cindex flash banks
977 @*List configured flash banks
978 @item @b{flash info} <@var{num}>
979 @cindex flash info
980 @*Print info about flash bank <@option{num}>
981 @item @b{flash probe} <@var{num}>
982 @cindex flash probe
983 @*Identify the flash, or validate the parameters of the configured flash. Operation
984 depends on the flash type.
985 @item @b{flash erase_check} <@var{num}>
986 @cindex flash erase_check
987 @*Check erase state of sectors in flash bank <@var{num}>. This is the only operation that
988 updates the erase state information displayed by @option{flash info}. That means you have
989 to issue an @option{erase_check} command after erasing or programming the device to get
990 updated information.
991 @item @b{flash protect_check} <@var{num}>
992 @cindex flash protect_check
993 @*Check protection state of sectors in flash bank <num>.
994 @option{flash erase_sector} using the same syntax.
995 @item @b{flash erase_sector} <@var{num}> <@var{first}> <@var{last}>
996 @cindex flash erase_sector
997 @anchor{flash erase_sector}
998 @*Erase sectors at bank <@var{num}>, starting at sector <@var{first}> up to and including
999 <@var{last}>. Sector numbering starts at 0. Depending on the flash type, erasing may
1000 require the protection to be disabled first (e.g. Intel Advanced Bootblock flash using
1001 the CFI driver).
1002 @item @b{flash erase_address} <@var{address}> <@var{length}>
1003 @cindex flash erase_address
1004 @*Erase sectors starting at <@var{address}> for <@var{length}> bytes
1005 @item @b{flash write_bank} <@var{num}> <@var{file}> <@var{offset}>
1006 @cindex flash write_bank
1007 @anchor{flash write_bank}
1008 @*Write the binary <@var{file}> to flash bank <@var{num}>, starting at
1009 <@option{offset}> bytes from the beginning of the bank.
1010 @item @b{flash write_image} [@var{erase}] <@var{file}> [@var{offset}] [@var{type}]
1011 @cindex flash write_image
1012 @anchor{flash write_image}
1013 @*Write the image <@var{file}> to the current target's flash bank(s). A relocation
1014 [@var{offset}] can be specified and the file [@var{type}] can be specified
1015 explicitly as @option{bin} (binary), @option{ihex} (Intel hex), @option{elf}
1016 (ELF file) or @option{s19} (Motorola s19). Flash memory will be erased prior to programming
1017 if the @option{erase} parameter is given.
1018 @item @b{flash protect} <@var{num}> <@var{first}> <@var{last}> <@option{on}|@option{off}>
1019 @cindex flash protect
1020 @*Enable (@var{on}) or disable (@var{off}) protection of flash sectors <@var{first}> to
1021 <@var{last}> of @option{flash bank} <@var{num}>.
1022 @end itemize
1024 @subsection mFlash commands
1025 @cindex mFlash commands
1026 @itemize @bullet
1027 @item @b{mflash probe}
1028 @cindex mflash probe
1029 Probe mflash.
1030 @item @b{mflash write} <@var{num}> <@var{file}> <@var{offset}>
1031 @cindex mflash write
1032 Write the binary <@var{file}> to mflash bank <@var{num}>, starting at
1033 <@var{offset}> bytes from the beginning of the bank.
1034 @item @b{mflash dump} <@var{num}> <@var{file}> <@var{offset}> <@var{size}>
1035 @cindex mflash dump
1036 Dump <size> bytes, starting at <@var{offset}> bytes from the beginning of the <@var{num}> bank
1037 to a <@var{file}>.
1038 @end itemize
1040 @page
1041 @section Target Commands
1042 @cindex Target Commands
1044 @subsection Overview
1045 @cindex Overview
1046 Pre "TCL" - many commands in OpenOCD where implemented as C functions. Post "TCL"
1047 (Jim-Tcl to be more exact, June 2008) TCL became a bigger part of OpenOCD.
1049 One of the biggest changes is the introduction of 'target specific'
1050 commands. When every time you create a target, a special command name is
1051 created specifically for that target.
1052 For example - in TCL/TK - if you create a button (or any other screen object) you
1053 can specify various "button configuration parameters". One of those parameters is
1054 the "object cmd/name" [ In TK - this is referred to as the object path ]. Later
1055 you can use that 'path' as a command to modify the button, for example to make it
1056 "grey", or change the color. In effect, the "path" function is an 'object
1057 oriented command'. The TCL change in OpenOCD follows the same principle, you create
1058 a target, and a specific "targetname" command is created.
1060 There are two methods of creating a target:
1062 @enumerate
1063 @item
1064 Using the old syntax (deprecated). Target names are autogenerated as:
1065 "target0", "target1", etc.;
1066 @cindex old syntax
1067 @item
1068 Using the new syntax, you can specify the name of the target.
1069 @cindex new syntax
1070 @end enumerate
1072 As most users will have a single JTAG target, and by default the command name will
1073 probably default to "target0", thus for reasons of simplicity the instructions below
1074 use the name "target0".
1076 @subsection Commands
1077 @cindex Commands
1078 OpenOCD has the following 'target' or 'target-like' commands:
1080 @enumerate
1081 @item
1082 @b{targets (plural)} - lists all known targets and a little bit of information about each
1083 target, most importantly the target *COMMAND*NAME* (it also lists the target number);
1084 @cindex targets
1085 @item
1086 @b{target (singular)} - used to create, configure list, etc the targets;
1087 @cindex target
1088 @item
1089 @b{target0} - the command object for the first target. Unless you specified another name.
1090 @cindex target0
1091 @end enumerate
1093 @subsubsection Targets Command
1094 @cindex Targets Command
1095 The "targets" command has 2 functions:
1097 @itemize
1098 @item
1099 With a parameter, you can change the current command line target.
1101 NOTE: "with a parameter" is really only useful with 'multiple JTAG targets' not something
1102 you normally encounter (ie: If you had 2 arm chips - sharing the same JTAG chain).
1103 @verbatim
1104 # using a target name.
1105 (gdb) mon targets target0
1106 # or a target by number.
1107 (gdb) mon targets 3
1108 @end verbatim
1109 @cindex with a parameter
1110 @item
1111 Plain, without any parameter lists targets, for example:
1113 @verbatim
1114 (gdb) mon targets
1115 CmdName Type Endian ChainPos State
1116 -- ---------- ---------- ---------- -------- ----------
1117 0: target0 arm7tdmi little 0 halted
1118 @end verbatim
1120 This shows:
1121 @enumerate a
1122 @item
1123 in this example, a single target;
1124 @item
1125 target number 0 (1st column);
1126 @item
1127 the 'object name' is target0 (the default name);
1128 @item
1129 it is an arm7tdmi;
1130 @item
1131 little endian;
1132 @item
1133 the position in the JTAG chain;
1134 @item
1135 and is currently halted.
1136 @end enumerate
1137 @cindex without any parameter
1138 @end itemize
1140 @subsubsection Target Command
1141 @cindex Target Command
1143 The "target" command has the following options:
1144 @itemize
1145 @item
1146 target create
1148 @verbatim
1149 target create CMDNAME TYPE ... config options ...
1150 argv[0] = 'target'
1151 argv[1] = 'create'
1152 argv[2] = the 'object command'
1153 (normally, target0, see (3) above)
1154 argv[3] = the target type, ie: arm7tdmi
1155 argv[4..N] = configuration parameters
1156 @end verbatim
1157 @item
1158 target types
1160 Lists all supported target types; ie: arm7tdmi, xscale, fericon, cortex-m3.
1161 The result TCL list of all known target types (and is human readable).
1162 @item
1163 target names
1165 Returns a TCL list of all known target commands (and is human readable).
1167 Example:
1168 @verbatim
1169 foreach t [target names] {
1170 puts [format "Target: %s\n" $t]
1171 }
1172 @end verbatim
1173 @item
1174 target current
1176 Returns the TCL command name of the current target.
1178 Example:
1179 @verbatim
1180 set ct [target current]
1181 set t [$ct cget -type]
1183 puts "Current target name is: $ct, and is a: $t"
1184 @end verbatim
1185 @item
1186 target number <VALUE>
1188 Returns the TCL command name of the specified target.
1190 Example
1191 @verbatim
1192 set thename [target number $x]
1193 puts [format "Target %d is: %s\n" $x $thename]
1194 @end verbatim
1195 For instance, assuming the defaults
1196 @verbatim
1197 target number 0
1198 @end verbatim
1199 Would return 'target0' (or whatever you called it)
1200 @item
1201 target count
1203 Returns the larget+1 target number.
1205 Example:
1206 @verbatim
1207 set c [target count]
1208 for { set x 0 } { $x < $c } { incr x } {
1209 # Assuming you have this function..
1210 print_target_details $x
1211 }
1212 @end verbatim
1213 @end itemize
1215 @subsubsection Target0 Command
1216 @cindex Target0 Command
1217 The "target0" command (the "Target Object" command):
1219 Once a target is 'created' a command object by that targets name is created, for example
1220 @verbatim
1221 target create BiGRed arm7tdmi -endian little -chain-position 3
1222 @end verbatim
1224 Would create a [case sensitive] "command" BiGRed
1226 If you use the old [deprecated] syntax, the name is automatically
1227 generated and is in the form:
1228 @verbatim
1229 target0, target1, target2, target3, ... etc.
1230 @end verbatim
1232 @subsubsection Target CREATE, CONFIGURE and CGET Options Command
1233 @cindex Target CREATE, CONFIGURE and CGET Options Command
1234 The commands:
1235 @verbatim
1236 target create CMDNAME TYPE [configure-options]
1237 CMDNAME configure [configure-options]
1238 CMDNAME cget [configure-options]
1239 @end verbatim
1240 @itemize
1241 @item
1242 In the 'create' case, one is creating the target and can specify any
1243 number of configuration parameters.
1244 @item
1245 In the 'CMDNAME configure' case, one can change the setting [Not all things can, or should be changed].
1246 @item
1247 In the 'CMDNAME cget' case, the goal is to query the target for a
1248 specific configuration option.
1249 @end itemize
1251 In the above, the "default" name target0 is 'target0'.
1253 Example:
1255 From the (gdb) prompt, one can type this:
1257 @verbatim
1258 (gdb) mon target0 configure -endian big
1259 @end verbatim
1261 And change target0 to 'big-endian'. This is a contrived example,
1262 specifically for this document - don't expect changing endian
1263 'mid-operation' to work you should set the endian at creation.
1265 Known options [30/august/2008] are:
1266 @itemize
1267 @item
1268 [Mandatory 'create' Options]
1269 @itemize
1270 @item
1271 type arm7tdmi|arm720|etc ...
1272 @item
1273 chain-position NUMBER
1274 @item
1275 endian ENDIAN
1276 @end itemize
1277 @item
1278 Optional
1279 @itemize
1280 @item
1281 event EVENTNAME "tcl-action"
1282 @item
1283 reset RESETACTION
1284 @item
1285 work-area-virt ADDR
1286 @item
1287 work-area-phys ADDR
1288 @item
1289 work-area-size ADDR
1290 @item
1291 work-area-backup BOOLEAN
1292 @end itemize
1293 @end itemize
1294 Hint: To get a list of available options, try this:
1295 @verbatim
1296 (gdb) mon target0 cget -BLAHBLAHBLAH
1297 @end verbatim
1299 the above causes an error - and a helpful list of valid options.
1301 One can query any of the above options at run time, for example:
1302 @verbatim
1303 (gdb) mon target0 cget -OPTION [param]
1304 @end verbatim
1306 Example TCL script
1308 @verbatim
1309 # For all targets...
1310 set c [target count]
1311 for { set x 0 } { $x < $c } { incr x ] {
1312 set n [target number $x]
1313 set t [$n cget -type]
1314 set e [$n cget -endian]
1315 puts [format "%d: %s, %s, endian: %s\n" $x $n $t $n]
1316 }
1317 @end verbatim
1319 Might produce:
1321 @verbatim
1322 0: pic32chip, mips_m4k, endain: little
1323 1: arm7, arm7tdmi, endian: big
1324 2: blackfin, bf534, endian: little
1325 @end verbatim
1327 Notice the above example is not target0, target1, target2 Why? Because in this contrived multi-target example -
1328 more human understandable target names might be helpful.
1330 For example these two are the same:
1332 @verbatim
1333 (gdb) mon blackfin configure -event FOO {puts "Hi mom"}
1334 @end verbatim
1336 or:
1338 @verbatim
1339 (gdb) mon [target number 2] configure -event FOO {puts "Hi mom"}
1340 @end verbatim
1342 In the second case, we use [] to get the command name of target #2, in this contrived example - it is "blackfin".
1344 Two important configuration options are:
1346 "-event" and "-reset"
1348 The "-reset" option specifies what should happen when the chip is reset, for example should it 'halt', 're-init',
1349 or what.
1351 The "-event" option less you specify a TCL command to occur when a specific event occurs.
1353 @subsubsection Other Target Commands
1354 @cindex Other Target Commands
1355 @itemize
1356 @item @b{profile} <@var{seconds}> <@var{gmon.out}>
1358 Profiling samples the CPU PC as quickly as OpenOCD is able, which will be used as a random sampling of PC.
1359 @end itemize
1361 @subsection Target Events
1362 @cindex Target Events
1364 @subsubsection Overview
1365 @cindex Overview
1366 At various points in time - certain 'target' events happen. You can create a custom event action to occur at that time.
1367 For example - after reset, the PLLs and CLOCKs may need to be reconfigured, or perhaps the SDRAM needs to be re-initialized.
1368 Often the easiest way to do that is to create a simple script file containing the series of (mww [poke memory]) commands
1369 you would type by hand, to reconfigure the target clocks. You could specify the "event action" like this:
1371 @verbatim
1372 (gdb) mon target0 configure -event reset-init "script cfg.clocks"
1373 @end verbatim
1375 In the above example, when the event "reset-init" occurs, the "action-string" will be evaluated as if you typed it at the
1376 console:
1377 @itemize
1378 @item @b{Option1} - The simple approach (above) is to create a script file with lots of "mww" (memory write word) commands
1379 to configure your targets clocks and/or external memory;
1380 @item @b{Option2} - You can instead create a fancy TCL procedure and invoke that procedure instead of sourcing a file [In fact,
1381 "script" is a TCL procedure that loads a file].
1382 @end itemize
1384 @subsubsection Details
1385 @cindex Details
1386 There are many events one could use, to get a current list of events type the following invalid command, you'll get a helpful
1387 "runtime error" message, see below [list valid as of 30/august/2008]:
1389 @verbatim
1390 (gdb) mon target0 cget -event FAFA
1391 Runtime error, file "../../../openocd23/src/helper/command.c", line 433:
1392 -event: Unknown: FAFA, try one of: old-pre_reset,
1393 old-gdb_program_config, old-post_reset, halted,
1394 resumed, resume-start, resume-end, reset-start,
1395 reset-assert-pre, reset-assert-post,
1396 reset-deassert-pre, reset-deassert-post,
1397 reset-halt-pre, reset-halt-post, reset-wait-pre,
1398 reset-wait-post, reset-init, reset-end,
1399 examine-start, examine-end, debug-halted,
1400 debug-resumed, gdb-attach, gdb-detach,
1401 gdb-flash-write-start, gdb-flash-write-end,
1402 gdb-flash-erase-start, gdb-flash-erase-end,
1403 resume-start, resume-ok, or resume-end
1404 @end verbatim
1406 NOTE: The event-names "old-*" are deprecated and exist only to help old scripts continue to function, and the old "target_script"
1407 command to work. Please do not rely on them.
1409 These are some other important names:
1410 @itemize
1411 @item gdb-flash-erase-start
1412 @item gdb-flash-erase-end
1413 @item gdb-flash-write-start
1414 @item gdb-flash-write-end
1415 @end itemize
1417 These occur when GDB/OpenOCD attempts to erase & program the FLASH chip via GDB. For example - some PCBs may have a simple GPIO
1418 pin that acts like a "flash write protect" you might need to write a script that disables "write protect".
1420 To get a list of current 'event actions', type the following command:
1422 @verbatim
1423 (gdb) mon target0 eventlist
1425 Event actions for target (0) target0
1427 Event | Body
1428 ------------------------- | ----------------------------------------
1429 old-post_reset | script event/sam7x256_reset.script
1430 @end verbatim
1432 Here is a simple example for all targets:
1434 @verbatim
1435 (gdb) mon foreach x [target names] { $x eventlist }
1436 @end verbatim
1438 The above uses some TCL tricks:
1439 @enumerate a
1440 @item foreach VARIABLE LIST BODY
1441 @item to generate the list, we use [target names]
1442 @item the BODY, contains $x - the loop variable and expands to the target specific name
1443 @end enumerate
1445 Recalling the earlier discussion - the "object command" there are other things you can
1446 do besides "configure" the target.
1448 Note: Many of these commands exist as "global" commands, and they also exist as target
1449 specific commands. For example, the "mww" (memory write word) operates on the current
1450 target if you have more then 1 target, you must switch. In contrast to the normal
1451 commands, these commands operate on the specific target. For example, the command "mww"
1452 writes data to the *current* command line target.
1454 Often, you have only a single target - but if you have multiple targets (ie: a PIC32
1455 and an at91sam7 - your reset-init scripts might get a bit more complicated, ie: you must
1456 specify which of the two chips you want to write to. Writing 'pic32' clock configuration
1457 to an at91sam7 does not work).
1459 The commands are [as of 30/august/2008]:
1460 @verbatim
1464 Write(poke): 32, 16, 8bit values to memory.
1469 Human 'hexdump' with ascii 32, 16, 8bit values
1471 TNAME mem2array [see mem2array command]
1472 TNAME array2mem [see array2mem command]
1474 TNAME curstate
1475 Returns the current state of the target.
1477 TNAME examine
1478 See 'advanced target reset'
1479 TNAME poll
1480 See 'advanced target reset'
1481 TNAME reset assert
1482 See 'advanced target reset'
1483 TNAME reset deassert
1484 See 'advanced target reset'
1485 TNAME halt
1486 See 'advanced target reset'
1487 TNAME waitstate STATENAME
1488 See 'advanced target reset'
1489 @end verbatim
1491 @page
1492 @section Target Specific Commands
1493 @cindex Target Specific Commands
1495 @subsection AT91SAM7 specific commands
1496 @cindex AT91SAM7 specific commands
1497 The flash configuration is deduced from the chip identification register. The flash
1498 controller handles erases automatically on a page (128/265 byte) basis so erase is
1499 not necessary for flash programming. AT91SAM7 processors with less than 512K flash
1500 only have a single flash bank embedded on chip. AT91SAM7xx512 have two flash planes
1501 that can be erased separatly. Only an EraseAll command is supported by the controller
1502 for each flash plane and this is called with
1503 @itemize @bullet
1504 @item @b{flash erase} <@var{num}> @var{first_plane} @var{last_plane}
1505 @*bulk erase flash planes first_plane to last_plane.
1506 @item @b{at91sam7 gpnvm} <@var{num}> <@var{bit}> <@option{set}|@option{clear}>
1507 @cindex at91sam7 gpnvm
1508 @*set or clear a gpnvm bit for the processor
1509 @end itemize
1511 @subsection STR9 specific commands
1512 @cindex STR9 specific commands
1513 These are flash specific commands when using the str9xpec driver.
1514 @itemize @bullet
1515 @item @b{str9xpec enable_turbo} <@var{num}>
1516 @cindex str9xpec enable_turbo
1517 @*enable turbo mode, simply this will remove the str9 from the chain and talk
1518 directly to the embedded flash controller.
1519 @item @b{str9xpec disable_turbo} <@var{num}>
1520 @cindex str9xpec disable_turbo
1521 @*restore the str9 into jtag chain.
1522 @item @b{str9xpec lock} <@var{num}>
1523 @cindex str9xpec lock
1524 @*lock str9 device. The str9 will only respond to an unlock command that will
1525 erase the device.
1526 @item @b{str9xpec unlock} <@var{num}>
1527 @cindex str9xpec unlock
1528 @*unlock str9 device.
1529 @item @b{str9xpec options_read} <@var{num}>
1530 @cindex str9xpec options_read
1531 @*read str9 option bytes.
1532 @item @b{str9xpec options_write} <@var{num}>
1533 @cindex str9xpec options_write
1534 @*write str9 option bytes.
1535 @end itemize
1537 @subsection STR9 configuration
1538 @cindex STR9 configuration
1539 @itemize @bullet
1540 @item @b{str9x flash_config} <@var{bank}> <@var{BBSR}> <@var{NBBSR}>
1541 <@var{BBADR}> <@var{NBBADR}>
1542 @cindex str9x flash_config
1543 @*Configure str9 flash controller.
1544 @smallexample
1545 eg. str9x flash_config 0 4 2 0 0x80000
1546 This will setup
1547 BBSR - Boot Bank Size register
1548 NBBSR - Non Boot Bank Size register
1549 BBADR - Boot Bank Start Address register
1550 NBBADR - Boot Bank Start Address register
1551 @end smallexample
1552 @end itemize
1554 @subsection STR9 option byte configuration
1555 @cindex STR9 option byte configuration
1556 @itemize @bullet
1557 @item @b{str9xpec options_cmap} <@var{num}> <@option{bank0}|@option{bank1}>
1558 @cindex str9xpec options_cmap
1559 @*configure str9 boot bank.
1560 @item @b{str9xpec options_lvdthd} <@var{num}> <@option{2.4v}|@option{2.7v}>
1561 @cindex str9xpec options_lvdthd
1562 @*configure str9 lvd threshold.
1563 @item @b{str9xpec options_lvdsel} <@var{num}> <@option{vdd}|@option{vdd_vddq}>
1564 @cindex str9xpec options_lvdsel
1565 @*configure str9 lvd source.
1566 @item @b{str9xpec options_lvdwarn} <@var{bank}> <@option{vdd}|@option{vdd_vddq}>
1567 @cindex str9xpec options_lvdwarn
1568 @*configure str9 lvd reset warning source.
1569 @end itemize
1571 @subsection STM32x specific commands
1572 @cindex STM32x specific commands
1574 These are flash specific commands when using the stm32x driver.
1575 @itemize @bullet
1576 @item @b{stm32x lock} <@var{num}>
1577 @cindex stm32x lock
1578 @*lock stm32 device.
1579 @item @b{stm32x unlock} <@var{num}>
1580 @cindex stm32x unlock
1581 @*unlock stm32 device.
1582 @item @b{stm32x options_read} <@var{num}>
1583 @cindex stm32x options_read
1584 @*read stm32 option bytes.
1585 @item @b{stm32x options_write} <@var{num}> <@option{SWWDG}|@option{HWWDG}>
1586 <@option{RSTSTNDBY}|@option{NORSTSTNDBY}> <@option{RSTSTOP}|@option{NORSTSTOP}>
1587 @cindex stm32x options_write
1588 @*write stm32 option bytes.
1589 @item @b{stm32x mass_erase} <@var{num}>
1590 @cindex stm32x mass_erase
1591 @*mass erase flash memory.
1592 @end itemize
1594 @subsection Stellaris specific commands
1595 @cindex Stellaris specific commands
1597 These are flash specific commands when using the Stellaris driver.
1598 @itemize @bullet
1599 @item @b{stellaris mass_erase} <@var{num}>
1600 @cindex stellaris mass_erase
1601 @*mass erase flash memory.
1602 @end itemize
1604 @page
1605 @section Architecture Specific Commands
1606 @cindex Architecture Specific Commands
1608 @subsection ARMV4/5 specific commands
1609 @cindex ARMV4/5 specific commands
1611 These commands are specific to ARM architecture v4 and v5, like all ARM7/9 systems
1612 or Intel XScale (XScale isn't supported yet).
1613 @itemize @bullet
1614 @item @b{armv4_5 reg}
1615 @cindex armv4_5 reg
1616 @*Display a list of all banked core registers, fetching the current value from every
1617 core mode if necessary. OpenOCD versions before rev. 60 didn't fetch the current
1618 register value.
1619 @item @b{armv4_5 core_mode} [@var{arm}|@var{thumb}]
1620 @cindex armv4_5 core_mode
1621 @*Displays the core_mode, optionally changing it to either ARM or Thumb mode.
1622 The target is resumed in the currently set @option{core_mode}.
1623 @end itemize
1625 @subsection ARM7/9 specific commands
1626 @cindex ARM7/9 specific commands
1628 These commands are specific to ARM7 and ARM9 targets, like ARM7TDMI, ARM720t,
1629 ARM920t or ARM926EJ-S.
1630 @itemize @bullet
1631 @item @b{arm7_9 dbgrq} <@var{enable}|@var{disable}>
1632 @cindex arm7_9 dbgrq
1633 @*Enable use of the DBGRQ bit to force entry into debug mode. This should be
1634 safe for all but ARM7TDMI--S cores (like Philips LPC).
1635 @item @b{arm7_9 fast_memory_access} <@var{enable}|@var{disable}>
1636 @cindex arm7_9 fast_memory_access
1637 @anchor{arm7_9 fast_memory_access}
1638 @*Allow OpenOCD to read and write memory without checking completion of
1639 the operation. This provides a huge speed increase, especially with USB JTAG
1640 cables (FT2232), but might be unsafe if used with targets running at a very low
1641 speed, like the 32kHz startup clock of an AT91RM9200.
1642 @item @b{arm7_9 dcc_downloads} <@var{enable}|@var{disable}>
1643 @cindex arm7_9 dcc_downloads
1644 @*Enable the use of the debug communications channel (DCC) to write larger (>128 byte)
1645 amounts of memory. DCC downloads offer a huge speed increase, but might be potentially
1646 unsafe, especially with targets running at a very low speed. This command was introduced
1647 with OpenOCD rev. 60.
1648 @end itemize
1650 @subsection ARM720T specific commands
1651 @cindex ARM720T specific commands
1653 @itemize @bullet
1654 @item @b{arm720t cp15} <@var{num}> [@var{value}]
1655 @cindex arm720t cp15
1656 @*display/modify cp15 register <@option{num}> [@option{value}].
1657 @item @b{arm720t md<bhw>_phys} <@var{addr}> [@var{count}]
1658 @cindex arm720t md<bhw>_phys
1659 @*Display memory at physical address addr.
1660 @item @b{arm720t mw<bhw>_phys} <@var{addr}> <@var{value}>
1661 @cindex arm720t mw<bhw>_phys
1662 @*Write memory at physical address addr.
1663 @item @b{arm720t virt2phys} <@var{va}>
1664 @cindex arm720t virt2phys
1665 @*Translate a virtual address to a physical address.
1666 @end itemize
1668 @subsection ARM9TDMI specific commands
1669 @cindex ARM9TDMI specific commands
1671 @itemize @bullet
1672 @item @b{arm9tdmi vector_catch} <@var{all}|@var{none}>
1673 @cindex arm9tdmi vector_catch
1674 @*Catch arm9 interrupt vectors, can be @option{all} @option{none} or any of the following:
1675 @option{reset} @option{undef} @option{swi} @option{pabt} @option{dabt} @option{reserved}
1676 @option{irq} @option{fiq}.
1678 Can also be used on other arm9 based cores, arm966, arm920t and arm926ejs.
1679 @end itemize
1681 @subsection ARM966E specific commands
1682 @cindex ARM966E specific commands
1684 @itemize @bullet
1685 @item @b{arm966e cp15} <@var{num}> [@var{value}]
1686 @cindex arm966e cp15
1687 @*display/modify cp15 register <@option{num}> [@option{value}].
1688 @end itemize
1690 @subsection ARM920T specific commands
1691 @cindex ARM920T specific commands
1693 @itemize @bullet
1694 @item @b{arm920t cp15} <@var{num}> [@var{value}]
1695 @cindex arm920t cp15
1696 @*display/modify cp15 register <@option{num}> [@option{value}].
1697 @item @b{arm920t cp15i} <@var{num}> [@var{value}] [@var{address}]
1698 @cindex arm920t cp15i
1699 @*display/modify cp15 (interpreted access) <@option{opcode}> [@option{value}] [@option{address}]
1700 @item @b{arm920t cache_info}
1701 @cindex arm920t cache_info
1702 @*Print information about the caches found. This allows you to see if your target
1703 is a ARM920T (2x16kByte cache) or ARM922T (2x8kByte cache).
1704 @item @b{arm920t md<bhw>_phys} <@var{addr}> [@var{count}]
1705 @cindex arm920t md<bhw>_phys
1706 @*Display memory at physical address addr.
1707 @item @b{arm920t mw<bhw>_phys} <@var{addr}> <@var{value}>
1708 @cindex arm920t mw<bhw>_phys
1709 @*Write memory at physical address addr.
1710 @item @b{arm920t read_cache} <@var{filename}>
1711 @cindex arm920t read_cache
1712 @*Dump the content of ICache and DCache to a file.
1713 @item @b{arm920t read_mmu} <@var{filename}>
1714 @cindex arm920t read_mmu
1715 @*Dump the content of the ITLB and DTLB to a file.
1716 @item @b{arm920t virt2phys} <@var{va}>
1717 @cindex arm920t virt2phys
1718 @*Translate a virtual address to a physical address.
1719 @end itemize
1721 @subsection ARM926EJS specific commands
1722 @cindex ARM926EJS specific commands
1724 @itemize @bullet
1725 @item @b{arm926ejs cp15} <@var{num}> [@var{value}]
1726 @cindex arm926ejs cp15
1727 @*display/modify cp15 register <@option{num}> [@option{value}].
1728 @item @b{arm926ejs cache_info}
1729 @cindex arm926ejs cache_info
1730 @*Print information about the caches found.
1731 @item @b{arm926ejs md<bhw>_phys} <@var{addr}> [@var{count}]
1732 @cindex arm926ejs md<bhw>_phys
1733 @*Display memory at physical address addr.
1734 @item @b{arm926ejs mw<bhw>_phys} <@var{addr}> <@var{value}>
1735 @cindex arm926ejs mw<bhw>_phys
1736 @*Write memory at physical address addr.
1737 @item @b{arm926ejs virt2phys} <@var{va}>
1738 @cindex arm926ejs virt2phys
1739 @*Translate a virtual address to a physical address.
1740 @end itemize
1742 @page
1743 @section Debug commands
1744 @cindex Debug commands
1745 The following commands give direct access to the core, and are most likely
1746 only useful while debugging OpenOCD.
1747 @itemize @bullet
1748 @item @b{arm7_9 write_xpsr} <@var{32-bit value}> <@option{0=cpsr}, @option{1=spsr}>
1749 @cindex arm7_9 write_xpsr
1750 @*Immediately write either the current program status register (CPSR) or the saved
1751 program status register (SPSR), without changing the register cache (as displayed
1752 by the @option{reg} and @option{armv4_5 reg} commands).
1753 @item @b{arm7_9 write_xpsr_im8} <@var{8-bit value}> <@var{rotate 4-bit}>
1754 <@var{0=cpsr},@var{1=spsr}>
1755 @cindex arm7_9 write_xpsr_im8
1756 @*Write the 8-bit value rotated right by 2*rotate bits, using an immediate write
1757 operation (similar to @option{write_xpsr}).
1758 @item @b{arm7_9 write_core_reg} <@var{num}> <@var{mode}> <@var{value}>
1759 @cindex arm7_9 write_core_reg
1760 @*Write a core register, without changing the register cache (as displayed by the
1761 @option{reg} and @option{armv4_5 reg} commands). The <@var{mode}> argument takes the
1762 encoding of the [M4:M0] bits of the PSR.
1763 @end itemize
1765 @page
1766 @section JTAG commands
1767 @cindex JTAG commands
1768 @itemize @bullet
1769 @item @b{scan_chain}
1770 @cindex scan_chain
1771 @*Print current scan chain configuration.
1772 @item @b{jtag_reset} <@var{trst}> <@var{srst}>
1773 @cindex jtag_reset
1774 @*Toggle reset lines.
1775 @item @b{endstate} <@var{tap_state}>
1776 @cindex endstate
1777 @*Finish JTAG operations in <@var{tap_state}>.
1778 @item @b{runtest} <@var{num_cycles}>
1779 @cindex runtest
1780 @*Move to Run-Test/Idle, and execute <@var{num_cycles}>
1781 @item @b{statemove} [@var{tap_state}]
1782 @cindex statemove
1783 @*Move to current endstate or [@var{tap_state}]
1784 @item @b{irscan} <@var{device}> <@var{instr}> [@var{dev2}] [@var{instr2}] ...
1785 @cindex irscan
1786 @*Execute IR scan <@var{device}> <@var{instr}> [@var{dev2}] [@var{instr2}] ...
1787 @item @b{drscan} <@var{device}> [@var{dev2}] [@var{var2}] ...
1788 @cindex drscan
1789 @*Execute DR scan <@var{device}> [@var{dev2}] [@var{var2}] ...
1790 @item @b{verify_ircapture} <@option{enable}|@option{disable}>
1791 @cindex verify_ircapture
1792 @*Verify value captured during Capture-IR. Default is enabled.
1793 @item @b{var} <@var{name}> [@var{num_fields}|@var{del}] [@var{size1}] ...
1794 @cindex var
1795 @*Allocate, display or delete variable <@var{name}> [@var{num_fields}|@var{del}] [@var{size1}] ...
1796 @item @b{field} <@var{var}> <@var{field}> [@var{value}|@var{flip}]
1797 @cindex field
1798 Display/modify variable field <@var{var}> <@var{field}> [@var{value}|@var{flip}].
1799 @end itemize
1801 @page
1802 @section Target Requests
1803 @cindex Target Requests
1804 OpenOCD can handle certain target requests, currently debugmsg are only supported for arm7_9 and cortex_m3.
1805 See libdcc in the contrib dir for more details.
1806 @itemize @bullet
1807 @item @b{target_request debugmsgs} <@var{enable}|@var{disable}>
1808 @cindex target_request debugmsgs
1809 @*Enable/disable target debugmsgs requests. debugmsgs enable messages to be sent to the debugger while the target is running.
1810 @end itemize
1812 @node Sample Scripts
1813 @chapter Sample Scripts
1814 @cindex scripts
1816 This page shows how to use the target library.
1818 The configuration script can be divided in the following section:
1819 @itemize @bullet
1820 @item daemon configuration
1821 @item interface
1822 @item jtag scan chain
1823 @item target configuration
1824 @item flash configuration
1825 @end itemize
1827 Detailed information about each section can be found at OpenOCD configuration.
1829 @section AT91R40008 example
1830 @cindex AT91R40008 example
1831 To start OpenOCD with a target script for the AT91R40008 CPU and reset
1832 the CPU upon startup of the OpenOCD daemon.
1833 @smallexample
1834 openocd -f interface/parport.cfg -f target/at91r40008.cfg -c init -c reset
1835 @end smallexample
1838 @node GDB and OpenOCD
1839 @chapter GDB and OpenOCD
1840 @cindex GDB and OpenOCD
1841 OpenOCD complies with the remote gdbserver protocol, and as such can be used
1842 to debug remote targets.
1844 @section Connecting to gdb
1845 @cindex Connecting to gdb
1846 Use GDB 6.7 or newer with OpenOCD if you run into trouble. For instance 6.3 has a
1847 known bug where it produces bogus memory access errors, which has since
1848 been fixed: look up 1836 in
1851 A connection is typically started as follows:
1852 @smallexample
1853 target remote localhost:3333
1854 @end smallexample
1855 This would cause gdb to connect to the gdbserver on the local pc using port 3333.
1857 To see a list of available OpenOCD commands type @option{monitor help} on the
1858 gdb commandline.
1860 OpenOCD supports the gdb @option{qSupported} packet, this enables information
1861 to be sent by the gdb server (openocd) to gdb. Typical information includes
1862 packet size and device memory map.
1864 Previous versions of OpenOCD required the following gdb options to increase
1865 the packet size and speed up gdb communication.
1866 @smallexample
1867 set remote memory-write-packet-size 1024
1868 set remote memory-write-packet-size fixed
1869 set remote memory-read-packet-size 1024
1870 set remote memory-read-packet-size fixed
1871 @end smallexample
1872 This is now handled in the @option{qSupported} PacketSize.
1874 @section Programming using gdb
1875 @cindex Programming using gdb
1877 By default the target memory map is sent to gdb, this can be disabled by
1878 the following OpenOCD config option:
1879 @smallexample
1880 gdb_memory_map disable
1881 @end smallexample
1882 For this to function correctly a valid flash config must also be configured
1883 in OpenOCD. For faster performance you should also configure a valid
1884 working area.
1886 Informing gdb of the memory map of the target will enable gdb to protect any
1887 flash area of the target and use hardware breakpoints by default. This means
1888 that the OpenOCD option @option{gdb_breakpoint_override} is not required when
1889 using a memory map. @xref{gdb_breakpoint_override}.
1891 To view the configured memory map in gdb, use the gdb command @option{info mem}
1892 All other unasigned addresses within gdb are treated as RAM.
1894 GDB 6.8 and higher set any memory area not in the memory map as inaccessible,
1895 this can be changed to the old behaviour by using the following gdb command.
1896 @smallexample
1897 set mem inaccessible-by-default off
1898 @end smallexample
1900 If @option{gdb_flash_program enable} is also used, gdb will be able to
1901 program any flash memory using the vFlash interface.
1903 gdb will look at the target memory map when a load command is given, if any
1904 areas to be programmed lie within the target flash area the vFlash packets
1905 will be used.
1907 If the target needs configuring before gdb programming, a script can be executed.
1908 @smallexample
1909 target_script 0 gdb_program_config config.script
1910 @end smallexample
1912 To verify any flash programming the gdb command @option{compare-sections}
1913 can be used.
1915 @node TCL and OpenOCD
1916 @chapter TCL and OpenOCD
1917 @cindex TCL and OpenOCD
1918 OpenOCD embeds a TCL interpreter (see JIM) for command parsing and scripting
1919 support.
1921 The TCL interpreter can be invoked from the interactive command line, files, and a network port.
1923 The command and file interfaces are fairly straightforward, while the network
1924 port is geared toward intergration with external clients. A small example
1925 of an external TCL script that can connect to openocd is shown below.
1927 @verbatim
1928 # Simple tcl client to connect to openocd
1929 puts "Use empty line to exit"
1930 set fo [socket 6666]
1931 puts -nonewline stdout "> "
1932 flush stdout
1933 while {[gets stdin line] >= 0} {
1934 if {$line eq {}} break
1935 puts $fo $line
1936 flush $fo
1937 gets $fo line
1938 puts $line
1939 puts -nonewline stdout "> "
1940 flush stdout
1941 }
1942 close $fo
1943 @end verbatim
1945 This script can easily be modified to front various GUIs or be a sub
1946 component of a larger framework for control and interaction.
1949 @node TCL scripting API
1950 @chapter TCL scripting API
1951 @cindex TCL scripting API
1952 API rules
1954 The commands are stateless. E.g. the telnet command line has a concept
1955 of currently active target, the Tcl API proc's take this sort of state
1956 information as an argument to each proc.
1958 There are three main types of return values: single value, name value
1959 pair list and lists.
1961 Name value pair. The proc 'foo' below returns a name/value pair
1962 list.
1964 @verbatim
1966 > set foo(me) Duane
1967 > set foo(you) Oyvind
1968 > set foo(mouse) Micky
1969 > set foo(duck) Donald
1971 If one does this:
1973 > set foo
1975 The result is:
1977 me Duane you Oyvind mouse Micky duck Donald
1979 Thus, to get the names of the associative array is easy:
1981 foreach { name value } [set foo] {
1982 puts "Name: $name, Value: $value"
1983 }
1984 @end verbatim
1986 Lists returned must be relatively small. Otherwise a range
1987 should be passed in to the proc in question.
1989 Low level commands are prefixed with "openocd_", e.g. openocd_flash_banks
1990 is the low level API upon which "flash banks" is implemented.
1992 @itemize @bullet
1993 @item @b{ocd_mem2array} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
1995 Read memory and return as a TCL array for script processing
1996 @item @b{ocd_array2mem} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
1998 Convert a TCL array to memory locations and write the values
1999 @item @b{ocd_flash_banks} <@var{driver}> <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}> <@var{target}> [@option{driver options} ...]
2001 Return information about the flash banks
2002 @end itemize
2004 OpenOCD commands can consist of two words, e.g. "flash banks". The
2005 startup.tcl "unknown" proc will translate this into a tcl proc
2006 called "flash_banks".
2009 @node Upgrading
2010 @chapter Deprecated/Removed Commands
2011 @cindex Deprecated/Removed Commands
2012 Certain OpenOCD commands have been deprecated/removed during the various revisions.
2014 @itemize @bullet
2015 @item @b{load_binary}
2016 @cindex load_binary
2017 @*use @option{load_image} command with same args. @xref{load_image}.
2018 @item @b{target}
2019 @cindex target
2020 @*@option{target} no longer take the reset_init, reset_run, run_and_halt, run_and_init. The @option{reset} command
2021 always does a @option{reset run} when passed no arguments.
2022 @item @b{dump_binary}
2023 @cindex dump_binary
2024 @*use @option{dump_image} command with same args. @xref{dump_image}.
2025 @item @b{flash erase}
2026 @cindex flash erase
2027 @*use @option{flash erase_sector} command with same args. @xref{flash erase_sector}.
2028 @item @b{flash write}
2029 @cindex flash write
2030 @*use @option{flash write_bank} command with same args. @xref{flash write_bank}.
2031 @item @b{flash write_binary}
2032 @cindex flash write_binary
2033 @*use @option{flash write_bank} command with same args. @xref{flash write_bank}.
2034 @item @b{arm7_9 fast_writes}
2035 @cindex arm7_9 fast_writes
2036 @*use @option{arm7_9 fast_memory_access} command with same args. @xref{arm7_9 fast_memory_access}.
2037 @item @b{flash auto_erase}
2038 @cindex flash auto_erase
2039 @*use @option{flash write_image} command passing @option{erase} as the first parameter. @xref{flash write_image}.
2040 @item @b{daemon_startup}
2041 @cindex daemon_startup
2042 @*this config option has been removed, simply adding @option{init} and @option{reset halt} to
2043 the end of your config script will give the same behaviour as using @option{daemon_startup reset}
2044 and @option{target cortex_m3 little reset_halt 0}.
2045 @item @b{arm7_9 sw_bkpts}
2046 @cindex arm7_9 sw_bkpts
2047 @*On by default. See also @option{gdb_breakpoint_override}. @xref{gdb_breakpoint_override}.
2048 @item @b{arm7_9 force_hw_bkpts}
2049 @cindex arm7_9 force_hw_bkpts
2050 @*Use @option{gdb_breakpoint_override} instead. Note that GDB will use hardware breakpoints
2051 for flash if the gdb memory map has been set up(default when flash is declared in
2052 target configuration). @xref{gdb_breakpoint_override}.
2053 @item @b{run_and_halt_time}
2054 @cindex run_and_halt_time
2055 @*This command has been removed for simpler reset behaviour, it can be simulated with the
2056 following commands:
2057 @smallexample
2058 reset run
2059 sleep 100
2060 halt
2061 @end smallexample
2062 @end itemize
2064 @node FAQ
2065 @chapter FAQ
2066 @cindex faq
2067 @enumerate
2068 @item OpenOCD complains about a missing cygwin1.dll.
2070 Make sure you have Cygwin installed, or at least a version of OpenOCD that
2071 claims to come with all the necessary dlls. When using Cygwin, try launching
2072 OpenOCD from the Cygwin shell.
2074 @item I'm trying to set a breakpoint using GDB (or a frontend like Insight or
2075 Eclipse), but OpenOCD complains that "Info: arm7_9_common.c:213
2076 arm7_9_add_breakpoint(): sw breakpoint requested, but software breakpoints not enabled".
2078 GDB issues software breakpoints when a normal breakpoint is requested, or to implement
2079 source-line single-stepping. On ARMv4T systems, like ARM7TDMI, ARM720t or ARM920t,
2080 software breakpoints consume one of the two available hardware breakpoints.
2082 @item When erasing or writing LPC2000 on-chip flash, the operation fails sometimes
2083 and works sometimes fine.
2085 Make sure the core frequency specified in the @option{flash lpc2000} line matches the
2086 clock at the time you're programming the flash. If you've specified the crystal's
2087 frequency, make sure the PLL is disabled, if you've specified the full core speed
2088 (e.g. 60MHz), make sure the PLL is enabled.
2090 @item When debugging using an Amontec Chameleon in its JTAG Accelerator configuration,
2091 I keep getting "Error: amt_jtagaccel.c:184 amt_wait_scan_busy(): amt_jtagaccel timed
2092 out while waiting for end of scan, rtck was disabled".
2094 Make sure your PC's parallel port operates in EPP mode. You might have to try several
2095 settings in your PC BIOS (ECP, EPP, and different versions of those).
2097 @item When debugging with OpenOCD and GDB (plain GDB, Insight, or Eclipse),
2098 I get lots of "Error: arm7_9_common.c:1771 arm7_9_read_memory():
2099 memory read caused data abort".
2101 The errors are non-fatal, and are the result of GDB trying to trace stack frames
2102 beyond the last valid frame. It might be possible to prevent this by setting up
2103 a proper "initial" stack frame, if you happen to know what exactly has to
2104 be done, feel free to add this here.
2106 @item I get the following message in the OpenOCD console (or log file):
2107 "Warning: arm7_9_common.c:679 arm7_9_assert_reset(): srst resets test logic, too".
2109 This warning doesn't indicate any serious problem, as long as you don't want to
2110 debug your core right out of reset. Your .cfg file specified @option{jtag_reset
2111 trst_and_srst srst_pulls_trst} to tell OpenOCD that either your board,
2112 your debugger or your target uC (e.g. LPC2000) can't assert the two reset signals
2113 independently. With this setup, it's not possible to halt the core right out of
2114 reset, everything else should work fine.
2116 @item When using OpenOCD in conjunction with Amontec JTAGkey and the Yagarto
2117 Toolchain (Eclipse, arm-elf-gcc, arm-elf-gdb), the debugging seems to be
2118 unstable. When single-stepping over large blocks of code, GDB and OpenOCD
2119 quit with an error message. Is there a stability issue with OpenOCD?
2121 No, this is not a stability issue concerning OpenOCD. Most users have solved
2122 this issue by simply using a self-powered USB hub, which they connect their
2123 Amontec JTAGkey to. Apparently, some computers do not provide a USB power
2124 supply stable enough for the Amontec JTAGkey to be operated.
2126 @item When using the Amontec JTAGkey, sometimes OpenOCD crashes with the
2127 following error messages: "Error: ft2232.c:201 ft2232_read(): FT_Read returned:
2128 4" and "Error: ft2232.c:365 ft2232_send_and_recv(): couldn't read from FT2232".
2129 What does that mean and what might be the reason for this?
2131 First of all, the reason might be the USB power supply. Try using a self-powered
2132 hub instead of a direct connection to your computer. Secondly, the error code 4
2133 corresponds to an FT_IO_ERROR, which means that the driver for the FTDI USB
2134 chip ran into some sort of error - this points us to a USB problem.
2136 @item When using the Amontec JTAGkey, sometimes OpenOCD crashes with the following
2137 error message: "Error: gdb_server.c:101 gdb_get_char(): read: 10054".
2138 What does that mean and what might be the reason for this?
2140 Error code 10054 corresponds to WSAECONNRESET, which means that the debugger (GDB)
2141 has closed the connection to OpenOCD. This might be a GDB issue.
2143 @item In the configuration file in the section where flash device configurations
2144 are described, there is a parameter for specifying the clock frequency for
2145 LPC2000 internal flash devices (e.g.
2146 @option{flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14746 calc_checksum}),
2147 which must be specified in kilohertz. However, I do have a quartz crystal of a
2148 frequency that contains fractions of kilohertz (e.g. 14,745,600 Hz, i.e. 14,745.600 kHz).
2149 Is it possible to specify real numbers for the clock frequency?
2151 No. The clock frequency specified here must be given as an integral number.
2152 However, this clock frequency is used by the In-Application-Programming (IAP)
2153 routines of the LPC2000 family only, which seems to be very tolerant concerning
2154 the given clock frequency, so a slight difference between the specified clock
2155 frequency and the actual clock frequency will not cause any trouble.
2157 @item Do I have to keep a specific order for the commands in the configuration file?
2159 Well, yes and no. Commands can be given in arbitrary order, yet the devices
2160 listed for the JTAG scan chain must be given in the right order (jtag_device),
2161 with the device closest to the TDO-Pin being listed first. In general,
2162 whenever objects of the same type exist which require an index number, then
2163 these objects must be given in the right order (jtag_devices, targets and flash
2164 banks - a target references a jtag_device and a flash bank references a target).
2166 @item Sometimes my debugging session terminates with an error. When I look into the
2167 log file, I can see these error messages: Error: arm7_9_common.c:561
2168 arm7_9_execute_sys_speed(): timeout waiting for SYSCOMP
2170 TODO.
2172 @end enumerate
2174 @include fdl.texi
2176 @node Index
2177 @unnumbered Index
2179 @printindex cp
2181 @bye

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