1 \input texinfo @c -*-texinfo-*-
3 @setfilename openocd.info
4 @settitle Open On-Chip Debugger (OpenOCD)
5 @dircategory Development
8 * OpenOCD: (openocd). Open On-Chip Debugger.
17 @item Copyright @copyright{} 2008 The OpenOCD Project
18 @item Copyright @copyright{} 2007-2008 Spencer Oliver @email{spen@@spen-soft.co.uk}
19 @item Copyright @copyright{} 2008 Oyvind Harboe @email{oyvind.harboe@@zylin.com}
20 @item Copyright @copyright{} 2008 Duane Ellis @email{openocd@@duaneellis.com}
24 Permission is granted to copy, distribute and/or modify this document
25 under the terms of the GNU Free Documentation License, Version 1.2 or
26 any later version published by the Free Software Foundation; with no
27 Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
28 Texts. A copy of the license is included in the section entitled ``GNU
29 Free Documentation License''.
34 @title Open On-Chip Debugger (OpenOCD)
35 @subtitle Edition @value{EDITION} for OpenOCD version @value{VERSION}
36 @subtitle @value{UPDATED}
38 @vskip 0pt plus 1filll
45 @node Top, About, , (dir)
48 This manual documents edition @value{EDITION} of the Open On-Chip Debugger
49 (OpenOCD) version @value{VERSION}, @value{UPDATED}.
54 * About:: About OpenOCD.
55 * Developers:: OpenOCD developers
56 * Building:: Building OpenOCD
57 * JTAG Hardware Dongles:: JTAG Hardware Dongles
58 * Running:: Running OpenOCD
59 * Simple Configuration Files:: Simple Configuration Files
60 * Config File Guidelines:: Config File Guidelines
61 * About JIM-Tcl:: About JIM-Tcl
62 * Daemon Configuration:: Daemon Configuration
63 * Interface - Dongle Configuration:: Interface - Dongle Configuration
64 * Reset Configuration:: Reset Configuration
65 * Tap Creation:: Tap Creation
66 * Target Configuration:: Target Configuration
67 * Flash Configuration:: Flash Configuration
68 * General Commands:: General Commands
69 * JTAG Commands:: JTAG Commands
70 * Sample Scripts:: Sample Target Scripts
72 * GDB and OpenOCD:: Using GDB and OpenOCD
73 * Tcl scripting API:: Tcl scripting API
74 * Upgrading:: Deprecated/Removed Commands
75 * Target library:: Target library
76 * FAQ:: Frequently Asked Questions
77 * Tcl Crash Course:: Tcl Crash Course
78 * License:: GNU Free Documentation License
79 @comment DO NOT use the plain word ``Index'', reason: CYGWIN filename
80 @comment case issue with ``Index.html'' and ``index.html''
81 @comment Occurs when creating ``--html --no-split'' output
82 @comment This fix is based on: http://sourceware.org/ml/binutils/2006-05/msg00215.html
83 * OpenOCD Index:: Main index.
90 The Open On-Chip Debugger (OpenOCD) aims to provide debugging,
91 in-system programming and boundary-scan testing for embedded target
94 @b{JTAG:} OpenOCD uses a ``hardware interface dongle'' to communicate
95 with the JTAG (IEEE 1149.1) compliant taps on your target board.
97 @b{Dongles:} OpenOCD currently supports many types of hardware dongles: USB
98 Based, Parallel Port Based, and other standalone boxes that run
99 OpenOCD internally. See the section titled: @xref{JTAG Hardware Dongles}.
101 @b{GDB Debug:} It allows ARM7 (ARM7TDMI and ARM720t), ARM9 (ARM920T,
102 ARM922T, ARM926EJ--S, ARM966E--S), XScale (PXA25x, IXP42x) and
103 Cortex-M3 (Luminary Stellaris LM3 and ST STM32) based cores to be
104 debugged via the GDB Protocol.
106 @b{Flash Programing:} Flash writing is supported for external CFI
107 compatible flashes (Intel and AMD/Spansion command set) and several
108 internal flashes (LPC2000, AT91SAM7, STR7x, STR9x, LM3 and
109 STM32x). Preliminary support for using the LPC3180's NAND flash
110 controller is included.
116 OpenOCD was created by Dominic Rath as part of a diploma thesis written at the
117 University of Applied Sciences Augsburg (@uref{http://www.fh-augsburg.de}).
118 Others interested in improving the state of free and open debug and testing technology
119 are welcome to participate.
121 Other developers have contributed support for additional targets and flashes as well
122 as numerous bugfixes and enhancements. See the AUTHORS file for regular contributors.
124 The main OpenOCD web site is available at @uref{http://openocd.berlios.de/web/}
128 @cindex building OpenOCD
130 @section Pre-Built Tools
131 If you are interested in getting actual work done rather than building
132 OpenOCD, then check if your interface supplier provides binaries for
133 you. Chances are that that binary is from some SVN version that is more
134 stable than SVN trunk where bleeding edge development takes place.
136 @section Packagers Please Read!
138 If you are a @b{PACKAGER} of OpenOCD if you
141 @item @b{Sell dongles} and include pre-built binaries
142 @item @b{Supply tools} i.e.: A complete development solution
143 @item @b{Supply IDEs} like Eclipse, or RHIDE, etc.
144 @item @b{Build packages} i.e.: RPM files, or DEB files for a Linux Distro
147 As a @b{PACKAGER} - you are at the top of the food chain. You solve
148 problems for downstream users. What you fix or solve - solves hundreds
149 if not thousands of user questions. If something does not work for you
150 please let us know. That said, would also like you to follow a few
154 @item @b{Always build with printer ports enabled}.
155 @item @b{Try to use LIBFTDI + LIBUSB where possible}. You cover more bases.
158 It is your decision..
161 @item @b{Why YES to LIBFTDI + LIBUSB}
163 @item @b{LESS} work - libusb perhaps already there
164 @item @b{LESS} work - identical code multiple platforms
165 @item @b{MORE} dongles are supported
166 @item @b{MORE} platforms are supported
167 @item @b{MORE} complete solution
169 @item @b{Why not LIBFTDI + LIBUSB} (i.e.: ftd2xx instead)
171 @item @b{LESS} Some say it is slower.
172 @item @b{LESS} complex to distribute (external dependencies)
176 @section Building From Source
178 You can download the current SVN version with SVN client of your choice from the
179 following repositories:
181 (@uref{svn://svn.berlios.de/openocd/trunk})
185 (@uref{http://svn.berlios.de/svnroot/repos/openocd/trunk})
187 Using the SVN command line client, you can use the following command to fetch the
188 latest version (make sure there is no (non-svn) directory called "openocd" in the
192 svn checkout svn://svn.berlios.de/openocd/trunk openocd
195 Building OpenOCD requires a recent version of the GNU autotools.
196 On my build system, I'm using autoconf 2.13 and automake 1.9. For building on Windows,
197 you have to use Cygwin. Make sure that your @env{PATH} environment variable contains no
198 other locations with Unix utils (like UnxUtils) - these can't handle the Cygwin
199 paths, resulting in obscure dependency errors (This is an observation I've gathered
200 from the logs of one user - correct me if I'm wrong).
202 You further need the appropriate driver files, if you want to build support for
203 a FTDI FT2232 based interface:
205 @item @b{ftdi2232} libftdi (@uref{http://www.intra2net.com/opensource/ftdi/})
206 @item @b{ftd2xx} libftd2xx (@uref{http://www.ftdichip.com/Drivers/D2XX.htm})
207 @item When using the Amontec JTAGkey, you have to get the drivers from the Amontec
208 homepage (@uref{www.amontec.com}), as the JTAGkey uses a non-standard VID/PID.
211 libftdi is supported under Windows. Do not use versions earlier then 0.14.
213 In general, the D2XX driver provides superior performance (several times as fast),
214 but has the draw-back of being binary-only - though that isn't that bad, as it isn't
215 a kernel module, only a user space library.
217 To build OpenOCD (on both Linux and Cygwin), use the following commands:
221 Bootstrap generates the configure script, and prepares building on your system.
223 ./configure [options, see below]
225 Configure generates the Makefiles used to build OpenOCD.
230 Make builds OpenOCD, and places the final executable in ./src/, the last step, ``make install'' is optional.
232 The configure script takes several options, specifying which JTAG interfaces
237 @option{--enable-parport} - Bit bang pc printer ports.
239 @option{--enable-parport_ppdev} - Parallel Port [see below]
241 @option{--enable-parport_giveio} - Parallel Port [see below]
243 @option{--enable-amtjtagaccel} - Parallel Port [Amontec, see below]
245 @option{--enable-ft2232_ftd2xx} - Numerous USB Type ARM JTAG dongles use the FT2232C chip from this FTDICHIP.COM chip (closed source).
247 @option{--enable-ft2232_libftdi} - An open source (free) alternate to FTDICHIP.COM ftd2xx solution (Linux, MacOS, Cygwin)
249 @option{--with-ftd2xx-win32-zipdir=PATH} - If using FTDICHIP.COM ft2232c, point at the directory where the Win32 FTDICHIP.COM 'CDM' driver zip file was unpacked.
251 @option{--with-ftd2xx-linux-tardir=PATH} - Linux only equal of @option{--with-ftd2xx-win32-zipdir}, where you unpacked the TAR.GZ file.
253 @option{--with-ftd2xx-lib=shared|static} - Linux only. Default: static, specifies how the FTDICHIP.COM libftd2xx driver should be linked. Note 'static' only works in conjunction with @option{--with-ftd2xx-linux-tardir}. Shared is supported (12/26/2008), however you must manually install the required header files and shared libraries in an appropriate place. This uses ``libusb'' internally.
255 @option{--enable-gw16012}
257 @option{--enable-usbprog}
259 @option{--enable-presto_libftdi}
261 @option{--enable-presto_ftd2xx}
263 @option{--enable-jlink} - From SEGGER
265 @option{--enable-vsllink}
267 @option{--enable-rlink} - Raisonance.com dongle.
269 @option{--enable-arm-jtag-ew} - Olimex ARM-JTAG-EW dongle.
272 @section Parallel Port Dongles
274 If you want to access the parallel port using the PPDEV interface you have to specify
275 both the @option{--enable-parport} AND the @option{--enable-parport_ppdev} option since
276 the @option{--enable-parport_ppdev} option actually is an option to the parport driver
277 (see @uref{http://forum.sparkfun.com/viewtopic.php?t=3795} for more info).
279 @section FT2232C Based USB Dongles
281 There are 2 methods of using the FTD2232, either (1) using the
282 FTDICHIP.COM closed source driver, or (2) the open (and free) driver
283 libftdi. Some claim the (closed) FTDICHIP.COM solution is faster.
285 The FTDICHIP drivers come as either a (win32) ZIP file, or a (Linux)
286 TAR.GZ file. You must unpack them ``some where'' convient. As of this
287 writing (12/26/2008) FTDICHIP does not supply means to install these
288 files ``in an appropriate place'' As a result, there are two
289 ``./configure'' options that help.
291 Below is an example build process:
293 1) Check out the latest version of ``openocd'' from SVN.
295 2) Download & Unpack either the Windows or Linux FTD2xx Drivers
296 (@uref{http://www.ftdichip.com/Drivers/D2XX.htm})
299 /home/duane/ftd2xx.win32 => the Cygwin/Win32 ZIP file contents.
300 /home/duane/libftd2xx0.4.16 => the Linux TAR file contents.
303 3) Configure with these options:
306 Cygwin FTCICHIP solution
307 ./configure --prefix=/home/duane/mytools \
308 --enable-ft2232_ftd2xx \
309 --with-ftd2xx-win32-zipdir=/home/duane/ftd2xx.win32
311 Linux FTDICHIP solution
312 ./configure --prefix=/home/duane/mytools \
313 --enable-ft2232_ftd2xx \
314 --with-ft2xx-linux-tardir=/home/duane/libftd2xx0.4.16
316 Cygwin/Linux LIBFTDI solution
318 1a) For Windows: The Windows port of LIBUSB is in place.
319 1b) For Linux: libusb has been built and is inplace.
321 2) And libftdi has been built and installed
322 Note: libftdi - relies upon libusb.
324 ./configure --prefix=/home/duane/mytools \
325 --enable-ft2232_libftdi
329 4) Then just type ``make'', and perhaps ``make install''.
332 @section Miscellaneous configure options
336 @option{--enable-gccwarnings} - enable extra gcc warnings during build.
339 @option{--enable-release} - enable building of a openocd release, generally
340 this is for developers. It simply omits the svn version string when the
341 openocd @option{-v} is executed.
344 @node JTAG Hardware Dongles
345 @chapter JTAG Hardware Dongles
354 Defined: @b{dongle}: A small device that plugins into a computer and serves as
355 an adapter .... [snip]
357 In the OpenOCD case, this generally refers to @b{a small adapater} one
358 attaches to your computer via USB or the Parallel Printer Port. The
359 execption being the Zylin ZY1000 which is a small box you attach via
363 @section Choosing a Dongle
365 There are three things you should keep in mind when choosing a dongle.
368 @item @b{Voltage} What voltage is your target? 1.8, 2.8, 3.3, or 5V? Does your dongle support it?
369 @item @b{Connection} Printer Ports - Does your computer have one?
370 @item @b{Connection} Is that long printer bit-bang cable practical?
371 @item @b{RTCK} Do you require RTCK? Also known as ``adaptive clocking''
374 @section Stand alone Systems
376 @b{ZY1000} See: @url{http://www.zylin.com/zy1000.html} Technically, not a
377 dongle, but a standalone box.
379 @section USB FT2232 Based
381 There are many USB JTAG dongles on the market, many of them are based
382 on a chip from ``Future Technology Devices International'' (FTDI)
383 known as the FTDI FT2232.
385 See: @url{http://www.ftdichip.com} or @url{http://www.ftdichip.com/Products/FT2232H.htm}
387 As of 28/Nov/2008, the following are supported:
391 @* Link @url{http://www.hs-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html}
393 @* See: @url{http://www.amontec.com/jtagkey.shtml}
395 @* See: @url{http://www.oocdlink.com} By Joern Kaipf
397 @* See: @url{http://www.signalyzer.com}
398 @item @b{evb_lm3s811}
399 @* See: @url{http://www.luminarymicro.com} - The Luminary Micro Stellaris LM3S811 eval board has an FTD2232C chip built in.
400 @item @b{olimex-jtag}
401 @* See: @url{http://www.olimex.com}
403 @* See: @url{http://www.tincantools.com}
404 @item @b{turtelizer2}
405 @* See: @url{http://www.ethernut.de}, or @url{http://www.ethernut.de/en/hardware/turtelizer/index.html}
407 @* Link: @url{http://www.hitex.com/index.php?id=383}
409 @* Link @url{http://www.hitex.com/stm32-stick}
410 @item @b{axm0432_jtag}
411 @* Axiom AXM-0432 Link @url{http://www.axman.com}
414 @section USB JLINK based
415 There are several OEM versions of the Segger @b{JLINK} adapter. It is
416 an example of a micro controller based JTAG adapter, it uses an
417 AT91SAM764 internally.
420 @item @b{ATMEL SAMICE} Only works with ATMEL chips!
421 @* Link: @url{http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3892}
422 @item @b{SEGGER JLINK}
423 @* Link: @url{http://www.segger.com/jlink.html}
425 @* Link: @url{http://www.iar.com/website1/1.0.1.0/369/1/index.php}
428 @section USB RLINK based
429 Raisonance has an adapter called @b{RLink}. It exists in a stripped-down form on the STM32 Primer, permanently attached to the JTAG lines. It also exists on the STM32 Primer2, but that is wired for SWD and not JTAG, thus not supported.
432 @item @b{Raisonance RLink}
433 @* Link: @url{http://www.raisonance.com/products/RLink.php}
434 @item @b{STM32 Primer}
435 @* Link: @url{http://www.stm32circle.com/resources/stm32primer.php}
436 @item @b{STM32 Primer2}
437 @* Link: @url{http://www.stm32circle.com/resources/stm32primer2.php}
443 @* Link: @url{http://www.embedded-projects.net/usbprog} - which uses an Atmel MEGA32 and a UBN9604
445 @item @b{USB - Presto}
446 @* Link: @url{http://tools.asix.net/prg_presto.htm}
448 @item @b{Versaloon-Link}
449 @* Link: @url{http://www.simonqian.com/en/Versaloon}
451 @item @b{ARM-JTAG-EW}
452 @* Link: @url{http://www.olimex.com/dev/arm-jtag-ew.html}
455 @section IBM PC Parallel Printer Port Based
457 The two well known ``JTAG Parallel Ports'' cables are the Xilnx DLC5
458 and the MacGraigor Wiggler. There are many clones and variations of
463 @item @b{Wiggler} - There are many clones of this.
464 @* Link: @url{http://www.macraigor.com/wiggler.htm}
466 @item @b{DLC5} - From XILINX - There are many clones of this
467 @* Link: Search the web for: ``XILINX DLC5'' - it is no longer
468 produced, PDF schematics are easily found and it is easy to make.
470 @item @b{Amontec - JTAG Accelerator}
471 @* Link: @url{http://www.amontec.com/jtag_accelerator.shtml}
474 @* Link: @url{http://www.gateworks.com/products/avila_accessories/gw16042.php}
477 @* Link: @url{http://www.ccac.rwth-aachen.de/~michaels/index.php/hardware/armjtag}
479 @item @b{Wiggler_ntrst_inverted}
480 @* Yet another variation - See the source code, src/jtag/parport.c
482 @item @b{old_amt_wiggler}
483 @* Unknown - probably not on the market today
486 @* Link: Most likely @url{http://www.olimex.com/dev/arm-jtag.html} [another wiggler clone]
489 @* Link: @url{http://www.amontec.com/chameleon.shtml}
495 @* ispDownload from Lattice Semiconductor @url{http://www.latticesemi.com/lit/docs/devtools/dlcable.pdf}
498 @* From ST Microsystems, link:
499 @url{http://www.st.com/stonline/products/literature/um/7889.pdf}
500 Title: FlashLINK JTAG programing cable for PSD and uPSD
508 @* An EP93xx based Linux machine using the GPIO pins directly.
511 @* Like the EP93xx - but an ATMEL AT91RM9200 based solution using the GPIO pins on the chip.
517 @cindex running OpenOCD
519 @cindex --debug_level
523 The @option{--help} option shows:
527 --help | -h display this help
528 --version | -v display OpenOCD version
529 --file | -f use configuration file <name>
530 --search | -s dir to search for config files and scripts
531 --debug | -d set debug level <0-3>
532 --log_output | -l redirect log output to file <name>
533 --command | -c run <command>
534 --pipe | -p use pipes when talking to gdb
537 By default OpenOCD reads the file configuration file ``openocd.cfg''
538 in the current directory. To specify a different (or multiple)
539 configuration file, you can use the ``-f'' option. For example:
542 openocd -f config1.cfg -f config2.cfg -f config3.cfg
545 Once started, OpenOCD runs as a daemon, waiting for connections from
546 clients (Telnet, GDB, Other).
548 If you are having problems, you can enable internal debug messages via
551 Also it is possible to interleave commands w/config scripts using the
552 @option{-c} command line switch.
554 To enable debug output (when reporting problems or working on OpenOCD
555 itself), use the @option{-d} command line switch. This sets the
556 @option{debug_level} to "3", outputting the most information,
557 including debug messages. The default setting is "2", outputting only
558 informational messages, warnings and errors. You can also change this
559 setting from within a telnet or gdb session using @option{debug_level
560 <n>} @xref{debug_level}.
562 You can redirect all output from the daemon to a file using the
563 @option{-l <logfile>} switch.
565 Search paths for config/script files can be added to OpenOCD by using
566 the @option{-s <search>} switch. The current directory and the OpenOCD
567 target library is in the search path by default.
569 For details on the @option{-p} option. @xref{Connecting to GDB}.
571 Note! OpenOCD will launch the GDB & telnet server even if it can not
572 establish a connection with the target. In general, it is possible for
573 the JTAG controller to be unresponsive until the target is set up
574 correctly via e.g. GDB monitor commands in a GDB init script.
576 @node Simple Configuration Files
577 @chapter Simple Configuration Files
578 @cindex configuration
581 There are 4 basic ways of ``configurating'' OpenOCD to run, they are:
584 @item A small openocd.cfg file which ``sources'' other configuration files
585 @item A monolithic openocd.cfg file
586 @item Many -f filename options on the command line
587 @item Your Mixed Solution
590 @section Small configuration file method
592 This is the preferred method. It is simple and works well for many
593 people. The developers of OpenOCD would encourage you to use this
594 method. If you create a new configuration please email new
595 configurations to the development list.
597 Here is an example of an openocd.cfg file for an ATMEL at91sam7x256
600 source [find interface/signalyzer.cfg]
602 # Change the default telnet port...
606 # GDB can also flash my flash!
607 gdb_memory_map enable
608 gdb_flash_program enable
610 source [find target/sam7x256.cfg]
613 There are many example configuration scripts you can work with. You
614 should look in the directory: @t{$(INSTALLDIR)/lib/openocd}. You
618 @item @b{board} - eval board level configurations
619 @item @b{interface} - specific dongle configurations
620 @item @b{target} - the target chips
621 @item @b{tcl} - helper scripts
622 @item @b{xscale} - things specific to the xscale.
625 Look first in the ``boards'' area, then the ``targets'' area. Often a board
626 configuration is a good example to work from.
628 @section Many -f filename options
629 Some believe this is a wonderful solution, others find it painful.
631 You can use a series of ``-f filename'' options on the command line,
632 OpenOCD will read each filename in sequence, for example:
635 openocd -f file1.cfg -f file2.cfg -f file2.cfg
638 You can also intermix various commands with the ``-c'' command line
641 @section Monolithic file
642 The ``Monolithic File'' dispenses with all ``source'' statements and
643 puts everything in one self contained (monolithic) file. This is not
646 Please try to ``source'' various files or use the multiple -f
649 @section Advice for you
650 Often, one uses a ``mixed approach''. Where possible, please try to
651 ``source'' common things, and if needed cut/paste parts of the
652 standard distribution configuration files as needed.
654 @b{REMEMBER:} The ``important parts'' of your configuration file are:
657 @item @b{Interface} - Defines the dongle
658 @item @b{Taps} - Defines the JTAG Taps
659 @item @b{GDB Targets} - What GDB talks to
660 @item @b{Flash Programing} - Very Helpful
663 Some key things you should look at and understand are:
666 @item The RESET configuration of your debug environment as a whole
667 @item Is there a ``work area'' that OpenOCD can use?
668 @* For ARM - work areas mean up to 10x faster downloads.
669 @item For MMU/MPU based ARM chips (i.e.: ARM9 and later) will that work area still be available?
670 @item For complex targets (multiple chips) the JTAG SPEED becomes an issue.
675 @node Config File Guidelines
676 @chapter Config File Guidelines
678 This section/chapter is aimed at developers and integrators of
679 OpenOCD. These are guidelines for creating new boards and new target
680 configurations as of 28/Nov/2008.
682 However, you, the user of OpenOCD, should be somewhat familiar with
683 this section as it should help explain some of the internals of what
684 you might be looking at.
686 The user should find the following directories under @t{$(INSTALLDIR)/lib/openocd} :
690 @*Think JTAG Dongle. Files that configure the JTAG dongle go here.
692 @* Think Circuit Board, PWA, PCB, they go by many names. Board files
693 contain initialization items that are specific to a board - for
694 example: The SDRAM initialization sequence for the board, or the type
695 of external flash and what address it is found at. Any initialization
696 sequence to enable that external flash or SDRAM should be found in the
697 board file. Boards may also contain multiple targets, i.e.: Two CPUs, or
698 a CPU and an FPGA or CPLD.
700 @* Think chip. The ``target'' directory represents a JTAG tap (or
701 chip) OpenOCD should control, not a board. Two common types of targets
702 are ARM chips and FPGA or CPLD chips.
705 @b{If needed...} The user in their ``openocd.cfg'' file or the board
706 file might override a specific feature in any of the above files by
707 setting a variable or two before sourcing the target file. Or adding
708 various commands specific to their situation.
710 @section Interface Config Files
712 The user should be able to source one of these files via a command like this:
715 source [find interface/FOOBAR.cfg]
717 openocd -f interface/FOOBAR.cfg
720 A preconfigured interface file should exist for every interface in use
721 today, that said, perhaps some interfaces have only been used by the
722 sole developer who created it.
724 @b{FIXME/NOTE:} We need to add support for a variable like Tcl variable
725 tcl_platform(platform), it should be called jim_platform (because it
726 is jim, not real tcl) and it should contain 1 of 3 words: ``linux'',
727 ``cygwin'' or ``mingw''
729 Interface files should be found in @t{$(INSTALLDIR)/lib/openocd/interface}
731 @section Board Config Files
733 @b{Note: BOARD directory NEW as of 28/nov/2008}
735 The user should be able to source one of these files via a command like this:
738 source [find board/FOOBAR.cfg]
740 openocd -f board/FOOBAR.cfg
744 The board file should contain one or more @t{source [find
745 target/FOO.cfg]} statements along with any board specific things.
747 In summary the board files should contain (if present)
750 @item External flash configuration (i.e.: the flash on CS0)
751 @item SDRAM configuration (size, speed, etc.
752 @item Board specific IO configuration (i.e.: GPIO pins might disable a 2nd flash)
753 @item Multiple TARGET source statements
754 @item All things that are not ``inside a chip''
755 @item Things inside a chip go in a 'target' file
758 @section Target Config Files
760 The user should be able to source one of these files via a command like this:
763 source [find target/FOOBAR.cfg]
765 openocd -f target/FOOBAR.cfg
768 In summary the target files should contain
773 @item Reset Configuration
775 @item CPU/Chip/CPU-Core Specific features
779 @subsection Important variable names
781 By default, the end user should never need to set these
782 variables. However, if the user needs to override a setting they only
783 need to set the variable in a simple way.
787 @* This gives a name to the overall chip, and is used as part of the
788 tap identifier dotted name.
790 @* By default little - unless the chip or board is not normally used that way.
792 @* When OpenOCD examines the JTAG chain, it will attempt to identify
793 every chip. If the @t{-expected-id} is nonzero, OpenOCD attempts
794 to verify the tap id number verses configuration file and may issue an
795 error or warning like this. The hope is that this will help to pinpoint
796 problems in OpenOCD configurations.
799 Info: JTAG tap: sam7x256.cpu tap/device found: 0x3f0f0f0f (Manufacturer: 0x787, Part: 0xf0f0, Version: 0x3)
800 Error: ERROR: Tap: sam7x256.cpu - Expected id: 0x12345678, Got: 0x3f0f0f0f
801 Error: ERROR: expected: mfg: 0x33c, part: 0x2345, ver: 0x1
802 Error: ERROR: got: mfg: 0x787, part: 0xf0f0, ver: 0x3
805 @item @b{_TARGETNAME}
806 @* By convention, this variable is created by the target configuration
807 script. The board configuration file may make use of this variable to
808 configure things like a ``reset init'' script, or other things
809 specific to that board and that target.
811 If the chip has 2 targets, use the names @b{_TARGETNAME0},
812 @b{_TARGETNAME1}, ... etc.
814 @b{Remember:} The ``board file'' may include multiple targets.
816 At no time should the name ``target0'' (the default target name if
817 none was specified) be used. The name ``target0'' is a hard coded name
818 - the next target on the board will be some other number.
820 The user (or board file) should reasonably be able to:
823 source [find target/FOO.cfg]
824 $_TARGETNAME configure ... FOO specific parameters
826 source [find target/BAR.cfg]
827 $_TARGETNAME configure ... BAR specific parameters
832 @subsection Tcl Variables Guide Line
833 The Full Tcl/Tk language supports ``namespaces'' - JIM-Tcl does not.
835 Thus the rule we follow in OpenOCD is this: Variables that begin with
836 a leading underscore are temporary in nature, and can be modified and
837 used at will within a ?TARGET? configuration file.
839 @b{EXAMPLE:} The user should be able to do this:
843 # PXA270 #1 network side, big endian
844 # PXA270 #2 video side, little endian
848 source [find target/pxa270.cfg]
849 # variable: _TARGETNAME = network.cpu
850 # other commands can refer to the "network.cpu" tap.
851 $_TARGETNAME configure .... params for this CPU..
855 source [find target/pxa270.cfg]
856 # variable: _TARGETNAME = video.cpu
857 # other commands can refer to the "video.cpu" tap.
858 $_TARGETNAME configure .... params for this CPU..
862 source [find target/spartan3.cfg]
864 # Since $_TARGETNAME is temporal..
865 # these names still work!
866 network.cpu configure ... params
867 video.cpu configure ... params
871 @subsection Default Value Boiler Plate Code
873 All target configuration files should start with this (or a modified form)
877 if @{ [info exists CHIPNAME] @} @{
878 set _CHIPNAME $CHIPNAME
880 set _CHIPNAME sam7x256
883 if @{ [info exists ENDIAN] @} @{
889 if @{ [info exists CPUTAPID ] @} @{
890 set _CPUTAPID $CPUTAPID
892 set _CPUTAPID 0x3f0f0f0f
897 @subsection Creating Taps
898 After the ``defaults'' are choosen [see above] the taps are created.
900 @b{SIMPLE example:} such as an Atmel AT91SAM7X256
904 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
905 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
910 This is an SNIP/example for an STR912 - which has 3 internal taps. Key features shown:
913 @item @b{Unform tap names} - See: Tap Naming Convention
914 @item @b{_TARGETNAME} is created at the end where used.
918 if @{ [info exists FLASHTAPID ] @} @{
919 set _FLASHTAPID $FLASHTAPID
921 set _FLASHTAPID 0x25966041
923 jtag newtap $_CHIPNAME flash -irlen 8 -ircapture 0x1 -irmask 0x1 -expected-id $_FLASHTAPID
925 if @{ [info exists CPUTAPID ] @} @{
926 set _CPUTAPID $CPUTAPID
928 set _CPUTAPID 0x25966041
930 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0xf -irmask 0xe -expected-id $_CPUTAPID
933 if @{ [info exists BSTAPID ] @} @{
934 set _BSTAPID $BSTAPID
936 set _BSTAPID 0x1457f041
938 jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID
940 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
943 @b{Tap Naming Convention}
945 See the command ``jtag newtap'' for detail, but in brief the names you should use are:
953 @item @b{unknownN} - it happens :-(
956 @subsection Reset Configuration
958 Some chips have specific ways the TRST and SRST signals are
959 managed. If these are @b{CHIP SPECIFIC} they go here, if they are
960 @b{BOARD SPECIFIC} they go in the board file.
962 @subsection Work Areas
964 Work areas are small RAM areas used by OpenOCD to speed up downloads,
965 and to download small snippets of code to program flash chips.
967 If the chip includes a form of ``on-chip-ram'' - and many do - define
968 a reasonable work area and use the ``backup'' option.
970 @b{PROBLEMS:} On more complex chips, this ``work area'' may become
971 inaccessible if/when the application code enables or disables the MMU.
973 @subsection ARM Core Specific Hacks
975 If the chip has a DCC, enable it. If the chip is an ARM9 with some
976 special high speed download features - enable it.
978 If the chip has an ARM ``vector catch'' feature - by default enable
979 it for Undefined Instructions, Data Abort, and Prefetch Abort, if the
980 user is really writing a handler for those situations - they can
981 easily disable it. Experiance has shown the ``vector catch'' is
982 helpful - for common programing errors.
984 If present, the MMU, the MPU and the CACHE should be disabled.
986 @subsection Internal Flash Configuration
988 This applies @b{ONLY TO MICROCONTROLLERS} that have flash built in.
990 @b{Never ever} in the ``target configuration file'' define any type of
991 flash that is external to the chip. (For example the BOOT flash on
992 Chip Select 0). The BOOT flash information goes in a board file - not
993 the TARGET (chip) file.
997 @item at91sam7x256 - has 256K flash YES enable it.
998 @item str912 - has flash internal YES enable it.
999 @item imx27 - uses boot flash on CS0 - it goes in the board file.
1000 @item pxa270 - again - CS0 flash - it goes in the board file.
1004 @chapter About JIM-Tcl
1008 OpenOCD includes a small ``TCL Interpreter'' known as JIM-TCL. You can
1009 learn more about JIM here: @url{http://jim.berlios.de}
1012 @item @b{JIM vs. Tcl}
1013 @* JIM-TCL is a stripped down version of the well known Tcl language,
1014 which can be found here: @url{http://www.tcl.tk}. JIM-Tcl has far
1015 fewer features. JIM-Tcl is a single .C file and a single .H file and
1016 impliments the basic Tcl command set along. In contrast: Tcl 8.6 is a
1017 4.2 MB .zip file containing 1540 files.
1019 @item @b{Missing Features}
1020 @* Our practice has been: Add/clone the real Tcl feature if/when
1021 needed. We welcome JIM Tcl improvements, not bloat.
1024 @* OpenOCD configuration scripts are JIM Tcl Scripts. OpenOCD's
1025 command interpreter today (28/nov/2008) is a mixture of (newer)
1026 JIM-Tcl commands, and (older) the orginal command interpreter.
1029 @* At the OpenOCD telnet command line (or via the GDB mon command) one
1030 can type a Tcl for() loop, set variables, etc.
1032 @item @b{Historical Note}
1033 @* JIM-Tcl was introduced to OpenOCD in spring 2008.
1035 @item @b{Need a Crash Course In Tcl?}
1036 @* See: @xref{Tcl Crash Course}.
1040 @node Daemon Configuration
1041 @chapter Daemon Configuration
1042 The commands here are commonly found in the openocd.cfg file and are
1043 used to specify what TCP/IP ports are used, and how GDB should be
1047 This command terminates the configuration stage and
1048 enters the normal command mode. This can be useful to add commands to
1049 the startup scripts and commands such as resetting the target,
1050 programming flash, etc. To reset the CPU upon startup, add "init" and
1051 "reset" at the end of the config script or at the end of the OpenOCD
1052 command line using the @option{-c} command line switch.
1054 If this command does not appear in any startup/configuration file
1055 OpenOCD executes the command for you after processing all
1056 configuration files and/or command line options.
1058 @b{NOTE:} This command normally occurs at or near the end of your
1059 openocd.cfg file to force OpenOCD to ``initialize'' and make the
1060 targets ready. For example: If your openocd.cfg file needs to
1061 read/write memory on your target - the init command must occur before
1062 the memory read/write commands.
1064 @section TCP/IP Ports
1066 @item @b{telnet_port} <@var{number}>
1068 @*Intended for a human. Port on which to listen for incoming telnet connections.
1070 @item @b{tcl_port} <@var{number}>
1072 @*Intended as a machine interface. Port on which to listen for
1073 incoming Tcl syntax. This port is intended as a simplified RPC
1074 connection that can be used by clients to issue commands and get the
1075 output from the Tcl engine.
1077 @item @b{gdb_port} <@var{number}>
1079 @*First port on which to listen for incoming GDB connections. The GDB port for the
1080 first target will be gdb_port, the second target will listen on gdb_port + 1, and so on.
1085 @item @b{gdb_breakpoint_override} <@var{hard|soft|disable}>
1086 @cindex gdb_breakpoint_override
1087 @anchor{gdb_breakpoint_override}
1088 @*Force breakpoint type for gdb 'break' commands.
1089 The raison d'etre for this option is to support GDB GUI's without
1090 a hard/soft breakpoint concept where the default OpenOCD and
1091 GDB behavior is not sufficient. Note that GDB will use hardware
1092 breakpoints if the memory map has been set up for flash regions.
1094 This option replaces older arm7_9 target commands that addressed
1097 @item @b{gdb_detach} <@var{resume|reset|halt|nothing}>
1099 @*Configures what OpenOCD will do when GDB detaches from the daemon.
1100 Default behavior is <@var{resume}>
1102 @item @b{gdb_memory_map} <@var{enable|disable}>
1103 @cindex gdb_memory_map
1104 @*Set to <@var{enable}> to cause OpenOCD to send the memory configuration to GDB when
1105 requested. GDB will then know when to set hardware breakpoints, and program flash
1106 using the GDB load command. @option{gdb_flash_program enable} must also be enabled
1107 for flash programming to work.
1108 Default behavior is <@var{enable}>
1109 @xref{gdb_flash_program}.
1111 @item @b{gdb_flash_program} <@var{enable|disable}>
1112 @cindex gdb_flash_program
1113 @anchor{gdb_flash_program}
1114 @*Set to <@var{enable}> to cause OpenOCD to program the flash memory when a
1115 vFlash packet is received.
1116 Default behavior is <@var{enable}>
1117 @comment END GDB Items
1120 @node Interface - Dongle Configuration
1121 @chapter Interface - Dongle Configuration
1122 Interface commands are normally found in an interface configuration
1123 file which is sourced by your openocd.cfg file. These commands tell
1124 OpenOCD what type of JTAG dongle you have and how to talk to it.
1125 @section Simple Complete Interface Examples
1126 @b{A Turtelizer FT2232 Based JTAG Dongle}
1130 ft2232_device_desc "Turtelizer JTAG/RS232 Adapter A"
1131 ft2232_layout turtelizer2
1132 ft2232_vid_pid 0x0403 0xbdc8
1139 @b{A Raisonance RLink}
1148 parport_cable wiggler
1153 interface arm-jtag-ew
1155 @section Interface Command
1157 The interface command tells OpenOCD what type of JTAG dongle you are
1158 using. Depending on the type of dongle, you may need to have one or
1159 more additional commands.
1163 @item @b{interface} <@var{name}>
1165 @*Use the interface driver <@var{name}> to connect to the
1166 target. Currently supported interfaces are
1171 @* PC parallel port bit-banging (Wigglers, PLD download cable, ...)
1173 @item @b{amt_jtagaccel}
1174 @* Amontec Chameleon in its JTAG Accelerator configuration connected to a PC's EPP
1178 @* FTDI FT2232 (USB) based devices using either the open-source libftdi or the binary only
1179 FTD2XX driver. The FTD2XX is superior in performance, but not available on every
1180 platform. The libftdi uses libusb, and should be portable to all systems that provide
1184 @*Cirrus Logic EP93xx based single-board computer bit-banging (in development)
1187 @* ASIX PRESTO USB JTAG programmer.
1190 @* usbprog is a freely programmable USB adapter.
1193 @* Gateworks GW16012 JTAG programmer.
1196 @* Segger jlink USB adapter
1199 @* Raisonance RLink USB adapter
1202 @* vsllink is part of Versaloon which is a versatile USB programmer.
1204 @item @b{arm-jtag-ew}
1205 @* Olimex ARM-JTAG-EW USB adapter
1206 @comment - End parameters
1208 @comment - End Interface
1210 @subsection parport options
1213 @item @b{parport_port} <@var{number}>
1214 @cindex parport_port
1215 @*Either the address of the I/O port (default: 0x378 for LPT1) or the number of
1216 the @file{/dev/parport} device
1218 When using PPDEV to access the parallel port, use the number of the parallel port:
1219 @option{parport_port 0} (the default). If @option{parport_port 0x378} is specified
1220 you may encounter a problem.
1221 @item @b{parport_cable} <@var{name}>
1222 @cindex parport_cable
1223 @*The layout of the parallel port cable used to connect to the target.
1224 Currently supported cables are
1228 The original Wiggler layout, also supported by several clones, such
1229 as the Olimex ARM-JTAG
1232 Same as original wiggler except an led is fitted on D5.
1233 @item @b{wiggler_ntrst_inverted}
1234 @cindex wiggler_ntrst_inverted
1235 Same as original wiggler except TRST is inverted.
1236 @item @b{old_amt_wiggler}
1237 @cindex old_amt_wiggler
1238 The Wiggler configuration that comes with Amontec's Chameleon Programmer. The new
1239 version available from the website uses the original Wiggler layout ('@var{wiggler}')
1242 The Amontec Chameleon's CPLD when operated in configuration mode. This is only used to
1243 program the Chameleon itself, not a connected target.
1246 The Xilinx Parallel cable III.
1249 The parallel port adapter found on the 'Karo Triton 1 Development Board'.
1250 This is also the layout used by the HollyGates design
1251 (see @uref{http://www.lartmaker.nl/projects/jtag/}).
1254 The ST Parallel cable.
1257 Same as original wiggler except SRST and TRST connections reversed and
1258 TRST is also inverted.
1261 Altium Universal JTAG cable.
1263 @item @b{parport_write_on_exit} <@var{on}|@var{off}>
1264 @cindex parport_write_on_exit
1265 @*This will configure the parallel driver to write a known value to the parallel
1266 interface on exiting OpenOCD
1269 @subsection amt_jtagaccel options
1271 @item @b{parport_port} <@var{number}>
1272 @cindex parport_port
1273 @*Either the address of the I/O port (default: 0x378 for LPT1) or the number of the
1274 @file{/dev/parport} device
1276 @subsection ft2232 options
1279 @item @b{ft2232_device_desc} <@var{description}>
1280 @cindex ft2232_device_desc
1281 @*The USB device description of the FTDI FT2232 device. If not
1282 specified, the FTDI default value is used. This setting is only valid
1283 if compiled with FTD2XX support.
1285 @b{TODO:} Confirm the following: On Windows the name needs to end with
1286 a ``space A''? Or not? It has to do with the FTD2xx driver. When must
1287 this be added and when must it not be added? Why can't the code in the
1288 interface or in OpenOCD automatically add this if needed? -- Duane.
1290 @item @b{ft2232_serial} <@var{serial-number}>
1291 @cindex ft2232_serial
1292 @*The serial number of the FTDI FT2232 device. If not specified, the FTDI default
1294 @item @b{ft2232_layout} <@var{name}>
1295 @cindex ft2232_layout
1296 @*The layout of the FT2232 GPIO signals used to control output-enables and reset
1297 signals. Valid layouts are
1300 "USBJTAG-1" layout described in the original OpenOCD diploma thesis
1302 Amontec JTAGkey and JTAGkey-Tiny
1303 @item @b{signalyzer}
1305 @item @b{olimex-jtag}
1308 American Microsystems M5960
1309 @item @b{evb_lm3s811}
1310 Luminary Micro EVB_LM3S811 as a JTAG interface (not onboard processor), no TRST or
1311 SRST signals on external connector
1314 @item @b{stm32stick}
1315 Hitex STM32 Performance Stick
1316 @item @b{flyswatter}
1317 Tin Can Tools Flyswatter
1318 @item @b{turtelizer2}
1319 egnite Software turtelizer2
1322 @item @b{axm0432_jtag}
1326 @item @b{ft2232_vid_pid} <@var{vid}> <@var{pid}>
1327 @*The vendor ID and product ID of the FTDI FT2232 device. If not specified, the FTDI
1328 default values are used. Multiple <@var{vid}>, <@var{pid}> pairs may be given, e.g.
1330 ft2232_vid_pid 0x0403 0xcff8 0x15ba 0x0003
1332 @item @b{ft2232_latency} <@var{ms}>
1333 @*On some systems using FT2232 based JTAG interfaces the FT_Read function call in
1334 ft2232_read() fails to return the expected number of bytes. This can be caused by
1335 USB communication delays and has proved hard to reproduce and debug. Setting the
1336 FT2232 latency timer to a larger value increases delays for short USB packets but it
1337 also reduces the risk of timeouts before receiving the expected number of bytes.
1338 The OpenOCD default value is 2 and for some systems a value of 10 has proved useful.
1341 @subsection ep93xx options
1342 @cindex ep93xx options
1343 Currently, there are no options available for the ep93xx interface.
1347 @item @b{jtag_khz} <@var{reset speed kHz}>
1350 It is debatable if this command belongs here - or in a board
1351 configuration file. In fact, in some situations the JTAG speed is
1352 changed during the target initialization process (i.e.: (1) slow at
1353 reset, (2) program the CPU clocks, (3) run fast)
1355 Speed 0 (khz) selects RTCK method. A non-zero speed is in KHZ. Hence: 3000 is 3mhz.
1357 Not all interfaces support ``rtck''. If the interface device can not
1358 support the rate asked for, or can not translate from kHz to
1359 jtag_speed, then an error is returned.
1361 Make sure the JTAG clock is no more than @math{1/6th × CPU-Clock}. This is
1362 especially true for synthesized cores (-S). Also see RTCK.
1364 @b{NOTE: Script writers} If the target chip requires/uses RTCK -
1365 please use the command: 'jtag_rclk FREQ'. This Tcl proc (in
1366 startup.tcl) attempts to enable RTCK, if that fails it falls back to
1367 the specified frequency.
1370 # Fall back to 3mhz if RCLK is not supported
1374 @item @b{DEPRECATED} @b{jtag_speed} - please use jtag_khz above.
1376 @*Limit the maximum speed of the JTAG interface. Usually, a value of zero means maximum
1377 speed. The actual effect of this option depends on the JTAG interface used.
1379 The speed used during reset can be adjusted using setting jtag_speed during
1380 pre_reset and post_reset events.
1383 @item wiggler: maximum speed / @var{number}
1384 @item ft2232: 6MHz / (@var{number}+1)
1385 @item amt jtagaccel: 8 / 2**@var{number}
1386 @item jlink: maximum speed in kHz (0-12000), 0 will use RTCK
1387 @item rlink: 24MHz / @var{number}, but only for certain values of @var{number}
1388 @comment end speed list.
1391 @comment END command list
1394 @node Reset Configuration
1395 @chapter Reset Configuration
1396 @cindex reset configuration
1398 Every system configuration may require a different reset
1399 configuration. This can also be quite confusing. Please see the
1400 various board files for example.
1402 @section jtag_nsrst_delay <@var{ms}>
1403 @cindex jtag_nsrst_delay
1404 @*How long (in milliseconds) OpenOCD should wait after deasserting
1405 nSRST before starting new JTAG operations.
1407 @section jtag_ntrst_delay <@var{ms}>
1408 @cindex jtag_ntrst_delay
1409 @*Same @b{jtag_nsrst_delay}, but for nTRST
1411 The jtag_n[st]rst_delay options are useful if reset circuitry (like a
1412 big resistor/capacitor, reset supervisor, or on-chip features). This
1413 keeps the signal asserted for some time after the external reset got
1416 @section reset_config
1418 @b{Note:} To maintainer and integrators: Where exactly the
1419 ``reset configuration'' goes is a good question. It touches several
1420 things at once. In the end, if you have a board file - the board file
1421 should define it and assume 100% that the DONGLE supports
1422 anything. However, that does not mean the target should not also make
1423 not of something the silicon vendor has done inside the
1424 chip. @i{Grr.... nothing is every pretty.}
1428 @item Every JTAG Dongle is slightly different, some dongles implement reset differently.
1429 @item Every board is also slightly different; some boards tie TRST and SRST together.
1430 @item Every chip is slightly different; some chips internally tie the two signals together.
1431 @item Some may not implement all of the signals the same way.
1432 @item Some signals might be push-pull, others open-drain/collector.
1434 @b{Best Case:} OpenOCD can hold the SRST (push-button-reset), then
1435 reset the TAP via TRST and send commands through the JTAG tap to halt
1436 the CPU at the reset vector before the 1st instruction is executed,
1437 and finally release the SRST signal.
1438 @*Depending on your board vendor, chip vendor, etc., these
1439 signals may have slightly different names.
1441 OpenOCD defines these signals in these terms:
1443 @item @b{TRST} - is Tap Reset - and should reset only the TAP.
1444 @item @b{SRST} - is System Reset - typically equal to a reset push button.
1450 @item @b{reset_config} <@var{signals}> [@var{combination}] [@var{trst_type}] [@var{srst_type}]
1451 @cindex reset_config
1452 @* The @t{reset_config} command tells OpenOCD the reset configuration
1453 of your combination of Dongle, Board, and Chips.
1454 If the JTAG interface provides SRST, but the target doesn't connect
1455 that signal properly, then OpenOCD can't use it. <@var{signals}> can
1456 be @option{none}, @option{trst_only}, @option{srst_only} or
1457 @option{trst_and_srst}.
1459 [@var{combination}] is an optional value specifying broken reset
1460 signal implementations. @option{srst_pulls_trst} states that the
1461 test logic is reset together with the reset of the system (e.g. Philips
1462 LPC2000, "broken" board layout), @option{trst_pulls_srst} says that
1463 the system is reset together with the test logic (only hypothetical, I
1464 haven't seen hardware with such a bug, and can be worked around).
1465 @option{combined} implies both @option{srst_pulls_trst} and
1466 @option{trst_pulls_srst}. The default behavior if no option given is
1469 The [@var{trst_type}] and [@var{srst_type}] parameters allow the
1470 driver type of the reset lines to be specified. Possible values are
1471 @option{trst_push_pull} (default) and @option{trst_open_drain} for the
1472 test reset signal, and @option{srst_open_drain} (default) and
1473 @option{srst_push_pull} for the system reset. These values only affect
1474 JTAG interfaces with support for different drivers, like the Amontec
1475 JTAGkey and JTAGAccelerator.
1477 @comment - end command
1483 @chapter Tap Creation
1484 @cindex tap creation
1485 @cindex tap configuration
1487 In order for OpenOCD to control a target, a JTAG tap must be
1490 Commands to create taps are normally found in a configuration file and
1491 are not normally typed by a human.
1493 When a tap is created a @b{dotted.name} is created for the tap. Other
1494 commands use that dotted.name to manipulate or refer to the tap.
1498 @item @b{Debug Target} A tap can be used by a GDB debug target
1499 @item @b{Flash Programing} Some chips program the flash via JTAG
1500 @item @b{Boundry Scan} Some chips support boundary scan.
1504 @section jtag newtap
1505 @b{@t{jtag newtap CHIPNAME TAPNAME configparams ....}}
1510 @cindex tap geometry
1512 @comment START options
1515 @* is a symbolic name of the chip.
1517 @* is a symbol name of a tap present on the chip.
1518 @item @b{Required configparams}
1519 @* Every tap has 3 required configparams, and several ``optional
1520 parameters'', the required parameters are:
1521 @comment START REQUIRED
1523 @item @b{-irlen NUMBER} - the length in bits of the instruction register, mostly 4 or 5 bits.
1524 @item @b{-ircapture NUMBER} - the IDCODE capture command, usually 0x01.
1525 @item @b{-irmask NUMBER} - the corresponding mask for the IR register. For
1526 some devices, there are bits in the IR that aren't used. This lets you mask
1527 them off when doing comparisons. In general, this should just be all ones for
1529 @comment END REQUIRED
1531 An example of a FOOBAR tap
1533 jtag newtap foobar tap -irlen 7 -ircapture 0x42 -irmask 0x55
1535 Creates the tap ``foobar.tap'' with the instruction register (IR) is 7
1536 bits long, during Capture-IR 0x42 is loaded into the IR, and bits
1537 [6,4,2,0] are checked.
1539 @item @b{Optional configparams}
1540 @comment START Optional
1542 @item @b{-expected-id NUMBER}
1543 @* By default it is zero. If non-zero represents the
1544 expected tap ID used when the JTAG chain is examined. See below.
1547 @* By default not specified the tap is enabled. Some chips have a
1548 JTAG route controller (JRC) that is used to enable and/or disable
1549 specific JTAG taps. You can later enable or disable any JTAG tap via
1550 the command @b{jtag tapenable DOTTED.NAME} or @b{jtag tapdisable
1552 @comment END Optional
1555 @comment END OPTIONS
1558 @comment START NOTES
1560 @item @b{Technically}
1561 @* newtap is a sub command of the ``jtag'' command
1562 @item @b{Big Picture Background}
1563 @*GDB Talks to OpenOCD using the GDB protocol via
1564 TCP/IP. OpenOCD then uses the JTAG interface (the dongle) to
1565 control the JTAG chain on your board. Your board has one or more chips
1566 in a @i{daisy chain configuration}. Each chip may have one or more
1567 JTAG taps. GDB ends up talking via OpenOCD to one of the taps.
1568 @item @b{NAME Rules}
1569 @*Names follow ``C'' symbol name rules (start with alpha ...)
1570 @item @b{TAPNAME - Conventions}
1572 @item @b{tap} - should be used only FPGA or CPLD like devices with a single tap.
1573 @item @b{cpu} - the main CPU of the chip, alternatively @b{foo.arm} and @b{foo.dsp}
1574 @item @b{flash} - if the chip has a flash tap, example: str912.flash
1575 @item @b{bs} - for boundary scan if this is a seperate tap.
1576 @item @b{jrc} - for JTAG route controller (example: OMAP3530 found on Beagleboards)
1577 @item @b{unknownN} - where N is a number if you have no idea what the tap is for
1578 @item @b{Other names} - Freescale IMX31 has a SDMA (smart dma) with a JTAG tap, that tap should be called the ``sdma'' tap.
1579 @item @b{When in doubt} - use the chip maker's name in their data sheet.
1581 @item @b{DOTTED.NAME}
1582 @* @b{CHIPNAME}.@b{TAPNAME} creates the tap name, aka: the
1583 @b{Dotted.Name} is the @b{CHIPNAME} and @b{TAPNAME} combined with a
1584 dot (period); for example: @b{xilinx.tap}, @b{str912.flash},
1585 @b{omap3530.jrc}, or @b{stm32.cpu} The @b{dotted.name} is used in
1586 numerous other places to refer to various taps.
1588 @* The order this command appears via the config files is
1590 @item @b{Multi Tap Example}
1591 @* This example is based on the ST Microsystems STR912. See the ST
1592 document titled: @b{STR91xFAxxx, Section 3.15 Jtag Interface, Page:
1593 28/102, Figure 3: JTAG chaining inside the STR91xFA}.
1595 @url{http://eu.st.com/stonline/products/literature/ds/13495.pdf}
1596 @*@b{checked: 28/nov/2008}
1598 The diagram shows that the TDO pin connects to the flash tap, flash TDI
1599 connects to the CPU debug tap, CPU TDI connects to the boundary scan
1600 tap which then connects to the TDI pin.
1604 # create tap: 'str912.flash'
1605 jtag newtap str912 flash ... params ...
1606 # create tap: 'str912.cpu'
1607 jtag newtap str912 cpu ... params ...
1608 # create tap: 'str912.bs'
1609 jtag newtap str912 bs ... params ...
1612 @item @b{Note: Deprecated} - Index Numbers
1613 @* Prior to 28/nov/2008, JTAG taps where numbered from 0..N this
1614 feature is still present, however its use is highly discouraged and
1615 should not be counted upon.
1616 @item @b{Multiple chips}
1617 @* If your board has multiple chips, you should be
1618 able to @b{source} two configuration files, in the proper order, and
1619 have the taps created in the proper order.
1622 @comment at command level
1623 @comment DOCUMENT old command
1624 @section jtag_device - REMOVED
1626 @b{jtag_device} <@var{IR length}> <@var{IR capture}> <@var{IR mask}> <@var{IDCODE instruction}>
1630 @* @b{Removed: 28/nov/2008} This command has been removed and replaced
1631 by the ``jtag newtap'' command. The documentation remains here so that
1632 one can easily convert the old syntax to the new syntax. About the old
1633 syntax: The old syntax is positional, i.e.: The 3rd parameter is the
1634 ``irmask''. The new syntax requires named prefixes, and supports
1635 additional options, for example ``-expected-id 0x3f0f0f0f''. Please refer to the
1636 @b{jtag newtap} command for details.
1638 OLD: jtag_device 8 0x01 0xe3 0xfe
1639 NEW: jtag newtap CHIPNAME TAPNAME -irlen 8 -ircapture 0x01 -irmask 0xe3
1642 @section Enable/Disable Taps
1643 @b{Note:} These commands are intended to be used as a machine/script
1644 interface. Humans might find the ``scan_chain'' command more helpful
1645 when querying the state of the JTAG taps.
1647 @b{By default, all taps are enabled}
1650 @item @b{jtag tapenable} @var{DOTTED.NAME}
1651 @item @b{jtag tapdisable} @var{DOTTED.NAME}
1652 @item @b{jtag tapisenabled} @var{DOTTED.NAME}
1657 @cindex route controller
1659 These commands are used when your target has a JTAG route controller
1660 that effectively adds or removes a tap from the JTAG chain in a
1663 The ``standard way'' to remove a tap would be to place the tap in
1664 bypass mode. But with the advent of modern chips, this is not always a
1665 good solution. Some taps operate slowly, others operate fast, and
1666 there are other JTAG clock synchronization problems one must face. To
1667 solve that problem, the JTAG route controller was introduced. Rather
1668 than ``bypass'' the tap, the tap is completely removed from the
1669 circuit and skipped.
1672 From OpenOCD's point of view, a JTAG tap is in one of 3 states:
1675 @item @b{Enabled - Not In ByPass} and has a variable bit length
1676 @item @b{Enabled - In ByPass} and has a length of exactly 1 bit.
1677 @item @b{Disabled} and has a length of ZERO and is removed from the circuit.
1680 The IEEE JTAG definition has no concept of a ``disabled'' tap.
1681 @b{Historical note:} this feature was added 28/nov/2008
1683 @b{jtag tapisenabled DOTTED.NAME}
1685 This command returns 1 if the named tap is currently enabled, 0 if not.
1686 This command exists so that scripts that manipulate a JRC (like the
1687 OMAP3530 has) can determine if OpenOCD thinks a tap is presently
1688 enabled or disabled.
1691 @node Target Configuration
1692 @chapter Target Configuration
1694 This chapter discusses how to create a GDB debug target. Before
1695 creating a ``target'' a JTAG tap DOTTED.NAME must exist first.
1697 @section targets [NAME]
1698 @b{Note:} This command name is PLURAL - not singular.
1700 With NO parameter, this plural @b{targets} command lists all known
1701 targets in a human friendly form.
1703 With a parameter, this plural @b{targets} command sets the current
1704 target to the given name. (i.e.: If there are multiple debug targets)
1709 CmdName Type Endian ChainPos State
1710 -- ---------- ---------- ---------- -------- ----------
1711 0: target0 arm7tdmi little 0 halted
1714 @section target COMMANDS
1715 @b{Note:} This command name is SINGULAR - not plural. It is used to
1716 manipulate specific targets, to create targets and other things.
1718 Once a target is created, a TARGETNAME (object) command is created;
1719 see below for details.
1721 The TARGET command accepts these sub-commands:
1723 @item @b{create} .. parameters ..
1724 @* creates a new target, see below for details.
1726 @* Lists all supported target types (perhaps some are not yet in this document).
1728 @* Lists all current debug target names, for example: 'str912.cpu' or 'pxa27.cpu' example usage:
1730 foreach t [target names] {
1731 puts [format "Target: %s\n" $t]
1735 @* Returns the current target. OpenOCD always has, or refers to the ``current target'' in some way.
1736 By default, commands like: ``mww'' (used to write memory) operate on the current target.
1737 @item @b{number} @b{NUMBER}
1738 @* Internally OpenOCD maintains a list of targets - in numerical index
1739 (0..N-1) this command returns the name of the target at index N.
1742 set thename [target number $x]
1743 puts [format "Target %d is: %s\n" $x $thename]
1746 @* Returns the number of targets known to OpenOCD (see number above)
1749 set c [target count]
1750 for { set x 0 } { $x < $c } { incr x } {
1751 # Assuming you have created this function
1752 print_target_details $x
1758 @section TARGETNAME (object) commands
1759 @b{Use:} Once a target is created, an ``object name'' that represents the
1760 target is created. By convention, the target name is identical to the
1761 tap name. In a multiple target system, one can preceed many common
1762 commands with a specific target name and effect only that target.
1764 str912.cpu mww 0x1234 0x42
1765 omap3530.cpu mww 0x5555 123
1768 @b{Model:} The Tcl/Tk language has the concept of object commands. A
1769 good example is a on screen button, once a button is created a button
1770 has a name (a path in Tk terms) and that name is useable as a 1st
1771 class command. For example in Tk, one can create a button and later
1772 configure it like this:
1776 button .foobar -background red -command @{ foo @}
1778 .foobar configure -foreground blue
1780 set x [.foobar cget -background]
1782 puts [format "The button is %s" $x]
1785 In OpenOCD's terms, the ``target'' is an object just like a Tcl/Tk
1786 button. Commands available as a ``target object'' are:
1788 @comment START targetobj commands.
1790 @item @b{configure} - configure the target; see Target Config/Cget Options below
1791 @item @b{cget} - query the target configuration; see Target Config/Cget Options below
1792 @item @b{curstate} - current target state (running, halt, etc.
1794 @* Intended for a human to see/read the currently configure target events.
1795 @item @b{Various Memory Commands} See the ``mww'' command elsewhere.
1796 @comment start memory
1806 @item @b{Memory To Array, Array To Memory}
1807 @* These are aimed at a machine interface to memory
1809 @item @b{mem2array ARRAYNAME WIDTH ADDRESS COUNT}
1810 @item @b{array2mem ARRAYNAME WIDTH ADDRESS COUNT}
1812 @* @b{ARRAYNAME} is the name of an array variable
1813 @* @b{WIDTH} is 8/16/32 - indicating the memory access size
1814 @* @b{ADDRESS} is the target memory address
1815 @* @b{COUNT} is the number of elements to process
1817 @item @b{Used during ``reset''}
1818 @* These commands are used internally by the OpenOCD scripts to deal
1819 with odd reset situations and are not documented here.
1821 @item @b{arp_examine}
1825 @item @b{arp_waitstate}
1827 @item @b{invoke-event} @b{EVENT-NAME}
1828 @* Invokes the specific event manually for the target
1831 @section Target Events
1832 At various times, certain things can happen, or you want them to happen.
1836 @item What should happen when GDB connects? Should your target reset?
1837 @item When GDB tries to flash the target, do you need to enable the flash via a special command?
1838 @item During reset, do you need to write to certain memory location to reconfigure the SDRAM?
1841 All of the above items are handled by target events.
1843 To specify an event action, either during target creation, or later
1844 via ``$_TARGETNAME configure'' see this example.
1846 Syntactially, the option is: ``-event NAME BODY'' where NAME is a
1847 target event name, and BODY is a Tcl procedure or string of commands
1850 The programmers model is the ``-command'' option used in Tcl/Tk
1851 buttons and events. Below are two identical examples, the first
1852 creates and invokes small procedure. The second inlines the procedure.
1855 proc my_attach_proc @{ @} @{
1859 mychip.cpu configure -event gdb-attach my_attach_proc
1860 mychip.cpu configure -event gdb-attach @{ puts "Reset..." ; reset halt @}
1863 @section Current Events
1864 The following events are available:
1866 @item @b{debug-halted}
1867 @* The target has halted for debug reasons (i.e.: breakpoint)
1868 @item @b{debug-resumed}
1869 @* The target has resumed (i.e.: gdb said run)
1870 @item @b{early-halted}
1871 @* Occurs early in the halt process
1872 @item @b{examine-end}
1873 @* Currently not used (goal: when JTAG examine completes)
1874 @item @b{examine-start}
1875 @* Currently not used (goal: when JTAG examine starts)
1876 @item @b{gdb-attach}
1877 @* When GDB connects
1878 @item @b{gdb-detach}
1879 @* When GDB disconnects
1881 @* When the taret has halted and GDB is not doing anything (see early halt)
1882 @item @b{gdb-flash-erase-start}
1883 @* Before the GDB flash process tries to erase the flash
1884 @item @b{gdb-flash-erase-end}
1885 @* After the GDB flash process has finished erasing the flash
1886 @item @b{gdb-flash-write-start}
1887 @* Before GDB writes to the flash
1888 @item @b{gdb-flash-write-end}
1889 @* After GDB writes to the flash
1891 @* Before the taret steps, gdb is trying to start/resume the target
1893 @* The target has halted
1894 @item @b{old-gdb_program_config}
1895 @* DO NOT USE THIS: Used internally
1896 @item @b{old-pre_resume}
1897 @* DO NOT USE THIS: Used internally
1898 @item @b{reset-assert-pre}
1899 @* Before reset is asserted on the tap.
1900 @item @b{reset-assert-post}
1901 @* Reset is now asserted on the tap.
1902 @item @b{reset-deassert-pre}
1903 @* Reset is about to be released on the tap
1904 @item @b{reset-deassert-post}
1905 @* Reset has been released on the tap
1907 @* Currently not used.
1908 @item @b{reset-halt-post}
1909 @* Currently not usd
1910 @item @b{reset-halt-pre}
1911 @* Currently not used
1912 @item @b{reset-init}
1913 @* Currently not used
1914 @item @b{reset-start}
1915 @* Currently not used
1916 @item @b{reset-wait-pos}
1917 @* Currently not used
1918 @item @b{reset-wait-pre}
1919 @* Currently not used
1920 @item @b{resume-start}
1921 @* Before any target is resumed
1922 @item @b{resume-end}
1923 @* After all targets have resumed
1927 @* Target has resumed
1928 @item @b{tap-enable}
1929 @* Executed by @b{jtag tapenable DOTTED.NAME} command. Example:
1931 jtag configure DOTTED.NAME -event tap-enable @{
1936 @item @b{tap-disable}
1937 @*Executed by @b{jtag tapdisable DOTTED.NAME} command. Example:
1939 jtag configure DOTTED.NAME -event tap-disable @{
1940 puts "Disabling CPU"
1947 @section target create
1949 @cindex target creation
1952 @b{target} @b{create} <@var{NAME}> <@var{TYPE}> <@var{PARAMS ...}>
1954 @*This command creates a GDB debug target that refers to a specific JTAG tap.
1955 @comment START params
1958 @* Is the name of the debug target. By convention it should be the tap
1959 DOTTED.NAME, this name is also used to create the target object
1962 @* Specifies the target type, i.e.: ARM7TDMI, or Cortex-M3. Currently supported targets are:
1963 @comment START types
1980 @*PARAMs are various target configuration parameters. The following ones are mandatory:
1981 @comment START mandatory
1983 @item @b{-endian big|little}
1984 @item @b{-chain-position DOTTED.NAME}
1985 @comment end MANDATORY
1990 @section Target Config/Cget Options
1991 These options can be specified when the target is created, or later
1992 via the configure option or to query the target via cget.
1994 @item @b{-type} - returns the target type
1995 @item @b{-event NAME BODY} see Target events
1996 @item @b{-work-area-virt [ADDRESS]} specify/set the work area
1997 @item @b{-work-area-phys [ADDRESS]} specify/set the work area
1998 @item @b{-work-area-size [ADDRESS]} specify/set the work area
1999 @item @b{-work-area-backup [0|1]} does the work area get backed up
2000 @item @b{-endian [big|little]}
2001 @item @b{-variant [NAME]} some chips have variants OpenOCD needs to know about
2002 @item @b{-chain-position DOTTED.NAME} the tap name this target refers to.
2006 for @{ set x 0 @} @{ $x < [target count] @} @{ incr x @} @{
2007 set name [target number $x]
2008 set y [$name cget -endian]
2009 set z [$name cget -type]
2010 puts [format "Chip %d is %s, Endian: %s, type: %s" $x $y $z]
2014 @section Target Variants
2017 @* Unknown (please write me)
2019 @* Unknown (please write me) (similar to arm7tdmi)
2021 @* Variants: @option{arm920t}, @option{arm922t} and @option{arm940t}
2022 This enables the hardware single-stepping support found on these
2027 @* None (this is also used as the ARM946)
2029 @* use variant <@var{-variant lm3s}> when debugging Luminary lm3s targets. This will cause
2030 OpenOCD to use a software reset rather than asserting SRST to avoid a issue with clearing
2031 the debug registers. This is fixed in Fury Rev B, DustDevil Rev B, Tempest, these revisions will
2032 be detected and the normal reset behavior used.
2034 @* Supported variants are @option{ixp42x}, @option{ixp45x}, @option{ixp46x},@option{pxa250}, @option{pxa255}, @option{pxa26x}.
2036 @* Supported variants are @option{arm1136}, @option{arm1156}, @option{arm1176}
2038 @* Use variant @option{ejtag_srst} when debugging targets that do not
2039 provide a functional SRST line on the EJTAG connector. This causes
2040 OpenOCD to instead use an EJTAG software reset command to reset the
2041 processor. You still need to enable @option{srst} on the reset
2042 configuration command to enable OpenOCD hardware reset functionality.
2043 @comment END variants
2045 @section working_area - Command Removed
2046 @cindex working_area
2047 @*@b{Please use the ``$_TARGETNAME configure -work-area-... parameters instead}
2048 @* This documentation remains because there are existing scripts that
2049 still use this that need to be converted.
2051 working_area target# address size backup| [virtualaddress]
2053 @* The target# is a the 0 based target numerical index.
2055 This command specifies a working area for the debugger to use. This
2056 may be used to speed-up downloads to target memory and flash
2057 operations, or to perform otherwise unavailable operations (some
2058 coprocessor operations on ARM7/9 systems, for example). The last
2059 parameter decides whether the memory should be preserved
2060 (<@var{backup}>) or can simply be overwritten (<@var{nobackup}>). If
2061 possible, use a working_area that doesn't need to be backed up, as
2062 performing a backup slows down operation.
2064 @node Flash Configuration
2065 @chapter Flash Programing
2066 @cindex Flash Configuration
2068 @b{Note:} As of 28/nov/2008 OpenOCD does not know how to program a SPI
2069 flash that a micro may boot from. Perhaps you, the reader, would like to
2070 contribute support for this.
2074 @item Configure via the command @b{flash bank}
2075 @* Normally this is done in a configuration file.
2076 @item Operate on the flash via @b{flash SOMECOMMAND}
2077 @* Often commands to manipulate the flash are typed by a human, or run
2078 via a script in some automated way. For example: To program the boot
2079 flash on your board.
2081 @* Flashing via GDB requires the flash be configured via ``flash
2082 bank'', and the GDB flash features be enabled. See the daemon
2083 configuration section for more details.
2086 @section Flash commands
2087 @cindex Flash commands
2088 @subsection flash banks
2091 @*List configured flash banks
2092 @*@b{NOTE:} the singular form: 'flash bank' is used to configure the flash banks.
2093 @subsection flash info
2094 @b{flash info} <@var{num}>
2096 @*Print info about flash bank <@option{num}>
2097 @subsection flash probe
2098 @b{flash probe} <@var{num}>
2100 @*Identify the flash, or validate the parameters of the configured flash. Operation
2101 depends on the flash type.
2102 @subsection flash erase_check
2103 @b{flash erase_check} <@var{num}>
2104 @cindex flash erase_check
2105 @*Check erase state of sectors in flash bank <@var{num}>. This is the only operation that
2106 updates the erase state information displayed by @option{flash info}. That means you have
2107 to issue an @option{erase_check} command after erasing or programming the device to get
2108 updated information.
2109 @subsection flash protect_check
2110 @b{flash protect_check} <@var{num}>
2111 @cindex flash protect_check
2112 @*Check protection state of sectors in flash bank <num>.
2113 @option{flash erase_sector} using the same syntax.
2114 @subsection flash erase_sector
2115 @b{flash erase_sector} <@var{num}> <@var{first}> <@var{last}>
2116 @cindex flash erase_sector
2117 @anchor{flash erase_sector}
2118 @*Erase sectors at bank <@var{num}>, starting at sector <@var{first}> up to and including
2119 <@var{last}>. Sector numbering starts at 0. Depending on the flash type, erasing may
2120 require the protection to be disabled first (e.g. Intel Advanced Bootblock flash using
2122 @subsection flash erase_address
2123 @b{flash erase_address} <@var{address}> <@var{length}>
2124 @cindex flash erase_address
2125 @*Erase sectors starting at <@var{address}> for <@var{length}> bytes
2126 @subsection flash write_bank
2127 @b{flash write_bank} <@var{num}> <@var{file}> <@var{offset}>
2128 @cindex flash write_bank
2129 @anchor{flash write_bank}
2130 @*Write the binary <@var{file}> to flash bank <@var{num}>, starting at
2131 <@option{offset}> bytes from the beginning of the bank.
2132 @subsection flash write_image
2133 @b{flash write_image} [@var{erase}] <@var{file}> [@var{offset}] [@var{type}]
2134 @cindex flash write_image
2135 @anchor{flash write_image}
2136 @*Write the image <@var{file}> to the current target's flash bank(s). A relocation
2137 [@var{offset}] can be specified and the file [@var{type}] can be specified
2138 explicitly as @option{bin} (binary), @option{ihex} (Intel hex), @option{elf}
2139 (ELF file) or @option{s19} (Motorola s19). Flash memory will be erased prior to programming
2140 if the @option{erase} parameter is given.
2141 @subsection flash protect
2142 @b{flash protect} <@var{num}> <@var{first}> <@var{last}> <@option{on}|@option{off}>
2143 @cindex flash protect
2144 @*Enable (@var{on}) or disable (@var{off}) protection of flash sectors <@var{first}> to
2145 <@var{last}> of @option{flash bank} <@var{num}>.
2147 @subsection mFlash commands
2148 @cindex mFlash commands
2150 @item @b{mflash probe}
2151 @cindex mflash probe
2153 @item @b{mflash write} <@var{num}> <@var{file}> <@var{offset}>
2154 @cindex mflash write
2155 Write the binary <@var{file}> to mflash bank <@var{num}>, starting at
2156 <@var{offset}> bytes from the beginning of the bank.
2157 @item @b{mflash dump} <@var{num}> <@var{file}> <@var{offset}> <@var{size}>
2159 Dump <size> bytes, starting at <@var{offset}> bytes from the beginning of the <@var{num}> bank
2163 @section flash bank command
2164 The @b{flash bank} command is used to configure one or more flash chips (or banks in OpenOCD terms)
2167 @b{flash bank} <@var{driver}> <@var{base}> <@var{size}> <@var{chip_width}>
2168 <@var{bus_width}> <@var{target#}> [@var{driver_options ...}]
2171 @*Configures a flash bank at <@var{base}> of <@var{size}> bytes and <@var{chip_width}>
2172 and <@var{bus_width}> bytes using the selected flash <driver>.
2174 @subsection External Flash - cfi options
2176 CFI flashes are external flash chips - often they are connected to a
2177 specific chip select on the CPU. By default, at hard reset, most
2178 CPUs have the ablity to ``boot'' from some flash chip - typically
2179 attached to the CPU's CS0 pin.
2181 For other chip selects: OpenOCD does not know how to configure, or
2182 access a specific chip select. Instead you, the human, might need to
2183 configure additional chip selects via other commands (like: mww) , or
2184 perhaps configure a GPIO pin that controls the ``write protect'' pin
2187 @b{flash bank cfi} <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}>
2188 <@var{target#}> [@var{jedec_probe}|@var{x16_as_x8}]
2189 @*CFI flashes require the number of the target they're connected to as an additional
2190 argument. The CFI driver makes use of a working area (specified for the target)
2191 to significantly speed up operation.
2193 @var{chip_width} and @var{bus_width} are specified in bytes.
2195 The @var{jedec_probe} option is used to detect certain non-CFI flash ROMs, like AM29LV010 and similar types.
2199 @subsection Internal Flash (Microcontrollers)
2200 @subsubsection lpc2000 options
2201 @cindex lpc2000 options
2203 @b{flash bank lpc2000} <@var{base}> <@var{size}> 0 0 <@var{target#}> <@var{variant}>
2204 <@var{clock}> [@var{calc_checksum}]
2205 @*LPC flashes don't require the chip and bus width to be specified. Additional
2206 parameters are the <@var{variant}>, which may be @var{lpc2000_v1} (older LPC21xx and LPC22xx)
2207 or @var{lpc2000_v2} (LPC213x, LPC214x, LPC210[123], LPC23xx and LPC24xx), the number
2208 of the target this flash belongs to (first is 0), the frequency at which the core
2209 is currently running (in kHz - must be an integral number), and the optional keyword
2210 @var{calc_checksum}, telling the driver to calculate a valid checksum for the exception
2214 @subsubsection at91sam7 options
2215 @cindex at91sam7 options
2217 @b{flash bank at91sam7} 0 0 0 0 <@var{target#}>
2218 @*AT91SAM7 flashes only require the @var{target#}, all other values are looked up after
2219 reading the chip-id and type.
2221 @subsubsection str7 options
2222 @cindex str7 options
2224 @b{flash bank str7x} <@var{base}> <@var{size}> 0 0 <@var{target#}> <@var{variant}>
2225 @*variant can be either STR71x, STR73x or STR75x.
2227 @subsubsection str9 options
2228 @cindex str9 options
2230 @b{flash bank str9x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2231 @*The str9 needs the flash controller to be configured prior to Flash programming, e.g.
2233 str9x flash_config 0 4 2 0 0x80000
2235 This will setup the BBSR, NBBSR, BBADR and NBBADR registers respectively.
2237 @subsubsection str9 options (str9xpec driver)
2239 @b{flash bank str9xpec} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2240 @*Before using the flash commands the turbo mode must be enabled using str9xpec
2241 @option{enable_turbo} <@var{num>.}
2243 Only use this driver for locking/unlocking the device or configuring the option bytes.
2244 Use the standard str9 driver for programming. @xref{STR9 specific commands}.
2246 @subsubsection Stellaris (LM3Sxxx) options
2247 @cindex Stellaris (LM3Sxxx) options
2249 @b{flash bank stellaris} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2250 @*Stellaris flash plugin only require the @var{target#}.
2252 @subsubsection stm32x options
2253 @cindex stm32x options
2255 @b{flash bank stm32x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2256 @*stm32x flash plugin only require the @var{target#}.
2258 @subsubsection aduc702x options
2259 @cindex aduc702x options
2261 @b{flash bank aduc702x} 0 0 0 0 <@var{target#}>
2262 @*The aduc702x flash plugin works with Analog Devices model numbers ADUC7019 through ADUC7028. The setup command only requires the @var{target#} argument (all devices in this family have the same memory layout).
2264 @subsection mFlash configuration
2265 @cindex mFlash configuration
2266 @b{mflash bank} <@var{soc}> <@var{base}> <@var{chip_width}> <@var{bus_width}>
2267 <@var{RST pin}> <@var{WP pin}> <@var{DPD pin}> <@var{target #}>
2269 @*Configures a mflash for <@var{soc}> host bank at
2270 <@var{base}>. <@var{chip_width}> and <@var{bus_width}> are bytes
2271 order. Pin number format is dependent on host GPIO calling convention.
2272 If WP or DPD pin was not used, write -1. Currently, mflash bank
2273 support s3c2440 and pxa270.
2275 (ex. of s3c2440) mflash <@var{RST pin}> is GPIO B1, <@var{WP pin}> and <@var{DPD pin}> are not used.
2277 mflash bank s3c2440 0x10000000 2 2 1b -1 -1 0
2279 (ex. of pxa270) mflash <@var{RST pin}> is GPIO 43, <@var{DPD pin}> is not used and <@var{DPD pin}> is GPIO 51.
2281 mflash bank pxa270 0x08000000 2 2 43 -1 51 0
2284 @section Microcontroller specific flash commands
2286 @subsection AT91SAM7 specific commands
2287 @cindex AT91SAM7 specific commands
2288 The flash configuration is deduced from the chip identification register. The flash
2289 controller handles erases automatically on a page (128/265 byte) basis, so erase is
2290 not necessary for flash programming. AT91SAM7 processors with less than 512K flash
2291 only have a single flash bank embedded on chip. AT91SAM7xx512 have two flash planes
2292 that can be erased separatly. Only an EraseAll command is supported by the controller
2293 for each flash plane and this is called with
2295 @item @b{flash erase} <@var{num}> @var{first_plane} @var{last_plane}
2296 @*bulk erase flash planes first_plane to last_plane.
2297 @item @b{at91sam7 gpnvm} <@var{num}> <@var{bit}> <@option{set}|@option{clear}>
2298 @cindex at91sam7 gpnvm
2299 @*set or clear a gpnvm bit for the processor
2302 @subsection STR9 specific commands
2303 @cindex STR9 specific commands
2304 @anchor{STR9 specific commands}
2305 These are flash specific commands when using the str9xpec driver.
2307 @item @b{str9xpec enable_turbo} <@var{num}>
2308 @cindex str9xpec enable_turbo
2309 @*enable turbo mode, will simply remove the str9 from the chain and talk
2310 directly to the embedded flash controller.
2311 @item @b{str9xpec disable_turbo} <@var{num}>
2312 @cindex str9xpec disable_turbo
2313 @*restore the str9 into JTAG chain.
2314 @item @b{str9xpec lock} <@var{num}>
2315 @cindex str9xpec lock
2316 @*lock str9 device. The str9 will only respond to an unlock command that will
2318 @item @b{str9xpec unlock} <@var{num}>
2319 @cindex str9xpec unlock
2320 @*unlock str9 device.
2321 @item @b{str9xpec options_read} <@var{num}>
2322 @cindex str9xpec options_read
2323 @*read str9 option bytes.
2324 @item @b{str9xpec options_write} <@var{num}>
2325 @cindex str9xpec options_write
2326 @*write str9 option bytes.
2329 Note: Before using the str9xpec driver here is some background info to help
2330 you better understand how the drivers works. OpenOCD has two flash drivers for
2334 Standard driver @option{str9x} programmed via the str9 core. Normally used for
2335 flash programming as it is faster than the @option{str9xpec} driver.
2337 Direct programming @option{str9xpec} using the flash controller. This is an
2338 ISC compilant (IEEE 1532) tap connected in series with the str9 core. The str9
2339 core does not need to be running to program using this flash driver. Typical use
2340 for this driver is locking/unlocking the target and programming the option bytes.
2343 Before we run any commands using the @option{str9xpec} driver we must first disable
2344 the str9 core. This example assumes the @option{str9xpec} driver has been
2345 configured for flash bank 0.
2347 # assert srst, we do not want core running
2348 # while accessing str9xpec flash driver
2350 # turn off target polling
2353 str9xpec enable_turbo 0
2355 str9xpec options_read 0
2356 # re-enable str9 core
2357 str9xpec disable_turbo 0
2361 The above example will read the str9 option bytes.
2362 When performing a unlock remember that you will not be able to halt the str9 - it
2363 has been locked. Halting the core is not required for the @option{str9xpec} driver
2364 as mentioned above, just issue the commands above manually or from a telnet prompt.
2366 @subsection STR9 configuration
2367 @cindex STR9 configuration
2369 @item @b{str9x flash_config} <@var{bank}> <@var{BBSR}> <@var{NBBSR}>
2370 <@var{BBADR}> <@var{NBBADR}>
2371 @cindex str9x flash_config
2372 @*Configure str9 flash controller.
2374 e.g. str9x flash_config 0 4 2 0 0x80000
2376 BBSR - Boot Bank Size register
2377 NBBSR - Non Boot Bank Size register
2378 BBADR - Boot Bank Start Address register
2379 NBBADR - Boot Bank Start Address register
2383 @subsection STR9 option byte configuration
2384 @cindex STR9 option byte configuration
2386 @item @b{str9xpec options_cmap} <@var{num}> <@option{bank0}|@option{bank1}>
2387 @cindex str9xpec options_cmap
2388 @*configure str9 boot bank.
2389 @item @b{str9xpec options_lvdthd} <@var{num}> <@option{2.4v}|@option{2.7v}>
2390 @cindex str9xpec options_lvdthd
2391 @*configure str9 lvd threshold.
2392 @item @b{str9xpec options_lvdsel} <@var{num}> <@option{vdd}|@option{vdd_vddq}>
2393 @cindex str9xpec options_lvdsel
2394 @*configure str9 lvd source.
2395 @item @b{str9xpec options_lvdwarn} <@var{bank}> <@option{vdd}|@option{vdd_vddq}>
2396 @cindex str9xpec options_lvdwarn
2397 @*configure str9 lvd reset warning source.
2400 @subsection STM32x specific commands
2401 @cindex STM32x specific commands
2403 These are flash specific commands when using the stm32x driver.
2405 @item @b{stm32x lock} <@var{num}>
2407 @*lock stm32 device.
2408 @item @b{stm32x unlock} <@var{num}>
2409 @cindex stm32x unlock
2410 @*unlock stm32 device.
2411 @item @b{stm32x options_read} <@var{num}>
2412 @cindex stm32x options_read
2413 @*read stm32 option bytes.
2414 @item @b{stm32x options_write} <@var{num}> <@option{SWWDG}|@option{HWWDG}>
2415 <@option{RSTSTNDBY}|@option{NORSTSTNDBY}> <@option{RSTSTOP}|@option{NORSTSTOP}>
2416 @cindex stm32x options_write
2417 @*write stm32 option bytes.
2418 @item @b{stm32x mass_erase} <@var{num}>
2419 @cindex stm32x mass_erase
2420 @*mass erase flash memory.
2423 @subsection Stellaris specific commands
2424 @cindex Stellaris specific commands
2426 These are flash specific commands when using the Stellaris driver.
2428 @item @b{stellaris mass_erase} <@var{num}>
2429 @cindex stellaris mass_erase
2430 @*mass erase flash memory.
2434 @node General commands
2435 @chapter General commands
2438 The commands documented in this chapter here are common commands that
2439 you, as a human, may want to type and see the output of. Configuration type
2440 commands are documented elsewhere.
2444 @item @b{Source Of Commands}
2445 @* OpenOCD commands can occur in a configuration script (discussed
2446 elsewhere) or typed manually by a human or supplied programatically,
2447 or via one of several TCP/IP Ports.
2449 @item @b{From the human}
2450 @* A human should interact with the telnet interface (default port: 4444,
2451 or via GDB, default port 3333)
2453 To issue commands from within a GDB session, use the @option{monitor}
2454 command, e.g. use @option{monitor poll} to issue the @option{poll}
2455 command. All output is relayed through the GDB session.
2457 @item @b{Machine Interface}
2458 The Tcl interface's intent is to be a machine interface. The default Tcl
2463 @section Daemon Commands
2465 @subsection sleep [@var{msec}]
2467 @*Wait for n milliseconds before resuming. Useful in connection with script files
2468 (@var{script} command and @var{target_script} configuration).
2470 @subsection shutdown
2472 @*Close the OpenOCD daemon, disconnecting all clients (GDB, telnet, other).
2474 @subsection debug_level [@var{n}]
2476 @anchor{debug_level}
2477 @*Display or adjust debug level to n<0-3>
2479 @subsection fast [@var{enable|disable}]
2481 @*Default disabled. Set default behavior of OpenOCD to be "fast and dangerous". For instance ARM7/9 DCC memory
2482 downloads and fast memory access will work if the JTAG interface isn't too fast and
2483 the core doesn't run at a too low frequency. Note that this option only changes the default
2484 and that the indvidual options, like DCC memory downloads, can be enabled and disabled
2487 The target specific "dangerous" optimization tweaking options may come and go
2488 as more robust and user friendly ways are found to ensure maximum throughput
2489 and robustness with a minimum of configuration.
2491 Typically the "fast enable" is specified first on the command line:
2494 openocd -c "fast enable" -c "interface dummy" -f target/str710.cfg
2497 @subsection log_output <@var{file}>
2499 @*Redirect logging to <file> (default: stderr)
2501 @subsection script <@var{file}>
2503 @*Execute commands from <file>
2504 See also: ``source [find FILENAME]''
2506 @section Target state handling
2507 @subsection power <@var{on}|@var{off}>
2509 @*Turn power switch to target on/off.
2510 No arguments: print status.
2511 Not all interfaces support this.
2513 @subsection reg [@option{#}|@option{name}] [value]
2515 @*Access a single register by its number[@option{#}] or by its [@option{name}].
2516 No arguments: list all available registers for the current target.
2517 Number or name argument: display a register.
2518 Number or name and value arguments: set register value.
2520 @subsection poll [@option{on}|@option{off}]
2522 @*Poll the target for its current state. If the target is in debug mode, architecture
2523 specific information about the current state is printed. An optional parameter
2524 allows continuous polling to be enabled and disabled.
2526 @subsection halt [@option{ms}]
2528 @*Send a halt request to the target and wait for it to halt for up to [@option{ms}] milliseconds.
2529 Default [@option{ms}] is 5 seconds if no arg given.
2530 Optional arg @option{ms} is a timeout in milliseconds. Using 0 as the [@option{ms}]
2531 will stop OpenOCD from waiting.
2533 @subsection wait_halt [@option{ms}]
2535 @*Wait for the target to enter debug mode. Optional [@option{ms}] is
2536 a timeout in milliseconds. Default [@option{ms}] is 5 seconds if no
2539 @subsection resume [@var{address}]
2541 @*Resume the target at its current code position, or at an optional address.
2542 OpenOCD will wait 5 seconds for the target to resume.
2544 @subsection step [@var{address}]
2546 @*Single-step the target at its current code position, or at an optional address.
2548 @subsection reset [@option{run}|@option{halt}|@option{init}]
2550 @*Perform a hard-reset. The optional parameter specifies what should happen after the reset.
2552 With no arguments a "reset run" is executed
2556 @*Let the target run.
2559 @*Immediately halt the target (works only with certain configurations).
2562 @*Immediately halt the target, and execute the reset script (works only with certain
2566 @subsection soft_reset_halt
2568 @*Requesting target halt and executing a soft reset. This is often used
2569 when a target cannot be reset and halted. The target, after reset is
2570 released begins to execute code. OpenOCD attempts to stop the CPU and
2571 then sets the program counter back to the reset vector. Unfortunately
2572 the code that was executed may have left the hardware in an unknown
2576 @section Memory access commands
2578 display available RAM memory.
2579 @subsection Memory peek/poke type commands
2580 These commands allow accesses of a specific size to the memory
2581 system. Often these are used to configure the current target in some
2582 special way. For example - one may need to write certian values to the
2583 SDRAM controller to enable SDRAM.
2586 @item To change the current target see the ``targets'' (plural) command
2587 @item In system level scripts these commands are deprecated, please use the TARGET object versions.
2591 @item @b{mdw} <@var{addr}> [@var{count}]
2593 @*display memory words (32bit)
2594 @item @b{mdh} <@var{addr}> [@var{count}]
2596 @*display memory half-words (16bit)
2597 @item @b{mdb} <@var{addr}> [@var{count}]
2599 @*display memory bytes (8bit)
2600 @item @b{mww} <@var{addr}> <@var{value}>
2602 @*write memory word (32bit)
2603 @item @b{mwh} <@var{addr}> <@var{value}>
2605 @*write memory half-word (16bit)
2606 @item @b{mwb} <@var{addr}> <@var{value}>
2608 @*write memory byte (8bit)
2611 @section Image loading commands
2612 @subsection load_image
2613 @b{load_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
2616 @*Load image <@var{file}> to target memory at <@var{address}>
2617 @subsection fast_load_image
2618 @b{fast_load_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
2619 @cindex fast_load_image
2620 @anchor{fast_load_image}
2621 @*Normally you should be using @b{load_image} or GDB load. However, for
2622 testing purposes or when I/O overhead is significant(OpenOCD running on an embedded
2623 host), storing the image in memory and uploading the image to the target
2624 can be a way to upload e.g. multiple debug sessions when the binary does not change.
2625 Arguments are the same as @b{load_image}, but the image is stored in OpenOCD host
2626 memory, i.e. does not affect target. This approach is also useful when profiling
2627 target programming performance as I/O and target programming can easily be profiled
2629 @subsection fast_load
2633 @*Loads an image stored in memory by @b{fast_load_image} to the current target. Must be preceeded by fast_load_image.
2634 @subsection dump_image
2635 @b{dump_image} <@var{file}> <@var{address}> <@var{size}>
2638 @*Dump <@var{size}> bytes of target memory starting at <@var{address}> to a
2639 (binary) <@var{file}>.
2640 @subsection verify_image
2641 @b{verify_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
2642 @cindex verify_image
2643 @*Verify <@var{file}> against target memory starting at <@var{address}>.
2644 This will first attempt a comparison using a CRC checksum, if this fails it will try a binary compare.
2647 @section Breakpoint commands
2648 @cindex Breakpoint commands
2650 @item @b{bp} <@var{addr}> <@var{len}> [@var{hw}]
2652 @*set breakpoint <address> <length> [hw]
2653 @item @b{rbp} <@var{addr}>
2655 @*remove breakpoint <adress>
2656 @item @b{wp} <@var{addr}> <@var{len}> <@var{r}|@var{w}|@var{a}> [@var{value}] [@var{mask}]
2658 @*set watchpoint <address> <length> <r/w/a> [value] [mask]
2659 @item @b{rwp} <@var{addr}>
2661 @*remove watchpoint <adress>
2664 @section Misc commands
2665 @cindex Other target commands
2667 @item @b{profile} <@var{seconds}> <@var{gmon.out}>
2669 Profiling samples the CPU's program counter as quickly as possible, which is useful for non-intrusive stochastic profiling.
2673 @section Target specific commands
2674 @cindex Target specific commands
2678 @section Architecture specific commands
2679 @cindex Architecture specific commands
2681 @subsection ARMV4/5 specific commands
2682 @cindex ARMV4/5 specific commands
2684 These commands are specific to ARM architecture v4 and v5, like all ARM7/9 systems
2685 or Intel XScale (XScale isn't supported yet).
2687 @item @b{armv4_5 reg}
2689 @*Display a list of all banked core registers, fetching the current value from every
2690 core mode if necessary. OpenOCD versions before rev. 60 didn't fetch the current
2692 @item @b{armv4_5 core_mode} [@var{arm}|@var{thumb}]
2693 @cindex armv4_5 core_mode
2694 @*Displays the core_mode, optionally changing it to either ARM or Thumb mode.
2695 The target is resumed in the currently set @option{core_mode}.
2698 @subsection ARM7/9 specific commands
2699 @cindex ARM7/9 specific commands
2701 These commands are specific to ARM7 and ARM9 targets, like ARM7TDMI, ARM720t,
2702 ARM920T or ARM926EJ-S.
2704 @item @b{arm7_9 dbgrq} <@var{enable}|@var{disable}>
2705 @cindex arm7_9 dbgrq
2706 @*Enable use of the DBGRQ bit to force entry into debug mode. This should be
2707 safe for all but ARM7TDMI--S cores (like Philips LPC).
2708 @item @b{arm7_9 fast_memory_access} <@var{enable}|@var{disable}>
2709 @cindex arm7_9 fast_memory_access
2710 @anchor{arm7_9 fast_memory_access}
2711 @*Allow OpenOCD to read and write memory without checking completion of
2712 the operation. This provides a huge speed increase, especially with USB JTAG
2713 cables (FT2232), but might be unsafe if used with targets running at very low
2714 speeds, like the 32kHz startup clock of an AT91RM9200.
2715 @item @b{arm7_9 dcc_downloads} <@var{enable}|@var{disable}>
2716 @cindex arm7_9 dcc_downloads
2717 @*Enable the use of the debug communications channel (DCC) to write larger (>128 byte)
2718 amounts of memory. DCC downloads offer a huge speed increase, but might be potentially
2719 unsafe, especially with targets running at very low speeds. This command was introduced
2720 with OpenOCD rev. 60.
2723 @subsection ARM720T specific commands
2724 @cindex ARM720T specific commands
2727 @item @b{arm720t cp15} <@var{num}> [@var{value}]
2728 @cindex arm720t cp15
2729 @*display/modify cp15 register <@option{num}> [@option{value}].
2730 @item @b{arm720t md<bhw>_phys} <@var{addr}> [@var{count}]
2731 @cindex arm720t md<bhw>_phys
2732 @*Display memory at physical address addr.
2733 @item @b{arm720t mw<bhw>_phys} <@var{addr}> <@var{value}>
2734 @cindex arm720t mw<bhw>_phys
2735 @*Write memory at physical address addr.
2736 @item @b{arm720t virt2phys} <@var{va}>
2737 @cindex arm720t virt2phys
2738 @*Translate a virtual address to a physical address.
2741 @subsection ARM9TDMI specific commands
2742 @cindex ARM9TDMI specific commands
2745 @item @b{arm9tdmi vector_catch} <@var{all}|@var{none}>
2746 @cindex arm9tdmi vector_catch
2747 @*Catch arm9 interrupt vectors, can be @option{all} @option{none} or any of the following:
2748 @option{reset} @option{undef} @option{swi} @option{pabt} @option{dabt} @option{reserved}
2749 @option{irq} @option{fiq}.
2751 Can also be used on other ARM9 based cores such as ARM966, ARM920T and ARM926EJ-S.
2754 @subsection ARM966E specific commands
2755 @cindex ARM966E specific commands
2758 @item @b{arm966e cp15} <@var{num}> [@var{value}]
2759 @cindex arm966e cp15
2760 @*display/modify cp15 register <@option{num}> [@option{value}].
2763 @subsection ARM920T specific commands
2764 @cindex ARM920T specific commands
2767 @item @b{arm920t cp15} <@var{num}> [@var{value}]
2768 @cindex arm920t cp15
2769 @*display/modify cp15 register <@option{num}> [@option{value}].
2770 @item @b{arm920t cp15i} <@var{num}> [@var{value}] [@var{address}]
2771 @cindex arm920t cp15i
2772 @*display/modify cp15 (interpreted access) <@option{opcode}> [@option{value}] [@option{address}]
2773 @item @b{arm920t cache_info}
2774 @cindex arm920t cache_info
2775 @*Print information about the caches found. This allows to see whether your target
2776 is an ARM920T (2x16kByte cache) or ARM922T (2x8kByte cache).
2777 @item @b{arm920t md<bhw>_phys} <@var{addr}> [@var{count}]
2778 @cindex arm920t md<bhw>_phys
2779 @*Display memory at physical address addr.
2780 @item @b{arm920t mw<bhw>_phys} <@var{addr}> <@var{value}>
2781 @cindex arm920t mw<bhw>_phys
2782 @*Write memory at physical address addr.
2783 @item @b{arm920t read_cache} <@var{filename}>
2784 @cindex arm920t read_cache
2785 @*Dump the content of ICache and DCache to a file.
2786 @item @b{arm920t read_mmu} <@var{filename}>
2787 @cindex arm920t read_mmu
2788 @*Dump the content of the ITLB and DTLB to a file.
2789 @item @b{arm920t virt2phys} <@var{va}>
2790 @cindex arm920t virt2phys
2791 @*Translate a virtual address to a physical address.
2794 @subsection ARM926EJ-S specific commands
2795 @cindex ARM926EJ-S specific commands
2798 @item @b{arm926ejs cp15} <@var{num}> [@var{value}]
2799 @cindex arm926ejs cp15
2800 @*display/modify cp15 register <@option{num}> [@option{value}].
2801 @item @b{arm926ejs cache_info}
2802 @cindex arm926ejs cache_info
2803 @*Print information about the caches found.
2804 @item @b{arm926ejs md<bhw>_phys} <@var{addr}> [@var{count}]
2805 @cindex arm926ejs md<bhw>_phys
2806 @*Display memory at physical address addr.
2807 @item @b{arm926ejs mw<bhw>_phys} <@var{addr}> <@var{value}>
2808 @cindex arm926ejs mw<bhw>_phys
2809 @*Write memory at physical address addr.
2810 @item @b{arm926ejs virt2phys} <@var{va}>
2811 @cindex arm926ejs virt2phys
2812 @*Translate a virtual address to a physical address.
2815 @subsection CORTEX_M3 specific commands
2816 @cindex CORTEX_M3 specific commands
2819 @item @b{cortex_m3 maskisr} <@var{on}|@var{off}>
2820 @cindex cortex_m3 maskisr
2821 @*Enable masking (disabling) interrupts during target step/resume.
2825 @section Debug commands
2826 @cindex Debug commands
2827 The following commands give direct access to the core, and are most likely
2828 only useful while debugging OpenOCD.
2830 @item @b{arm7_9 write_xpsr} <@var{32-bit value}> <@option{0=cpsr}, @option{1=spsr}>
2831 @cindex arm7_9 write_xpsr
2832 @*Immediately write either the current program status register (CPSR) or the saved
2833 program status register (SPSR), without changing the register cache (as displayed
2834 by the @option{reg} and @option{armv4_5 reg} commands).
2835 @item @b{arm7_9 write_xpsr_im8} <@var{8-bit value}> <@var{rotate 4-bit}>
2836 <@var{0=cpsr},@var{1=spsr}>
2837 @cindex arm7_9 write_xpsr_im8
2838 @*Write the 8-bit value rotated right by 2*rotate bits, using an immediate write
2839 operation (similar to @option{write_xpsr}).
2840 @item @b{arm7_9 write_core_reg} <@var{num}> <@var{mode}> <@var{value}>
2841 @cindex arm7_9 write_core_reg
2842 @*Write a core register, without changing the register cache (as displayed by the
2843 @option{reg} and @option{armv4_5 reg} commands). The <@var{mode}> argument takes the
2844 encoding of the [M4:M0] bits of the PSR.
2847 @section Target requests
2848 @cindex Target requests
2849 OpenOCD can handle certain target requests, currently debugmsg are only supported for arm7_9 and cortex_m3.
2850 See libdcc in the contrib dir for more details.
2852 @item @b{target_request debugmsgs} <@var{enable}|@var{disable}>
2853 @cindex target_request debugmsgs
2854 @*Enable/disable target debugmsgs requests. debugmsgs enable messages to be sent to the debugger while the target is running.
2858 @chapter JTAG Commands
2859 @cindex JTAG Commands
2860 Generally most people will not use the bulk of these commands. They
2861 are mostly used by the OpenOCD developers or those who need to
2862 directly manipulate the JTAG taps.
2864 In general these commands control JTAG taps at a very low level. For
2865 example if you need to control a JTAG Route Controller (i.e.: the
2866 OMAP3530 on the Beagle Board has one) you might use these commands in
2867 a script or an event procedure.
2871 @item @b{scan_chain}
2873 @*Print current scan chain configuration.
2874 @item @b{jtag_reset} <@var{trst}> <@var{srst}>
2876 @*Toggle reset lines.
2877 @item @b{endstate} <@var{tap_state}>
2879 @*Finish JTAG operations in <@var{tap_state}>.
2880 @item @b{runtest} <@var{num_cycles}>
2882 @*Move to Run-Test/Idle, and execute <@var{num_cycles}>
2883 @item @b{statemove} [@var{tap_state}]
2885 @*Move to current endstate or [@var{tap_state}]
2886 @item @b{irscan} <@var{device}> <@var{instr}> [@var{dev2}] [@var{instr2}] ...
2888 @*Execute IR scan <@var{device}> <@var{instr}> [@var{dev2}] [@var{instr2}] ...
2889 @item @b{drscan} <@var{device}> [@var{dev2}] [@var{var2}] ...
2891 @*Execute DR scan <@var{device}> [@var{dev2}] [@var{var2}] ...
2892 @item @b{verify_ircapture} <@option{enable}|@option{disable}>
2893 @cindex verify_ircapture
2894 @*Verify value captured during Capture-IR. Default is enabled.
2895 @item @b{var} <@var{name}> [@var{num_fields}|@var{del}] [@var{size1}] ...
2897 @*Allocate, display or delete variable <@var{name}> [@var{num_fields}|@var{del}] [@var{size1}] ...
2898 @item @b{field} <@var{var}> <@var{field}> [@var{value}|@var{flip}]
2900 Display/modify variable field <@var{var}> <@var{field}> [@var{value}|@var{flip}].
2905 Available tap_states are:
2945 If OpenOCD runs on an embedded host(as ZY1000 does), then TFTP can
2946 be used to access files on PCs (Either the developer's PC or some other PC).
2948 The way this works on the ZY1000 is to prefix a filename by
2949 "/tftp/ip/" and append the TFTP path on the TFTP
2950 server (tftpd). E.g. "load_image /tftp/10.0.0.96/c:\temp\abc.elf" will
2951 load c:\temp\abc.elf from the developer pc (10.0.0.96) into memory as
2952 if the file was hosted on the embedded host.
2954 In order to achieve decent performance, you must choose a TFTP server
2955 that supports a packet size bigger than the default packet size (512 bytes). There
2956 are numerous TFTP servers out there (free and commercial) and you will have to do
2957 a bit of googling to find something that fits your requirements.
2959 @node Sample scripts
2960 @chapter Sample scripts
2963 This page shows how to use the target library.
2965 The configuration script can be divided into the following sections:
2967 @item daemon configuration
2969 @item jtag scan chain
2970 @item target configuration
2971 @item flash configuration
2974 Detailed information about each section can be found at OpenOCD configuration.
2976 @section AT91R40008 example
2977 @cindex AT91R40008 example
2978 To start OpenOCD with a target script for the AT91R40008 CPU and reset
2979 the CPU upon startup of the OpenOCD daemon.
2981 openocd -f interface/parport.cfg -f target/at91r40008.cfg -c init -c reset
2985 @node GDB and OpenOCD
2986 @chapter GDB and OpenOCD
2987 @cindex GDB and OpenOCD
2988 OpenOCD complies with the remote gdbserver protocol, and as such can be used
2989 to debug remote targets.
2991 @section Connecting to GDB
2992 @cindex Connecting to GDB
2993 @anchor{Connecting to GDB}
2994 Use GDB 6.7 or newer with OpenOCD if you run into trouble. For
2995 instance GDB 6.3 has a known bug that produces bogus memory access
2996 errors, which has since been fixed: look up 1836 in
2997 @url{http://sourceware.org/cgi-bin/gnatsweb.pl?database=gdb}
2999 @*OpenOCD can communicate with GDB in two ways:
3002 A socket (TCP) connection is typically started as follows:
3004 target remote localhost:3333
3006 This would cause GDB to connect to the gdbserver on the local pc using port 3333.
3008 A pipe connection is typically started as follows:
3010 target remote | openocd --pipe
3012 This would cause GDB to run OpenOCD and communicate using pipes (stdin/stdout).
3013 Using this method has the advantage of GDB starting/stopping OpenOCD for the debug
3017 @*To see a list of available OpenOCD commands type @option{monitor help} on the
3020 OpenOCD supports the gdb @option{qSupported} packet, this enables information
3021 to be sent by the GDB remote server (i.e. OpenOCD) to GDB. Typical information includes
3022 packet size and the device's memory map.
3024 Previous versions of OpenOCD required the following GDB options to increase
3025 the packet size and speed up GDB communication:
3027 set remote memory-write-packet-size 1024
3028 set remote memory-write-packet-size fixed
3029 set remote memory-read-packet-size 1024
3030 set remote memory-read-packet-size fixed
3032 This is now handled in the @option{qSupported} PacketSize and should not be required.
3034 @section Programming using GDB
3035 @cindex Programming using GDB
3037 By default the target memory map is sent to GDB. This can be disabled by
3038 the following OpenOCD configuration option:
3040 gdb_memory_map disable
3042 For this to function correctly a valid flash configuration must also be set
3043 in OpenOCD. For faster performance you should also configure a valid
3046 Informing GDB of the memory map of the target will enable GDB to protect any
3047 flash areas of the target and use hardware breakpoints by default. This means
3048 that the OpenOCD option @option{gdb_breakpoint_override} is not required when
3049 using a memory map. @xref{gdb_breakpoint_override}.
3051 To view the configured memory map in GDB, use the GDB command @option{info mem}
3052 All other unassigned addresses within GDB are treated as RAM.
3054 GDB 6.8 and higher set any memory area not in the memory map as inaccessible.
3055 This can be changed to the old behavior by using the following GDB command
3057 set mem inaccessible-by-default off
3060 If @option{gdb_flash_program enable} is also used, GDB will be able to
3061 program any flash memory using the vFlash interface.
3063 GDB will look at the target memory map when a load command is given, if any
3064 areas to be programmed lie within the target flash area the vFlash packets
3067 If the target needs configuring before GDB programming, an event
3068 script can be executed:
3070 $_TARGETNAME configure -event EVENTNAME BODY
3073 To verify any flash programming the GDB command @option{compare-sections}
3076 @node Tcl scripting API
3077 @chapter Tcl scripts
3078 @cindex Tcl scripting API
3082 The commands are stateless. E.g. the telnet command line has a concept
3083 of currently active target, the Tcl API proc's take this sort of state
3084 information as an argument to each proc.
3086 There are three main types of return values: single value, name value
3087 pair list and lists.
3089 Name value pair. The proc 'foo' below returns a name/value pair
3095 > set foo(you) Oyvind
3096 > set foo(mouse) Micky
3097 > set foo(duck) Donald
3105 me Duane you Oyvind mouse Micky duck Donald
3107 Thus, to get the names of the associative array is easy:
3109 foreach { name value } [set foo] {
3110 puts "Name: $name, Value: $value"
3114 Lists returned must be relatively small. Otherwise a range
3115 should be passed in to the proc in question.
3117 @section Internal low-level Commands
3119 By low-level, the intent is a human would not directly use these commands.
3121 Low-level commands are (should be) prefixed with "openocd_", e.g. openocd_flash_banks
3122 is the low level API upon which "flash banks" is implemented.
3125 @item @b{ocd_mem2array} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
3127 Read memory and return as a Tcl array for script processing
3128 @item @b{ocd_array2mem} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
3130 Convert a Tcl array to memory locations and write the values
3131 @item @b{ocd_flash_banks} <@var{driver}> <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}> <@var{target}> [@option{driver options} ...]
3133 Return information about the flash banks
3136 OpenOCD commands can consist of two words, e.g. "flash banks". The
3137 startup.tcl "unknown" proc will translate this into a Tcl proc
3138 called "flash_banks".
3140 @section OpenOCD specific global variables
3144 Real Tcl has ::tcl_platform(), and platform::identify, and many other
3145 variables. JimTCL, as implemented in OpenOCD creates $HostOS which
3146 holds one of the following values:
3149 @item @b{winxx} Built using Microsoft Visual Studio
3150 @item @b{linux} Linux is the underlying operating sytem
3151 @item @b{darwin} Darwin (mac-os) is the underlying operating sytem.
3152 @item @b{cygwin} Running under Cygwin
3153 @item @b{mingw32} Running under MingW32
3154 @item @b{other} Unknown, none of the above.
3157 Note: 'winxx' was choosen because today (March-2009) no distinction is made between Win32 and Win64.
3160 @chapter Deprecated/Removed commands
3161 @cindex Deprecated/Removed commands
3162 Certain OpenOCD commands have been deprecated/removed during the various revisions.
3165 @item @b{arm7_9 fast_writes}
3166 @cindex arm7_9 fast_writes
3167 @*use @option{arm7_9 fast_memory_access} command with same args. @xref{arm7_9 fast_memory_access}.
3168 @item @b{arm7_9 force_hw_bkpts}
3169 @cindex arm7_9 force_hw_bkpts
3170 @*Use @option{gdb_breakpoint_override} instead. Note that GDB will use hardware breakpoints
3171 for flash if the GDB memory map has been set up(default when flash is declared in
3172 target configuration). @xref{gdb_breakpoint_override}.
3173 @item @b{arm7_9 sw_bkpts}
3174 @cindex arm7_9 sw_bkpts
3175 @*On by default. See also @option{gdb_breakpoint_override}. @xref{gdb_breakpoint_override}.
3176 @item @b{daemon_startup}
3177 @cindex daemon_startup
3178 @*this config option has been removed, simply adding @option{init} and @option{reset halt} to
3179 the end of your config script will give the same behavior as using @option{daemon_startup reset}
3180 and @option{target cortex_m3 little reset_halt 0}.
3181 @item @b{dump_binary}
3183 @*use @option{dump_image} command with same args. @xref{dump_image}.
3184 @item @b{flash erase}
3186 @*use @option{flash erase_sector} command with same args. @xref{flash erase_sector}.
3187 @item @b{flash write}
3189 @*use @option{flash write_bank} command with same args. @xref{flash write_bank}.
3190 @item @b{flash write_binary}
3191 @cindex flash write_binary
3192 @*use @option{flash write_bank} command with same args. @xref{flash write_bank}.
3193 @item @b{flash auto_erase}
3194 @cindex flash auto_erase
3195 @*use @option{flash write_image} command passing @option{erase} as the first parameter. @xref{flash write_image}.
3196 @item @b{load_binary}
3198 @*use @option{load_image} command with same args. @xref{load_image}.
3199 @item @b{run_and_halt_time}
3200 @cindex run_and_halt_time
3201 @*This command has been removed for simpler reset behavior, it can be simulated with the
3208 @item @b{target} <@var{type}> <@var{endian}> <@var{jtag-position}>
3210 @*use the create subcommand of @option{target}.
3211 @item @b{target_script} <@var{target#}> <@var{eventname}> <@var{scriptname}>
3212 @cindex target_script
3213 @*use <@var{target_name}> configure -event <@var{eventname}> "script <@var{scriptname}>"
3214 @item @b{working_area}
3215 @cindex working_area
3216 @*use the @option{configure} subcommand of @option{target} to set the work-area-virt, work-area-phy, work-area-size, and work-area-backup properties of the target.
3223 @item @b{RTCK, also known as: Adaptive Clocking - What is it?}
3225 @cindex adaptive clocking
3228 In digital circuit design it is often refered to as ``clock
3229 synchronization'' the JTAG interface uses one clock (TCK or TCLK)
3230 operating at some speed, your target is operating at another. The two
3231 clocks are not synchronized, they are ``asynchronous''
3233 In order for the two to work together they must be synchronized. Otherwise
3234 the two systems will get out of sync with each other and nothing will
3235 work. There are 2 basic options:
3238 Use a special circuit.
3240 One clock must be some multiple slower than the other.
3243 @b{Does this really matter?} For some chips and some situations, this
3244 is a non-issue (i.e.: A 500MHz ARM926) but for others - for example some
3245 Atmel SAM7 and SAM9 chips start operation from reset at 32kHz -
3246 program/enable the oscillators and eventually the main clock. It is in
3247 those critical times you must slow the JTAG clock to sometimes 1 to
3250 Imagine debugging a 500MHz ARM926 hand held battery powered device
3251 that ``deep sleeps'' at 32kHz between every keystroke. It can be
3254 @b{Solution #1 - A special circuit}
3256 In order to make use of this, your JTAG dongle must support the RTCK
3257 feature. Not all dongles support this - keep reading!
3259 The RTCK signal often found in some ARM chips is used to help with
3260 this problem. ARM has a good description of the problem described at
3261 this link: @url{http://www.arm.com/support/faqdev/4170.html} [checked
3262 28/nov/2008]. Link title: ``How does the JTAG synchronization logic
3263 work? / how does adaptive clocking work?''.
3265 The nice thing about adaptive clocking is that ``battery powered hand
3266 held device example'' - the adaptiveness works perfectly all the
3267 time. One can set a break point or halt the system in the deep power
3268 down code, slow step out until the system speeds up.
3270 @b{Solution #2 - Always works - but may be slower}
3272 Often this is a perfectly acceptable solution.
3274 In most simple terms: Often the JTAG clock must be 1/10 to 1/12 of
3275 the target clock speed. But what that ``magic division'' is varies
3276 depending on the chips on your board. @b{ARM rule of thumb} Most ARM
3277 based systems require an 8:1 division. @b{Xilinx rule of thumb} is
3278 1/12 the clock speed.
3280 Note: Many FTDI2232C based JTAG dongles are limited to 6MHz.
3282 You can still debug the 'low power' situations - you just need to
3283 manually adjust the clock speed at every step. While painful and
3284 tedious, it is not always practical.
3286 It is however easy to ``code your way around it'' - i.e.: Cheat a little,
3287 have a special debug mode in your application that does a ``high power
3288 sleep''. If you are careful - 98% of your problems can be debugged
3291 To set the JTAG frequency use the command:
3299 @item @b{Win32 Pathnames} Why don't backslashes work in Windows paths?
3301 OpenOCD uses Tcl and a backslash is an escape char. Use @{ and @}
3302 around Windows filenames.
3315 @item @b{Missing: cygwin1.dll} OpenOCD complains about a missing cygwin1.dll.
3317 Make sure you have Cygwin installed, or at least a version of OpenOCD that
3318 claims to come with all the necessary DLLs. When using Cygwin, try launching
3319 OpenOCD from the Cygwin shell.
3321 @item @b{Breakpoint Issue} I'm trying to set a breakpoint using GDB (or a frontend like Insight or
3322 Eclipse), but OpenOCD complains that "Info: arm7_9_common.c:213
3323 arm7_9_add_breakpoint(): sw breakpoint requested, but software breakpoints not enabled".
3325 GDB issues software breakpoints when a normal breakpoint is requested, or to implement
3326 source-line single-stepping. On ARMv4T systems, like ARM7TDMI, ARM720T or ARM920T,
3327 software breakpoints consume one of the two available hardware breakpoints.
3329 @item @b{LPC2000 Flash} When erasing or writing LPC2000 on-chip flash, the operation fails at random.
3331 Make sure the core frequency specified in the @option{flash lpc2000} line matches the
3332 clock at the time you're programming the flash. If you've specified the crystal's
3333 frequency, make sure the PLL is disabled. If you've specified the full core speed
3334 (e.g. 60MHz), make sure the PLL is enabled.
3336 @item @b{Amontec Chameleon} When debugging using an Amontec Chameleon in its JTAG Accelerator configuration,
3337 I keep getting "Error: amt_jtagaccel.c:184 amt_wait_scan_busy(): amt_jtagaccel timed
3338 out while waiting for end of scan, rtck was disabled".
3340 Make sure your PC's parallel port operates in EPP mode. You might have to try several
3341 settings in your PC BIOS (ECP, EPP, and different versions of those).
3343 @item @b{Data Aborts} When debugging with OpenOCD and GDB (plain GDB, Insight, or Eclipse),
3344 I get lots of "Error: arm7_9_common.c:1771 arm7_9_read_memory():
3345 memory read caused data abort".
3347 The errors are non-fatal, and are the result of GDB trying to trace stack frames
3348 beyond the last valid frame. It might be possible to prevent this by setting up
3349 a proper "initial" stack frame, if you happen to know what exactly has to
3350 be done, feel free to add this here.
3352 @b{Simple:} In your startup code - push 8 registers of zeros onto the
3353 stack before calling main(). What GDB is doing is ``climbing'' the run
3354 time stack by reading various values on the stack using the standard
3355 call frame for the target. GDB keeps going - until one of 2 things
3356 happen @b{#1} an invalid frame is found, or @b{#2} some huge number of
3357 stackframes have been processed. By pushing zeros on the stack, GDB
3360 @b{Debugging Interrupt Service Routines} - In your ISR before you call
3361 your C code, do the same - artifically push some zeros onto the stack,
3362 remember to pop them off when the ISR is done.
3364 @b{Also note:} If you have a multi-threaded operating system, they
3365 often do not @b{in the intrest of saving memory} waste these few
3369 @item @b{JTAG Reset Config} I get the following message in the OpenOCD console (or log file):
3370 "Warning: arm7_9_common.c:679 arm7_9_assert_reset(): srst resets test logic, too".
3372 This warning doesn't indicate any serious problem, as long as you don't want to
3373 debug your core right out of reset. Your .cfg file specified @option{jtag_reset
3374 trst_and_srst srst_pulls_trst} to tell OpenOCD that either your board,
3375 your debugger or your target uC (e.g. LPC2000) can't assert the two reset signals
3376 independently. With this setup, it's not possible to halt the core right out of
3377 reset, everything else should work fine.
3379 @item @b{USB Power} When using OpenOCD in conjunction with Amontec JTAGkey and the Yagarto
3380 toolchain (Eclipse, arm-elf-gcc, arm-elf-gdb), the debugging seems to be
3381 unstable. When single-stepping over large blocks of code, GDB and OpenOCD
3382 quit with an error message. Is there a stability issue with OpenOCD?
3384 No, this is not a stability issue concerning OpenOCD. Most users have solved
3385 this issue by simply using a self-powered USB hub, which they connect their
3386 Amontec JTAGkey to. Apparently, some computers do not provide a USB power
3387 supply stable enough for the Amontec JTAGkey to be operated.
3389 @b{Laptops running on battery have this problem too...}
3391 @item @b{USB Power} When using the Amontec JTAGkey, sometimes OpenOCD crashes with the
3392 following error messages: "Error: ft2232.c:201 ft2232_read(): FT_Read returned:
3393 4" and "Error: ft2232.c:365 ft2232_send_and_recv(): couldn't read from FT2232".
3394 What does that mean and what might be the reason for this?
3396 First of all, the reason might be the USB power supply. Try using a self-powered
3397 hub instead of a direct connection to your computer. Secondly, the error code 4
3398 corresponds to an FT_IO_ERROR, which means that the driver for the FTDI USB
3399 chip ran into some sort of error - this points us to a USB problem.
3401 @item @b{GDB Disconnects} When using the Amontec JTAGkey, sometimes OpenOCD crashes with the following
3402 error message: "Error: gdb_server.c:101 gdb_get_char(): read: 10054".
3403 What does that mean and what might be the reason for this?
3405 Error code 10054 corresponds to WSAECONNRESET, which means that the debugger (GDB)
3406 has closed the connection to OpenOCD. This might be a GDB issue.
3408 @item @b{LPC2000 Flash} In the configuration file in the section where flash device configurations
3409 are described, there is a parameter for specifying the clock frequency
3410 for LPC2000 internal flash devices (e.g. @option{flash bank lpc2000
3411 0x0 0x40000 0 0 0 lpc2000_v1 14746 calc_checksum}), which must be
3412 specified in kilohertz. However, I do have a quartz crystal of a
3413 frequency that contains fractions of kilohertz (e.g. 14,745,600 Hz,
3414 i.e. 14,745.600 kHz). Is it possible to specify real numbers for the
3417 No. The clock frequency specified here must be given as an integral number.
3418 However, this clock frequency is used by the In-Application-Programming (IAP)
3419 routines of the LPC2000 family only, which seems to be very tolerant concerning
3420 the given clock frequency, so a slight difference between the specified clock
3421 frequency and the actual clock frequency will not cause any trouble.
3423 @item @b{Command Order} Do I have to keep a specific order for the commands in the configuration file?
3425 Well, yes and no. Commands can be given in arbitrary order, yet the
3426 devices listed for the JTAG scan chain must be given in the right
3427 order (jtag newdevice), with the device closest to the TDO-Pin being
3428 listed first. In general, whenever objects of the same type exist
3429 which require an index number, then these objects must be given in the
3430 right order (jtag newtap, targets and flash banks - a target
3431 references a jtag newtap and a flash bank references a target).
3433 You can use the ``scan_chain'' command to verify and display the tap order.
3435 @item @b{JTAG Tap Order} JTAG tap order - command order
3437 Many newer devices have multiple JTAG taps. For example: ST
3438 Microsystems STM32 chips have two taps, a ``boundary scan tap'' and
3439 ``Cortex-M3'' tap. Example: The STM32 reference manual, Document ID:
3440 RM0008, Section 26.5, Figure 259, page 651/681, the ``TDI'' pin is
3441 connected to the boundary scan tap, which then connects to the
3442 Cortex-M3 tap, which then connects to the TDO pin.
3444 Thus, the proper order for the STM32 chip is: (1) The Cortex-M3, then
3445 (2) The boundary scan tap. If your board includes an additional JTAG
3446 chip in the scan chain (for example a Xilinx CPLD or FPGA) you could
3447 place it before or after the STM32 chip in the chain. For example:
3450 @item OpenOCD_TDI(output) -> STM32 TDI Pin (BS Input)
3451 @item STM32 BS TDO (output) -> STM32 Cortex-M3 TDI (input)
3452 @item STM32 Cortex-M3 TDO (output) -> SM32 TDO Pin
3453 @item STM32 TDO Pin (output) -> Xilinx TDI Pin (input)
3454 @item Xilinx TDO Pin -> OpenOCD TDO (input)
3457 The ``jtag device'' commands would thus be in the order shown below. Note:
3460 @item jtag newtap Xilinx tap -irlen ...
3461 @item jtag newtap stm32 cpu -irlen ...
3462 @item jtag newtap stm32 bs -irlen ...
3463 @item # Create the debug target and say where it is
3464 @item target create stm32.cpu -chain-position stm32.cpu ...
3468 @item @b{SYSCOMP} Sometimes my debugging session terminates with an error. When I look into the
3469 log file, I can see these error messages: Error: arm7_9_common.c:561
3470 arm7_9_execute_sys_speed(): timeout waiting for SYSCOMP
3476 @node Tcl Crash Course
3477 @chapter Tcl Crash Course
3480 Not everyone knows Tcl - this is not intended to be a replacement for
3481 learning Tcl, the intent of this chapter is to give you some idea of
3482 how the Tcl scripts work.
3484 This chapter is written with two audiences in mind. (1) OpenOCD users
3485 who need to understand a bit more of how JIM-Tcl works so they can do
3486 something useful, and (2) those that want to add a new command to
3489 @section Tcl Rule #1
3490 There is a famous joke, it goes like this:
3492 @item Rule #1: The wife is always correct
3493 @item Rule #2: If you think otherwise, See Rule #1
3496 The Tcl equal is this:
3499 @item Rule #1: Everything is a string
3500 @item Rule #2: If you think otherwise, See Rule #1
3503 As in the famous joke, the consequences of Rule #1 are profound. Once
3504 you understand Rule #1, you will understand Tcl.
3506 @section Tcl Rule #1b
3507 There is a second pair of rules.
3509 @item Rule #1: Control flow does not exist. Only commands
3510 @* For example: the classic FOR loop or IF statement is not a control
3511 flow item, they are commands, there is no such thing as control flow
3513 @item Rule #2: If you think otherwise, See Rule #1
3514 @* Actually what happens is this: There are commands that by
3515 convention, act like control flow key words in other languages. One of
3516 those commands is the word ``for'', another command is ``if''.
3519 @section Per Rule #1 - All Results are strings
3520 Every Tcl command results in a string. The word ``result'' is used
3521 deliberatly. No result is just an empty string. Remember: @i{Rule #1 -
3522 Everything is a string}
3524 @section Tcl Quoting Operators
3525 In life of a Tcl script, there are two important periods of time, the
3526 difference is subtle.
3529 @item Evaluation Time
3532 The two key items here are how ``quoted things'' work in Tcl. Tcl has
3533 three primary quoting constructs, the [square-brackets] the
3534 @{curly-braces@} and ``double-quotes''
3536 By now you should know $VARIABLES always start with a $DOLLAR
3537 sign. BTW: To set a variable, you actually use the command ``set'', as
3538 in ``set VARNAME VALUE'' much like the ancient BASIC langauge ``let x
3539 = 1'' statement, but without the equal sign.
3542 @item @b{[square-brackets]}
3543 @* @b{[square-brackets]} are command subsitutions. It operates much
3544 like Unix Shell `back-ticks`. The result of a [square-bracket]
3545 operation is exactly 1 string. @i{Remember Rule #1 - Everything is a
3546 string}. These two statements are roughly identical:
3550 echo "The Date is: $X"
3553 puts "The Date is: $X"
3555 @item @b{``double-quoted-things''}
3556 @* @b{``double-quoted-things''} are just simply quoted
3557 text. $VARIABLES and [square-brackets] are expanded in place - the
3558 result however is exactly 1 string. @i{Remember Rule #1 - Everything
3562 puts "It is now \"[date]\", $x is in 1 hour"
3564 @item @b{@{Curly-Braces@}}
3565 @*@b{@{Curly-Braces@}} are magic: $VARIABLES and [square-brackets] are
3566 parsed, but are NOT expanded or executed. @{Curly-Braces@} are like
3567 'single-quote' operators in BASH shell scripts, with the added
3568 feature: @{curly-braces@} can be nested, single quotes can not. @{@{@{this is
3569 nested 3 times@}@}@} NOTE: [date] is perhaps a bad example, as of
3570 28/nov/2008, Jim/OpenOCD does not have a date command.
3573 @section Consequences of Rule 1/2/3/4
3575 The consequences of Rule 1 are profound.
3577 @subsection Tokenization & Execution.
3579 Of course, whitespace, blank lines and #comment lines are handled in
3582 As a script is parsed, each (multi) line in the script file is
3583 tokenized and according to the quoting rules. After tokenization, that
3584 line is immedatly executed.
3586 Multi line statements end with one or more ``still-open''
3587 @{curly-braces@} which - eventually - closes a few lines later.
3589 @subsection Command Execution
3591 Remember earlier: There are no ``control flow''
3592 statements in Tcl. Instead there are COMMANDS that simply act like
3593 control flow operators.
3595 Commands are executed like this:
3598 @item Parse the next line into (argc) and (argv[]).
3599 @item Look up (argv[0]) in a table and call its function.
3600 @item Repeat until End Of File.
3603 It sort of works like this:
3606 ReadAndParse( &argc, &argv );
3608 cmdPtr = LookupCommand( argv[0] );
3610 (*cmdPtr->Execute)( argc, argv );
3614 When the command ``proc'' is parsed (which creates a procedure
3615 function) it gets 3 parameters on the command line. @b{1} the name of
3616 the proc (function), @b{2} the list of parameters, and @b{3} the body
3617 of the function. Not the choice of words: LIST and BODY. The PROC
3618 command stores these items in a table somewhere so it can be found by
3621 @subsection The FOR command
3623 The most interesting command to look at is the FOR command. In Tcl,
3624 the FOR command is normally implemented in C. Remember, FOR is a
3625 command just like any other command.
3627 When the ascii text containing the FOR command is parsed, the parser
3628 produces 5 parameter strings, @i{(If in doubt: Refer to Rule #1)} they
3632 @item The ascii text 'for'
3633 @item The start text
3634 @item The test expression
3639 Sort of reminds you of ``main( int argc, char **argv )'' does it not?
3640 Remember @i{Rule #1 - Everything is a string.} The key point is this:
3641 Often many of those parameters are in @{curly-braces@} - thus the
3642 variables inside are not expanded or replaced until later.
3644 Remember that every Tcl command looks like the classic ``main( argc,
3645 argv )'' function in C. In JimTCL - they actually look like this:
3649 MyCommand( Jim_Interp *interp,
3651 Jim_Obj * const *argvs );
3654 Real Tcl is nearly identical. Although the newer versions have
3655 introduced a byte-code parser and intepreter, but at the core, it
3656 still operates in the same basic way.
3658 @subsection FOR command implementation
3660 To understand Tcl it is perhaps most helpful to see the FOR
3661 command. Remember, it is a COMMAND not a control flow structure.
3663 In Tcl there are two underlying C helper functions.
3665 Remember Rule #1 - You are a string.
3667 The @b{first} helper parses and executes commands found in an ascii
3668 string. Commands can be seperated by semicolons, or newlines. While
3669 parsing, variables are expanded via the quoting rules.
3671 The @b{second} helper evaluates an ascii string as a numerical
3672 expression and returns a value.
3674 Here is an example of how the @b{FOR} command could be
3675 implemented. The pseudo code below does not show error handling.
3677 void Execute_AsciiString( void *interp, const char *string );
3679 int Evaluate_AsciiExpression( void *interp, const char *string );
3682 MyForCommand( void *interp,
3687 SetResult( interp, "WRONG number of parameters");
3691 // argv[0] = the ascii string just like C
3693 // Execute the start statement.
3694 Execute_AsciiString( interp, argv[1] );
3698 i = Evaluate_AsciiExpression(interp, argv[2]);
3703 Execute_AsciiString( interp, argv[3] );
3705 // Execute the LOOP part
3706 Execute_AsciiString( interp, argv[4] );
3710 SetResult( interp, "" );
3715 Every other command IF, WHILE, FORMAT, PUTS, EXPR, everything works
3716 in the same basic way.
3718 @section OpenOCD Tcl usage
3720 @subsection source and find commands
3721 @b{Where:} In many configuration files
3722 @* Example: @b{ source [find FILENAME] }
3723 @*Remember the parsing rules
3725 @item The FIND command is in square brackets.
3726 @* The FIND command is executed with the parameter FILENAME. It should
3727 find the full path to the named file. The RESULT is a string, which is
3728 substituted on the orginal command line.
3729 @item The command source is executed with the resulting filename.
3730 @* SOURCE reads a file and executes as a script.
3732 @subsection format command
3733 @b{Where:} Generally occurs in numerous places.
3734 @* Tcl has no command like @b{printf()}, instead it has @b{format}, which is really more like
3740 puts [format "The answer: %d" [expr $x * $y]]
3743 @item The SET command creates 2 variables, X and Y.
3744 @item The double [nested] EXPR command performs math
3745 @* The EXPR command produces numerical result as a string.
3747 @item The format command is executed, producing a single string
3748 @* Refer to Rule #1.
3749 @item The PUTS command outputs the text.
3751 @subsection Body or inlined text
3752 @b{Where:} Various TARGET scripts.
3755 proc someproc @{@} @{
3756 ... multiple lines of stuff ...
3758 $_TARGETNAME configure -event FOO someproc
3759 #2 Good - no variables
3760 $_TARGETNAME confgure -event foo "this ; that;"
3761 #3 Good Curly Braces
3762 $_TARGETNAME configure -event FOO @{
3765 #4 DANGER DANGER DANGER
3766 $_TARGETNAME configure -event foo "puts \"Time: [date]\""
3769 @item The $_TARGETNAME is an OpenOCD variable convention.
3770 @*@b{$_TARGETNAME} represents the last target created, the value changes
3771 each time a new target is created. Remember the parsing rules. When
3772 the ascii text is parsed, the @b{$_TARGETNAME} becomes a simple string,
3773 the name of the target which happens to be a TARGET (object)
3775 @item The 2nd parameter to the @option{-event} parameter is a TCBODY
3776 @*There are 4 examples:
3778 @item The TCLBODY is a simple string that happens to be a proc name
3779 @item The TCLBODY is several simple commands seperated by semicolons
3780 @item The TCLBODY is a multi-line @{curly-brace@} quoted string
3781 @item The TCLBODY is a string with variables that get expanded.
3784 In the end, when the target event FOO occurs the TCLBODY is
3785 evaluated. Method @b{#1} and @b{#2} are functionally identical. For
3786 Method @b{#3} and @b{#4} it is more interesting. What is the TCLBODY?
3788 Remember the parsing rules. In case #3, @{curly-braces@} mean the
3789 $VARS and [square-brackets] are expanded later, when the EVENT occurs,
3790 and the text is evaluated. In case #4, they are replaced before the
3791 ``Target Object Command'' is executed. This occurs at the same time
3792 $_TARGETNAME is replaced. In case #4 the date will never
3793 change. @{BTW: [date] is perhaps a bad example, as of 28/nov/2008,
3794 Jim/OpenOCD does not have a date command@}
3796 @subsection Global Variables
3797 @b{Where:} You might discover this when writing your own procs @* In
3798 simple terms: Inside a PROC, if you need to access a global variable
3799 you must say so. See also ``upvar''. Example:
3801 proc myproc @{ @} @{
3802 set y 0 #Local variable Y
3803 global x #Global variable X
3804 puts [format "X=%d, Y=%d" $x $y]
3807 @section Other Tcl hacks
3808 @b{Dynamic variable creation}
3810 # Dynamically create a bunch of variables.
3811 for @{ set x 0 @} @{ $x < 32 @} @{ set x [expr $x + 1]@} @{
3813 set vn [format "BIT%d" $x]
3817 set $vn [expr (1 << $x)]
3820 @b{Dynamic proc/command creation}
3822 # One "X" function - 5 uart functions.
3823 foreach who @{A B C D E@}
3824 proc [format "show_uart%c" $who] @{ @} "show_UARTx $who"
3828 @node Target library
3829 @chapter Target library
3830 @cindex Target library
3832 OpenOCD comes with a target configuration script library. These scripts can be
3833 used as-is or serve as a starting point.
3835 The target library is published together with the OpenOCD executable and
3836 the path to the target library is in the OpenOCD script search path.
3837 Similarly there are example scripts for configuring the JTAG interface.
3839 The command line below uses the example parport configuration script
3840 that ship with OpenOCD, then configures the str710.cfg target and
3841 finally issues the init and reset commands. The communication speed
3842 is set to 10kHz for reset and 8MHz for post reset.
3846 openocd -f interface/parport.cfg -f target/str710.cfg -c "init" -c "reset"
3850 To list the target scripts available:
3853 $ ls /usr/local/lib/openocd/target
3855 arm7_fast.cfg lm3s6965.cfg pxa255.cfg stm32.cfg xba_revA3.cfg
3856 at91eb40a.cfg lpc2148.cfg pxa255_sst.cfg str710.cfg zy1000.cfg
3857 at91r40008.cfg lpc2294.cfg sam7s256.cfg str912.cfg
3858 at91sam9260.cfg nslu2.cfg sam7x256.cfg wi-9c.cfg
3866 @comment DO NOT use the plain word ``Index'', reason: CYGWIN filename
3867 @comment case issue with ``Index.html'' and ``index.html''
3868 @comment Occurs when creating ``--html --no-split'' output
3869 @comment This fix is based on: http://sourceware.org/ml/binutils/2006-05/msg00215.html
3870 @unnumbered OpenOCD Index