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[openocd.git] / src / flash / aduc702x.c
1 /***************************************************************************
2 * Copyright (C) 2008 by Kevin McGuire *
3 * Copyright (C) 2008 by Marcel Wijlaars *
4 * Copyright (C) 2009 by Michael Ashton *
5 * *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
10 * *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
15 * *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
20 ***************************************************************************/
21
22 #ifdef HAVE_CONFIG_H
23 #include "config.h"
24 #endif
25
26 #include "flash.h"
27 #include "armv4_5.h"
28 #include "binarybuffer.h"
29 #include "time_support.h"
30
31
32 static int aduc702x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
33 static int aduc702x_register_commands(struct command_context_s *cmd_ctx);
34 static int aduc702x_erase(struct flash_bank_s *bank, int first, int last);
35 static int aduc702x_protect(struct flash_bank_s *bank, int set, int first, int last);
36 static int aduc702x_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
37 static int aduc702x_write_single(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
38 static int aduc702x_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
39 static int aduc702x_probe(struct flash_bank_s *bank);
40 static int aduc702x_info(struct flash_bank_s *bank, char *buf, int buf_size);
41 static int aduc702x_protect_check(struct flash_bank_s *bank);
42 static int aduc702x_build_sector_list(struct flash_bank_s *bank);
43 static int aduc702x_check_flash_completion(target_t* target, unsigned int timeout_ms);
44 static int aduc702x_set_write_enable(target_t *target, int enable);
45
46 #define ADUC702x_FLASH 0xfffff800
47 #define ADUC702x_FLASH_FEESTA (0*4)
48 #define ADUC702x_FLASH_FEEMOD (1*4)
49 #define ADUC702x_FLASH_FEECON (2*4)
50 #define ADUC702x_FLASH_FEEDAT (3*4)
51 #define ADUC702x_FLASH_FEEADR (4*4)
52 #define ADUC702x_FLASH_FEESIGN (5*4)
53 #define ADUC702x_FLASH_FEEPRO (6*4)
54 #define ADUC702x_FLASH_FEEHIDE (7*4)
55
56 typedef struct {
57 uint32_t feesta;
58 uint32_t feemod;
59 uint32_t feecon;
60 uint32_t feedat;
61 uint32_t feeadr;
62 uint32_t feesign;
63 uint32_t feepro;
64 uint32_t feehide;
65 } ADUC702x_FLASH_MMIO;
66
67 typedef struct
68 {
69 working_area_t *write_algorithm;
70 } aduc702x_flash_bank_t;
71
72 flash_driver_t aduc702x_flash =
73 {
74 .name = "aduc702x",
75 .register_commands = aduc702x_register_commands,
76 .flash_bank_command = aduc702x_flash_bank_command,
77 .erase = aduc702x_erase,
78 .protect = aduc702x_protect,
79 .write = aduc702x_write,
80 .probe = aduc702x_probe,
81 .auto_probe = aduc702x_probe,
82 .erase_check = default_flash_blank_check,
83 .protect_check = aduc702x_protect_check,
84 .info = aduc702x_info
85 };
86
87 static int aduc702x_register_commands(struct command_context_s *cmd_ctx)
88 {
89 return ERROR_OK;
90 }
91
92 /* flash bank aduc702x 0 0 0 0 <target#>
93 * The ADC7019-28 devices all have the same flash layout */
94 static int aduc702x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
95 {
96 aduc702x_flash_bank_t *nbank;
97
98 nbank = malloc(sizeof(aduc702x_flash_bank_t));
99
100 bank->base = 0x80000;
101 bank->size = 0xF800; // top 4k not accessible
102 bank->driver_priv = nbank;
103
104 aduc702x_build_sector_list(bank);
105
106 return ERROR_OK;
107 }
108
109 static int aduc702x_build_sector_list(struct flash_bank_s *bank)
110 {
111 //aduc7026_flash_bank_t *aduc7026_info = bank->driver_priv;
112
113 int i = 0;
114 uint32_t offset = 0;
115
116 // sector size is 512
117 bank->num_sectors = bank->size / 512;
118 bank->sectors = malloc(sizeof(flash_sector_t) * bank->num_sectors);
119 for (i = 0; i < bank->num_sectors; ++i)
120 {
121 bank->sectors[i].offset = offset;
122 bank->sectors[i].size = 512;
123 offset += bank->sectors[i].size;
124 bank->sectors[i].is_erased = -1;
125 bank->sectors[i].is_protected = 0;
126 }
127
128 return ERROR_OK;
129 }
130
131 static int aduc702x_protect_check(struct flash_bank_s *bank)
132 {
133 printf("aduc702x_protect_check not implemented yet.\n");
134 return ERROR_OK;
135 }
136
137 static int aduc702x_erase(struct flash_bank_s *bank, int first, int last)
138 {
139 //int res;
140 int x;
141 int count;
142 //uint32_t v;
143 target_t *target = bank->target;
144
145 aduc702x_set_write_enable(target, 1);
146
147 /* mass erase */
148 if (((first | last) == 0) || ((first == 0) && (last >= bank->num_sectors))) {
149 LOG_DEBUG("performing mass erase.\n");
150 target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEDAT, 0x3cff);
151 target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, 0xffc3);
152 target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x06);
153
154 if (aduc702x_check_flash_completion(target, 3500) != ERROR_OK)
155 {
156 LOG_ERROR("mass erase failed\n");
157 aduc702x_set_write_enable(target, 0);
158 return ERROR_FLASH_OPERATION_FAILED;
159 }
160
161 LOG_DEBUG("mass erase successful.\n");
162 return ERROR_OK;
163 } else {
164 unsigned long adr;
165
166 count = last - first + 1;
167 for (x = 0; x < count; ++x)
168 {
169 adr = bank->base + ((first + x) * 512);
170
171 target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, adr);
172 target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x05);
173
174 if (aduc702x_check_flash_completion(target, 50) != ERROR_OK)
175 {
176 LOG_ERROR("failed to erase sector at address 0x%08lX\n", adr);
177 aduc702x_set_write_enable(target, 0);
178 return ERROR_FLASH_SECTOR_NOT_ERASED;
179 }
180
181 LOG_DEBUG("erased sector at address 0x%08lX\n", adr);
182 }
183 }
184
185 aduc702x_set_write_enable(target, 0);
186
187 return ERROR_OK;
188 }
189
190 static int aduc702x_protect(struct flash_bank_s *bank, int set, int first, int last)
191 {
192 printf("aduc702x_protect not implemented yet.\n");
193 return ERROR_FLASH_OPERATION_FAILED;
194 }
195
196 static int aduc702x_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
197 {
198 aduc702x_flash_bank_t *aduc702x_info = bank->driver_priv;
199 target_t *target = bank->target;
200 uint32_t buffer_size = 7000;
201 working_area_t *source;
202 uint32_t address = bank->base + offset;
203 reg_param_t reg_params[6];
204 armv4_5_algorithm_t armv4_5_info;
205 int retval = ERROR_OK;
206
207 /* parameters:
208
209 r0 - address of source data (absolute)
210 r1 - number of halfwords to be copied
211 r2 - start address in flash (offset from beginning of flash memory)
212 r3 - exit code
213 r4 - base address of flash controller (0xFFFFF800)
214
215 registers:
216
217 r5 - scratch
218 r6 - set to 2, used to write flash command
219
220 */
221 uint32_t aduc702x_flash_write_code[] = {
222 //<_start>:
223 0xe3a05008, // mov r5, #8 ; 0x8
224 0xe5845004, // str r5, [r4, #4]
225 0xe3a06002, // mov r6, #2 ; 0x2
226 //<next>:
227 0xe1c421b0, // strh r2, [r4, #16]
228 0xe0d050b2, // ldrh r5, [r0], #2
229 0xe1c450bc, // strh r5, [r4, #12]
230 0xe5c46008, // strb r6, [r4, #8]
231 //<wait_complete>:
232 0xe1d430b0, // ldrh r3, [r4]
233 0xe3130004, // tst r3, #4 ; 0x4
234 0x1afffffc, // bne 1001c <wait_complete>
235 0xe2822002, // add r2, r2, #2 ; 0x2
236 0xe2511001, // subs r1, r1, #1 ; 0x1
237 0x0a000001, // beq 1003c <done>
238 0xe3130001, // tst r3, #1 ; 0x1
239 0x1afffff3, // bne 1000c <next>
240 //<done>:
241 0xeafffffe // b 1003c <done>
242 };
243
244 /* flash write code */
245 if (target_alloc_working_area(target, sizeof(aduc702x_flash_write_code),
246 &aduc702x_info->write_algorithm) != ERROR_OK)
247 {
248 LOG_WARNING("no working area available, can't do block memory writes");
249 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
250 };
251
252 target_write_buffer(target, aduc702x_info->write_algorithm->address,
253 sizeof(aduc702x_flash_write_code), (uint8_t*)aduc702x_flash_write_code);
254
255 /* memory buffer */
256 while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK)
257 {
258 buffer_size /= 2;
259 if (buffer_size <= 256)
260 {
261 /* if we already allocated the writing code, but failed to get a buffer, free the algorithm */
262 if (aduc702x_info->write_algorithm)
263 target_free_working_area(target, aduc702x_info->write_algorithm);
264
265 LOG_WARNING("no large enough working area available, can't do block memory writes");
266 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
267 }
268 }
269
270 armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC;
271 armv4_5_info.core_mode = ARMV4_5_MODE_SVC;
272 armv4_5_info.core_state = ARMV4_5_STATE_ARM;
273
274 init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
275 init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);
276 init_reg_param(&reg_params[2], "r2", 32, PARAM_OUT);
277 init_reg_param(&reg_params[3], "r3", 32, PARAM_IN);
278 init_reg_param(&reg_params[4], "r4", 32, PARAM_OUT);
279
280 while (count > 0)
281 {
282 uint32_t thisrun_count = (count > (buffer_size / 2)) ? (buffer_size / 2) : count;
283
284 target_write_buffer(target, source->address, thisrun_count * 2, buffer);
285
286 buf_set_u32(reg_params[0].value, 0, 32, source->address);
287 buf_set_u32(reg_params[1].value, 0, 32, thisrun_count);
288 buf_set_u32(reg_params[2].value, 0, 32, address);
289 buf_set_u32(reg_params[4].value, 0, 32, 0xFFFFF800);
290
291 if ((retval = target_run_algorithm(target, 0, NULL, 5,
292 reg_params, aduc702x_info->write_algorithm->address,
293 aduc702x_info->write_algorithm->address + sizeof(aduc702x_flash_write_code) - 4,
294 10000, &armv4_5_info)) != ERROR_OK)
295 {
296 LOG_ERROR("error executing aduc702x flash write algorithm");
297 retval = ERROR_FLASH_OPERATION_FAILED;
298 break;
299 }
300
301 if ((buf_get_u32(reg_params[3].value, 0, 32) & 1) != 1) {
302 retval = ERROR_FLASH_OPERATION_FAILED;
303 break;
304 }
305
306 buffer += thisrun_count * 2;
307 address += thisrun_count * 2;
308 count -= thisrun_count;
309 }
310
311 target_free_working_area(target, source);
312 target_free_working_area(target, aduc702x_info->write_algorithm);
313
314 destroy_reg_param(&reg_params[0]);
315 destroy_reg_param(&reg_params[1]);
316 destroy_reg_param(&reg_params[2]);
317 destroy_reg_param(&reg_params[3]);
318 destroy_reg_param(&reg_params[4]);
319
320 return retval;
321 }
322
323 /* All-JTAG, single-access method. Very slow. Used only if there is no
324 * working area available. */
325 static int aduc702x_write_single(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
326 {
327 uint32_t x;
328 uint8_t b;
329 target_t *target = bank->target;
330
331 aduc702x_set_write_enable(target, 1);
332
333 for (x = 0; x < count; x += 2) {
334 // FEEADR = address
335 target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, offset + x);
336
337 // set up data
338 if ((x + 1) == count)
339 {
340 // last byte
341 target_read_u8(target, offset + x + 1, &b);
342 }
343 else
344 b = buffer[x + 1];
345
346 target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEDAT, buffer[x] | (b << 8));
347
348 // do single-write command
349 target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x02);
350
351 if (aduc702x_check_flash_completion(target, 1) != ERROR_OK)
352 {
353 LOG_ERROR("single write failed for address 0x%08lX\n", (unsigned long)(offset + x));
354 aduc702x_set_write_enable(target, 0);
355 return ERROR_FLASH_OPERATION_FAILED;
356 }
357
358 }
359 LOG_DEBUG("wrote %d bytes at address 0x%08lX\n", (int)count, (unsigned long)(offset + x));
360
361 aduc702x_set_write_enable(target, 0);
362
363 return ERROR_OK;
364 }
365
366 int aduc702x_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
367 {
368 int retval;
369
370 /* try using a block write */
371 if ((retval = aduc702x_write_block(bank, buffer, offset, count)) != ERROR_OK)
372 {
373 if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE)
374 {
375 /* if block write failed (no sufficient working area),
376 * use normal (slow) JTAG method */
377 LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
378
379 if ((retval = aduc702x_write_single(bank, buffer, offset, count)) != ERROR_OK)
380 {
381 LOG_ERROR("slow write failed");
382 return ERROR_FLASH_OPERATION_FAILED;
383 }
384 }
385 else if (retval == ERROR_FLASH_OPERATION_FAILED)
386 {
387 LOG_ERROR("flash block writing failed");
388 return ERROR_FLASH_OPERATION_FAILED;
389 }
390 }
391
392 return ERROR_OK;
393 }
394
395 static int aduc702x_probe(struct flash_bank_s *bank)
396 {
397 return ERROR_OK;
398 }
399
400 static int aduc702x_info(struct flash_bank_s *bank, char *buf, int buf_size)
401 {
402 snprintf(buf, buf_size, "aduc702x flash driver info");
403 return ERROR_OK;
404 }
405
406 /* sets FEEMOD bit 3
407 * enable = 1 enables writes & erases, 0 disables them */
408 static int aduc702x_set_write_enable(target_t *target, int enable)
409 {
410 // don't bother to preserve int enable bit here
411 target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEMOD, enable ? 8 : 0);
412
413 return ERROR_OK;
414 }
415
416 /* wait up to timeout_ms for controller to not be busy,
417 * then check whether the command passed or failed.
418 *
419 * this function sleeps 1ms between checks (after the first one),
420 * so in some cases may slow things down without a usleep after the first read */
421 static int aduc702x_check_flash_completion(target_t* target, unsigned int timeout_ms)
422 {
423 uint8_t v = 4;
424
425 long long endtime = timeval_ms() + timeout_ms;
426 while (1) {
427 target_read_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEESTA, &v);
428 if ((v & 4) == 0) break;
429 alive_sleep(1);
430 if (timeval_ms() >= endtime) break;
431 }
432
433 if (v & 2) return ERROR_FAIL;
434 // if a command is ignored, both the success and fail bits may be 0
435 else if ((v & 3) == 0) return ERROR_FAIL;
436 else return ERROR_OK;
437 }
438
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