4ef154c97f6516208d07c3208b49061b03af52d6
[openocd.git] / src / flash / at91sam7.h
1 /***************************************************************************
2 * Copyright (C) 2006 by Magnus Lundin *
3 * lundin@mlu.mine.nu *
4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
20 #ifndef AT91SAM7_H
21 #define AT91SAM7_H
22
23 #include "flash.h"
24 #include "target.h"
25
26 typedef struct at91sam7_flash_bank_s
27 {
28 u32 working_area;
29 u32 working_area_size;
30
31 /* chip id register */
32 u32 cidr;
33 u16 cidr_ext;
34 u16 cidr_nvptyp;
35 u16 cidr_arch;
36 u16 cidr_sramsiz;
37 u16 cidr_nvpsiz;
38 u16 cidr_nvpsiz2;
39 u16 cidr_eproc;
40 u16 cidr_version;
41 char * target_name;
42
43 /* flash geometry */
44 u16 num_pages;
45 u16 pagesize;
46 u16 pages_in_lockregion;
47 u8 num_erase_regions;
48 u8 num_planes;
49 u32 *erase_region_info;
50
51 /* nv memory bits */
52 u16 num_lockbits;
53 u16 lockbits[4];
54 u16 num_nvmbits;
55 u16 nvmbits;
56 u8 securitybit;
57 u8 flashmode[4]; /* 0: not init, 1: fmcn for nvbits (1uS), 2: fmcn for flash (1.5uS) */
58
59 /* main clock status */
60 u8 mck_valid;
61 u32 mck_freq;
62
63 int probed;
64
65 } at91sam7_flash_bank_t;
66
67 /* AT91SAM7 control registers */
68 #define DBGU_CIDR 0xFFFFF240
69 #define CKGR_MCFR 0xFFFFFC24
70 #define CKGR_MCFR_MAINRDY 0x10000
71 #define CKGR_PLLR 0xFFFFFC2c
72 #define CKGR_PLLR_DIV 0xff
73 #define CKGR_PLLR_MUL 0x07ff0000
74 #define PMC_MCKR 0xFFFFFC30
75 #define PMC_MCKR_CSS 0x03
76 #define PMC_MCKR_PRES 0x1c
77
78 /* Flash Controller Commands */
79 #define WP 0x01
80 #define SLB 0x02
81 #define WPL 0x03
82 #define CLB 0x04
83 #define EA 0x08
84 #define SGPB 0x0B
85 #define CGPB 0x0D
86 #define SSB 0x0F
87
88 /* MC_FSR bit definitions */
89 #define MC_FSR_FRDY 1
90 #define MC_FSR_EOL 2
91
92 /* AT91SAM7 constants */
93 #define RC_FREQ 32000
94
95 /* FLASH_TIMING_MODES */
96 #define FMR_TIMING_NONE 0
97 #define FMR_TIMING_NVBITS 1
98 #define FMR_TIMING_FLASH 2
99
100 #endif /* AT91SAM7_H */

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