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David Brownell <david-b@pacbell.net>:
[openocd.git] / src / flash / avrf.c
1 /***************************************************************************
2 * Copyright (C) 2009 by Simon Qian *
3 * SimonQian@SimonQian.com *
4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
20 #ifdef HAVE_CONFIG_H
21 #include "config.h"
22 #endif
23
24 #include "avrf.h"
25 #include "avrt.h"
26 #include "flash.h"
27
28
29 /* AVR_JTAG_Instructions */
30 #define AVR_JTAG_INS_LEN 4
31 // Public Instructions:
32 #define AVR_JTAG_INS_EXTEST 0x00
33 #define AVR_JTAG_INS_IDCODE 0x01
34 #define AVR_JTAG_INS_SAMPLE_PRELOAD 0x02
35 #define AVR_JTAG_INS_BYPASS 0x0F
36 // AVR Specified Public Instructions:
37 #define AVR_JTAG_INS_AVR_RESET 0x0C
38 #define AVR_JTAG_INS_PROG_ENABLE 0x04
39 #define AVR_JTAG_INS_PROG_COMMANDS 0x05
40 #define AVR_JTAG_INS_PROG_PAGELOAD 0x06
41 #define AVR_JTAG_INS_PROG_PAGEREAD 0x07
42
43 // Data Registers:
44 #define AVR_JTAG_REG_Bypass_Len 1
45 #define AVR_JTAG_REG_DeviceID_Len 32
46
47 #define AVR_JTAG_REG_Reset_Len 1
48 #define AVR_JTAG_REG_JTAGID_Len 32
49 #define AVR_JTAG_REG_ProgrammingEnable_Len 16
50 #define AVR_JTAG_REG_ProgrammingCommand_Len 15
51 #define AVR_JTAG_REG_FlashDataByte_Len 16
52
53 avrf_type_t avft_chips_info[] =
54 {
55 // name, chip_id, flash_page_size, flash_page_num, eeprom_page_size, eeprom_page_num
56 {"atmega128", 0x9702, 256, 512, 8, 512},
57 };
58
59 static int avrf_register_commands(struct command_context_s *cmd_ctx);
60 static int avrf_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
61 static int avrf_erase(struct flash_bank_s *bank, int first, int last);
62 static int avrf_protect(struct flash_bank_s *bank, int set, int first, int last);
63 static int avrf_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
64 static int avrf_probe(struct flash_bank_s *bank);
65 static int avrf_auto_probe(struct flash_bank_s *bank);
66 //static int avrf_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
67 static int avrf_protect_check(struct flash_bank_s *bank);
68 static int avrf_info(struct flash_bank_s *bank, char *buf, int buf_size);
69
70 static int avrf_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
71
72 extern int avr_jtag_sendinstr(jtag_tap_t *tap, u8 *ir_in, u8 ir_out);
73 extern int avr_jtag_senddat(jtag_tap_t *tap, u32 *dr_in, u32 dr_out, int len);
74
75 extern int mcu_write_ir(jtag_tap_t *tap, u8 *ir_in, u8 *ir_out, int ir_len, int rti);
76 extern int mcu_write_dr(jtag_tap_t *tap, u8 *ir_in, u8 *ir_out, int dr_len, int rti);
77 extern int mcu_write_ir_u8(jtag_tap_t *tap, u8 *ir_in, u8 ir_out, int ir_len, int rti);
78 extern int mcu_write_dr_u8(jtag_tap_t *tap, u8 *ir_in, u8 ir_out, int dr_len, int rti);
79 extern int mcu_write_ir_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int ir_len, int rti);
80 extern int mcu_write_dr_u16(jtag_tap_t *tap, u16 *ir_in, u16 ir_out, int dr_len, int rti);
81 extern int mcu_write_ir_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int ir_len, int rti);
82 extern int mcu_write_dr_u32(jtag_tap_t *tap, u32 *ir_in, u32 ir_out, int dr_len, int rti);
83 extern int mcu_execute_queue(void);
84
85 flash_driver_t avr_flash =
86 {
87 .name = "avr",
88 .register_commands = avrf_register_commands,
89 .flash_bank_command = avrf_flash_bank_command,
90 .erase = avrf_erase,
91 .protect = avrf_protect,
92 .write = avrf_write,
93 .probe = avrf_probe,
94 .auto_probe = avrf_auto_probe,
95 .erase_check = default_flash_mem_blank_check,
96 .protect_check = avrf_protect_check,
97 .info = avrf_info
98 };
99
100 /* avr program functions */
101 static int avr_jtag_reset(avr_common_t *avr, u32 reset)
102 {
103 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_AVR_RESET);
104 avr_jtag_senddat(avr->jtag_info.tap, NULL, reset ,AVR_JTAG_REG_Reset_Len);
105
106 return ERROR_OK;
107 }
108
109 static int avr_jtag_read_jtagid(avr_common_t *avr, u32 *id)
110 {
111 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_IDCODE);
112 avr_jtag_senddat(avr->jtag_info.tap, id, 0, AVR_JTAG_REG_JTAGID_Len);
113
114 return ERROR_OK;
115 }
116
117 static int avr_jtagprg_enterprogmode(avr_common_t *avr)
118 {
119 avr_jtag_reset(avr, 1);
120
121 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
122 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xA370, AVR_JTAG_REG_ProgrammingEnable_Len);
123
124 return ERROR_OK;
125 }
126
127 static int avr_jtagprg_leaveprogmode(avr_common_t *avr)
128 {
129 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
130 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2300, AVR_JTAG_REG_ProgrammingCommand_Len);
131 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3300, AVR_JTAG_REG_ProgrammingCommand_Len);
132
133 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
134 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0, AVR_JTAG_REG_ProgrammingEnable_Len);
135
136 avr_jtag_reset(avr, 0);
137
138 return ERROR_OK;
139 }
140
141 static int avr_jtagprg_chiperase(avr_common_t *avr)
142 {
143 u32 poll_value;
144
145 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
146 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2380, AVR_JTAG_REG_ProgrammingCommand_Len);
147 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3180, AVR_JTAG_REG_ProgrammingCommand_Len);
148 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
149 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
150
151 do{
152 poll_value = 0;
153 avr_jtag_senddat(avr->jtag_info.tap, &poll_value, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
154 if (ERROR_OK != mcu_execute_queue())
155 {
156 return ERROR_FAIL;
157 }
158 LOG_DEBUG("poll_value = 0x%04X", poll_value);
159 }while(!(poll_value & 0x0200));
160
161 return ERROR_OK;
162 }
163
164 static int avr_jtagprg_writeflashpage(avr_common_t *avr, u8 *page_buf, u32 buf_size, u32 addr, u32 page_size)
165 {
166 u32 i, poll_value;
167
168 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
169 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2310, AVR_JTAG_REG_ProgrammingCommand_Len);
170
171 // load addr high byte
172 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x0700 | ((addr >> 9) & 0xFF), AVR_JTAG_REG_ProgrammingCommand_Len);
173
174 // load addr low byte
175 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x0300 | ((addr >> 1) & 0xFF), AVR_JTAG_REG_ProgrammingCommand_Len);
176
177 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_PAGELOAD);
178
179 for (i = 0; i < page_size; i++)
180 {
181 if (i < buf_size)
182 {
183 avr_jtag_senddat(avr->jtag_info.tap, NULL, page_buf[i], 8);
184 }
185 else
186 {
187 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xFF, 8);
188 }
189 }
190
191 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
192
193 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
194 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3500, AVR_JTAG_REG_ProgrammingCommand_Len);
195 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
196 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
197
198 do{
199 poll_value = 0;
200 avr_jtag_senddat(avr->jtag_info.tap, &poll_value, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
201 if (ERROR_OK != mcu_execute_queue())
202 {
203 return ERROR_FAIL;
204 }
205 LOG_DEBUG("poll_value = 0x%04X", poll_value);
206 }while(!(poll_value & 0x0200));
207
208 return ERROR_OK;
209 }
210
211 /* interface command */
212 static int avrf_register_commands(struct command_context_s *cmd_ctx)
213 {
214 command_t *avr_cmd = register_command(cmd_ctx, NULL, "avr", NULL, COMMAND_ANY, "avr flash specific commands");
215
216 register_command(cmd_ctx, avr_cmd, "mass_erase", avrf_handle_mass_erase_command, COMMAND_EXEC,
217 "mass erase device");
218
219 return ERROR_OK;
220 }
221
222 static int avrf_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
223 {
224 avrf_flash_bank_t *avrf_info;
225
226 if (argc < 6)
227 {
228 LOG_WARNING("incomplete flash_bank avr configuration");
229 return ERROR_FLASH_BANK_INVALID;
230 }
231
232 avrf_info = malloc(sizeof(avrf_flash_bank_t));
233 bank->driver_priv = avrf_info;
234
235 avrf_info->probed = 0;
236
237 return ERROR_OK;
238 }
239
240 static int avrf_erase(struct flash_bank_s *bank, int first, int last)
241 {
242 LOG_INFO("%s", __FUNCTION__);
243 return ERROR_OK;
244 }
245
246 static int avrf_protect(struct flash_bank_s *bank, int set, int first, int last)
247 {
248 LOG_INFO("%s", __FUNCTION__);
249 return ERROR_OK;
250 }
251
252 static int avrf_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
253 {
254 target_t *target = bank->target;
255 avr_common_t *avr = target->arch_info;
256 u32 cur_size, cur_buffer_size, page_size;
257
258 if (bank->target->state != TARGET_HALTED)
259 {
260 LOG_ERROR("Target not halted");
261 return ERROR_TARGET_NOT_HALTED;
262 }
263
264 page_size = bank->sectors[0].size;
265 if ((offset % page_size) != 0)
266 {
267 LOG_WARNING("offset 0x%x breaks required %d-byte alignment", offset, page_size);
268 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
269 }
270
271 LOG_DEBUG("offset is 0x%08X", offset);
272 LOG_DEBUG("count is %d", count);
273
274 if (ERROR_OK != avr_jtagprg_enterprogmode(avr))
275 {
276 return ERROR_FAIL;
277 }
278
279 cur_size = 0;
280 while(count > 0)
281 {
282 if (count > page_size)
283 {
284 cur_buffer_size = page_size;
285 }
286 else
287 {
288 cur_buffer_size = count;
289 }
290 avr_jtagprg_writeflashpage(avr, buffer + cur_size, cur_buffer_size, offset + cur_size, page_size);
291 count -= cur_buffer_size;
292 cur_size += cur_buffer_size;
293
294 keep_alive();
295 }
296
297 return avr_jtagprg_leaveprogmode(avr);
298 }
299
300 #define EXTRACT_MFG(X) (((X) & 0xffe) >> 1)
301 #define EXTRACT_PART(X) (((X) & 0xffff000) >> 12)
302 #define EXTRACT_VER(X) (((X) & 0xf0000000) >> 28)
303 static int avrf_probe(struct flash_bank_s *bank)
304 {
305 target_t *target = bank->target;
306 avrf_flash_bank_t *avrf_info = bank->driver_priv;
307 avr_common_t *avr = target->arch_info;
308 avrf_type_t *avr_info = NULL;
309 int i;
310 u32 device_id;
311
312 if (bank->target->state != TARGET_HALTED)
313 {
314 LOG_ERROR("Target not halted");
315 return ERROR_TARGET_NOT_HALTED;
316 }
317
318 avrf_info->probed = 0;
319
320 avr_jtag_read_jtagid(avr, &device_id);
321 if (ERROR_OK != mcu_execute_queue())
322 {
323 return ERROR_FAIL;
324 }
325
326 LOG_INFO( "device id = 0x%08x", device_id );
327 if (EXTRACT_MFG(device_id) != 0x1F)
328 {
329 LOG_ERROR("0x%X is invalid Manufacturer for avr, 0x%X is expected", EXTRACT_MFG(device_id), 0x1F);
330 }
331
332 for (i = 0; i < (int)(sizeof(avft_chips_info) / sizeof(avft_chips_info[0])); i++)
333 {
334 if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id))
335 {
336 avr_info = &avft_chips_info[i];
337 LOG_INFO("target device is %s", avr_info->name);
338 break;
339 }
340 }
341
342 if (avr_info != NULL)
343 {
344 // chip found
345 bank->base = 0x00000000;
346 bank->size = (avr_info->flash_page_size * avr_info->flash_page_num);
347 bank->num_sectors = avr_info->flash_page_num;
348 bank->sectors = malloc(sizeof(flash_sector_t) * avr_info->flash_page_num);
349
350 for (i = 0; i < avr_info->flash_page_num; i++)
351 {
352 bank->sectors[i].offset = i * avr_info->flash_page_size;
353 bank->sectors[i].size = avr_info->flash_page_size;
354 bank->sectors[i].is_erased = -1;
355 bank->sectors[i].is_protected = 1;
356 }
357
358 avrf_info->probed = 1;
359 return ERROR_OK;
360 }
361 else
362 {
363 // chip not supported
364 LOG_ERROR("0x%X is not support for avr", EXTRACT_PART(device_id));
365
366 avrf_info->probed = 1;
367 return ERROR_FAIL;
368 }
369 }
370
371 static int avrf_auto_probe(struct flash_bank_s *bank)
372 {
373 avrf_flash_bank_t *avrf_info = bank->driver_priv;
374 if (avrf_info->probed)
375 return ERROR_OK;
376 return avrf_probe(bank);
377 }
378
379 static int avrf_protect_check(struct flash_bank_s *bank)
380 {
381 LOG_INFO("%s", __FUNCTION__);
382 return ERROR_OK;
383 }
384
385 static int avrf_info(struct flash_bank_s *bank, char *buf, int buf_size)
386 {
387 target_t *target = bank->target;
388 avr_common_t *avr = target->arch_info;
389 avrf_type_t *avr_info = NULL;
390 int i;
391 u32 device_id;
392
393 if (bank->target->state != TARGET_HALTED)
394 {
395 LOG_ERROR("Target not halted");
396 return ERROR_TARGET_NOT_HALTED;
397 }
398
399 avr_jtag_read_jtagid(avr, &device_id);
400 if (ERROR_OK != mcu_execute_queue())
401 {
402 return ERROR_FAIL;
403 }
404
405 LOG_INFO( "device id = 0x%08x", device_id );
406 if (EXTRACT_MFG(device_id) != 0x1F)
407 {
408 LOG_ERROR("0x%X is invalid Manufacturer for avr, 0x%X is expected", EXTRACT_MFG(device_id), 0x1F);
409 }
410
411 for (i = 0; i < (int)(sizeof(avft_chips_info) / sizeof(avft_chips_info[0])); i++)
412 {
413 if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id))
414 {
415 avr_info = &avft_chips_info[i];
416 LOG_INFO("target device is %s", avr_info->name);
417
418 break;
419 }
420 }
421
422 if (avr_info != NULL)
423 {
424 // chip found
425 snprintf(buf, buf_size, "%s - Rev: 0x%X", avr_info->name, EXTRACT_VER(device_id));
426 return ERROR_OK;
427 }
428 else
429 {
430 // chip not supported
431 snprintf(buf, buf_size, "Cannot identify target as a avr\n");
432 return ERROR_FLASH_OPERATION_FAILED;
433 }
434 }
435
436 static int avrf_mass_erase(struct flash_bank_s *bank)
437 {
438 target_t *target = bank->target;
439 avr_common_t *avr = target->arch_info;
440
441 if (target->state != TARGET_HALTED)
442 {
443 LOG_ERROR("Target not halted");
444 return ERROR_TARGET_NOT_HALTED;
445 }
446
447 if ((ERROR_OK != avr_jtagprg_enterprogmode(avr))
448 || (ERROR_OK != avr_jtagprg_chiperase(avr))
449 || (ERROR_OK != avr_jtagprg_leaveprogmode(avr)))
450 {
451 return ERROR_FAIL;
452 }
453
454 return ERROR_OK;
455 }
456
457 static int avrf_handle_mass_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
458 {
459 flash_bank_t *bank;
460 int i;
461
462 if (argc < 1)
463 {
464 command_print(cmd_ctx, "avr mass_erase <bank>");
465 return ERROR_OK;
466 }
467
468 bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
469 if (!bank)
470 {
471 command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
472 return ERROR_OK;
473 }
474
475 if (avrf_mass_erase(bank) == ERROR_OK)
476 {
477 /* set all sectors as erased */
478 for (i = 0; i < bank->num_sectors; i++)
479 {
480 bank->sectors[i].is_erased = 1;
481 }
482
483 command_print(cmd_ctx, "avr mass erase complete");
484 }
485 else
486 {
487 command_print(cmd_ctx, "avr mass erase failed");
488 }
489
490 LOG_DEBUG("%s", __FUNCTION__);
491 return ERROR_OK;
492 }
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