1 /***************************************************************************
2 * Copyright (C) 2007 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * Partially based on drivers/mtd/nand_ids.c from Linux. *
6 * Copyright (C) 2002 Thomas Gleixner <tglx@linutronix.de> *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
27 #include "replacements.h"
38 #include "time_support.h"
42 int nand_register_commands(struct command_context_s
*cmd_ctx
);
43 int handle_nand_list_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
44 int handle_nand_probe_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
45 int handle_nand_check_bad_blocks_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
46 int handle_nand_info_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
47 int handle_nand_copy_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
48 int handle_nand_write_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
49 int handle_nand_dump_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
50 int handle_nand_erase_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
52 int handle_nand_raw_access_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
54 int nand_read_page_raw(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
);
55 int nand_read_page(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
);
56 int nand_read_plain(struct nand_device_s
*device
, u32 address
, u8
*data
, u32 data_size
);
58 int nand_write_page_raw(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
);
59 int nand_write_page(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
);
61 /* NAND flash controller
63 extern nand_flash_controller_t lpc3180_nand_controller
;
64 extern nand_flash_controller_t s3c2410_nand_controller
;
65 extern nand_flash_controller_t s3c2412_nand_controller
;
66 extern nand_flash_controller_t s3c2440_nand_controller
;
67 extern nand_flash_controller_t s3c2443_nand_controller
;
69 /* extern nand_flash_controller_t boundary_scan_nand_controller; */
71 nand_flash_controller_t
*nand_flash_controllers
[] =
73 &lpc3180_nand_controller
,
74 &s3c2410_nand_controller
,
75 &s3c2412_nand_controller
,
76 &s3c2440_nand_controller
,
77 &s3c2443_nand_controller
,
78 /* &boundary_scan_nand_controller, */
82 /* configured NAND devices and NAND Flash command handler */
83 nand_device_t
*nand_devices
= NULL
;
84 static command_t
*nand_cmd
;
88 * Name, ID code, pagesize, chipsize in MegaByte, eraseblock size,
91 * Pagesize; 0, 256, 512
92 * 0 get this information from the extended chip ID
93 * 256 256 Byte page size
94 * 512 512 Byte page size
96 nand_info_t nand_flash_ids
[] =
98 {"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, 0},
99 {"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, 0},
100 {"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, 0},
101 {"NAND 1MiB 3,3V 8-bit", 0xe8, 256, 1, 0x1000, 0},
102 {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, 0},
103 {"NAND 2MiB 3,3V 8-bit", 0xea, 256, 2, 0x1000, 0},
104 {"NAND 4MiB 3,3V 8-bit", 0xd5, 512, 4, 0x2000, 0},
105 {"NAND 4MiB 3,3V 8-bit", 0xe3, 512, 4, 0x2000, 0},
106 {"NAND 4MiB 3,3V 8-bit", 0xe5, 512, 4, 0x2000, 0},
107 {"NAND 8MiB 3,3V 8-bit", 0xd6, 512, 8, 0x2000, 0},
109 {"NAND 8MiB 1,8V 8-bit", 0x39, 512, 8, 0x2000, 0},
110 {"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, 0},
111 {"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16
},
112 {"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16
},
114 {"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, 0},
115 {"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, 0},
116 {"NAND 16MiB 1,8V 16-bit", 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16
},
117 {"NAND 16MiB 3,3V 16-bit", 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16
},
119 {"NAND 32MiB 1,8V 8-bit", 0x35, 512, 32, 0x4000, 0},
120 {"NAND 32MiB 3,3V 8-bit", 0x75, 512, 32, 0x4000, 0},
121 {"NAND 32MiB 1,8V 16-bit", 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16
},
122 {"NAND 32MiB 3,3V 16-bit", 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16
},
124 {"NAND 64MiB 1,8V 8-bit", 0x36, 512, 64, 0x4000, 0},
125 {"NAND 64MiB 3,3V 8-bit", 0x76, 512, 64, 0x4000, 0},
126 {"NAND 64MiB 1,8V 16-bit", 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16
},
127 {"NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16
},
129 {"NAND 128MiB 1,8V 8-bit", 0x78, 512, 128, 0x4000, 0},
130 {"NAND 128MiB 1,8V 8-bit", 0x39, 512, 128, 0x4000, 0},
131 {"NAND 128MiB 3,3V 8-bit", 0x79, 512, 128, 0x4000, 0},
132 {"NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
133 {"NAND 128MiB 1,8V 16-bit", 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
134 {"NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
135 {"NAND 128MiB 3,3V 16-bit", 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
137 {"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, 0},
139 {"NAND 64MiB 1,8V 8-bit", 0xA2, 0, 64, 0, LP_OPTIONS
},
140 {"NAND 64MiB 3,3V 8-bit", 0xF2, 0, 64, 0, LP_OPTIONS
},
141 {"NAND 64MiB 1,8V 16-bit", 0xB2, 0, 64, 0, LP_OPTIONS16
},
142 {"NAND 64MiB 3,3V 16-bit", 0xC2, 0, 64, 0, LP_OPTIONS16
},
144 {"NAND 128MiB 1,8V 8-bit", 0xA1, 0, 128, 0, LP_OPTIONS
},
145 {"NAND 128MiB 3,3V 8-bit", 0xF1, 0, 128, 0, LP_OPTIONS
},
146 {"NAND 128MiB 1,8V 16-bit", 0xB1, 0, 128, 0, LP_OPTIONS16
},
147 {"NAND 128MiB 3,3V 16-bit", 0xC1, 0, 128, 0, LP_OPTIONS16
},
149 {"NAND 256MiB 1,8V 8-bit", 0xAA, 0, 256, 0, LP_OPTIONS
},
150 {"NAND 256MiB 3,3V 8-bit", 0xDA, 0, 256, 0, LP_OPTIONS
},
151 {"NAND 256MiB 1,8V 16-bit", 0xBA, 0, 256, 0, LP_OPTIONS16
},
152 {"NAND 256MiB 3,3V 16-bit", 0xCA, 0, 256, 0, LP_OPTIONS16
},
154 {"NAND 512MiB 1,8V 8-bit", 0xAC, 0, 512, 0, LP_OPTIONS
},
155 {"NAND 512MiB 3,3V 8-bit", 0xDC, 0, 512, 0, LP_OPTIONS
},
156 {"NAND 512MiB 1,8V 16-bit", 0xBC, 0, 512, 0, LP_OPTIONS16
},
157 {"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, LP_OPTIONS16
},
159 {"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0, LP_OPTIONS
},
160 {"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0, LP_OPTIONS
},
161 {"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, LP_OPTIONS16
},
162 {"NAND 1GiB 3,3V 16-bit", 0xC3, 0, 1024, 0, LP_OPTIONS16
},
164 {"NAND 2GiB 1,8V 8-bit", 0xA5, 0, 2048, 0, LP_OPTIONS
},
165 {"NAND 2GiB 3,3V 8-bit", 0xD5, 0, 2048, 0, LP_OPTIONS
},
166 {"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, LP_OPTIONS16
},
167 {"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16
},
172 /* Manufacturer ID list
174 nand_manufacturer_t nand_manuf_ids
[] =
177 {NAND_MFR_TOSHIBA
, "Toshiba"},
178 {NAND_MFR_SAMSUNG
, "Samsung"},
179 {NAND_MFR_FUJITSU
, "Fujitsu"},
180 {NAND_MFR_NATIONAL
, "National"},
181 {NAND_MFR_RENESAS
, "Renesas"},
182 {NAND_MFR_STMICRO
, "ST Micro"},
183 {NAND_MFR_HYNIX
, "Hynix"},
187 /* nand device <nand_controller> [controller options]
189 int handle_nand_device_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
196 LOG_WARNING("incomplete flash device nand configuration");
197 return ERROR_FLASH_BANK_INVALID
;
200 for (i
= 0; nand_flash_controllers
[i
]; i
++)
202 nand_device_t
*p
, *c
;
204 if (strcmp(args
[0], nand_flash_controllers
[i
]->name
) == 0)
206 /* register flash specific commands */
207 if ((retval
= nand_flash_controllers
[i
]->register_commands(cmd_ctx
)) != ERROR_OK
)
209 LOG_ERROR("couldn't register '%s' commands", args
[0]);
213 c
= malloc(sizeof(nand_device_t
));
215 c
->controller
= nand_flash_controllers
[i
];
216 c
->controller_priv
= NULL
;
217 c
->manufacturer
= NULL
;
220 c
->address_cycles
= 0;
225 if ((retval
= nand_flash_controllers
[i
]->nand_device_command(cmd_ctx
, cmd
, args
, argc
, c
)) != ERROR_OK
)
227 LOG_ERROR("'%s' driver rejected nand flash", c
->controller
->name
);
232 /* put NAND device in linked list */
235 /* find last flash device */
236 for (p
= nand_devices
; p
&& p
->next
; p
= p
->next
);
249 /* no valid NAND controller was found (i.e. the configuration option,
250 * didn't match one of the compiled-in controllers)
252 LOG_ERROR("No valid NAND flash controller found (%s)", args
[0]);
253 LOG_ERROR("compiled-in NAND flash controllers:");
254 for (i
= 0; nand_flash_controllers
[i
]; i
++)
256 LOG_ERROR("%i: %s", i
, nand_flash_controllers
[i
]->name
);
262 int nand_register_commands(struct command_context_s
*cmd_ctx
)
264 nand_cmd
= register_command(cmd_ctx
, NULL
, "nand", NULL
, COMMAND_ANY
, "NAND specific commands");
266 register_command(cmd_ctx
, nand_cmd
, "device", handle_nand_device_command
, COMMAND_CONFIG
, NULL
);
271 int nand_init(struct command_context_s
*cmd_ctx
)
275 register_command(cmd_ctx
, nand_cmd
, "list", handle_nand_list_command
, COMMAND_EXEC
,
276 "list configured NAND flash devices");
277 register_command(cmd_ctx
, nand_cmd
, "info", handle_nand_info_command
, COMMAND_EXEC
,
278 "print info about NAND flash device <num>");
279 register_command(cmd_ctx
, nand_cmd
, "probe", handle_nand_probe_command
, COMMAND_EXEC
,
280 "identify NAND flash device <num>");
281 register_command(cmd_ctx
, nand_cmd
, "check_bad_blocks", handle_nand_check_bad_blocks_command
, COMMAND_EXEC
,
282 "check NAND flash device <num> for bad blocks [<first> <last>]");
283 register_command(cmd_ctx
, nand_cmd
, "erase", handle_nand_erase_command
, COMMAND_EXEC
,
284 "erase blocks on NAND flash device <num> <first> <last>");
285 register_command(cmd_ctx
, nand_cmd
, "copy", handle_nand_copy_command
, COMMAND_EXEC
,
286 "copy from NAND flash device <num> <offset> <length> <ram-address>");
287 register_command(cmd_ctx
, nand_cmd
, "dump", handle_nand_dump_command
, COMMAND_EXEC
,
288 "dump from NAND flash device <num> <filename> <offset> <size> [options]");
289 register_command(cmd_ctx
, nand_cmd
, "write", handle_nand_write_command
, COMMAND_EXEC
,
290 "write to NAND flash device <num> <filename> <offset> [oob_raw|oob_only]");
291 register_command(cmd_ctx
, nand_cmd
, "raw_access", handle_nand_raw_access_command
, COMMAND_EXEC
,
292 "raw access to NAND flash device <num> ['enable'|'disable']");
298 nand_device_t
*get_nand_device_by_num(int num
)
303 for (p
= nand_devices
; p
; p
= p
->next
)
314 int nand_build_bbt(struct nand_device_s
*device
, int first
, int last
)
322 if ((first
< 0) || (first
>= device
->num_blocks
))
325 if ((last
>= device
->num_blocks
) || (last
== -1))
326 last
= device
->num_blocks
- 1;
328 for (i
= first
; i
< last
; i
++)
330 nand_read_page(device
, page
, NULL
, 0, oob
, 6);
332 if (((device
->device
->options
& NAND_BUSWIDTH_16
) && ((oob
[0] & oob
[1]) != 0xff))
333 || (((device
->page_size
== 512) && (oob
[5] != 0xff)) ||
334 ((device
->page_size
== 2048) && (oob
[0] != 0xff))))
336 LOG_WARNING("invalid block: %i", i
);
337 device
->blocks
[i
].is_bad
= 1;
341 device
->blocks
[i
].is_bad
= 0;
344 page
+= (device
->erase_size
/ device
->page_size
);
350 int nand_read_status(struct nand_device_s
*device
, u8
*status
)
353 return ERROR_NAND_DEVICE_NOT_PROBED
;
355 /* Send read status command */
356 device
->controller
->command(device
, NAND_CMD_STATUS
);
361 if (device
->device
->options
& NAND_BUSWIDTH_16
)
364 device
->controller
->read_data(device
, &data
);
365 *status
= data
& 0xff;
369 device
->controller
->read_data(device
, status
);
375 int nand_probe(struct nand_device_s
*device
)
377 u8 manufacturer_id
, device_id
;
382 /* clear device data */
383 device
->device
= NULL
;
384 device
->manufacturer
= NULL
;
386 /* clear device parameters */
387 device
->bus_width
= 0;
388 device
->address_cycles
= 0;
389 device
->page_size
= 0;
390 device
->erase_size
= 0;
392 /* initialize controller (device parameters are zero, use controller default) */
393 if ((retval
= device
->controller
->init(device
) != ERROR_OK
))
397 case ERROR_NAND_OPERATION_FAILED
:
398 LOG_DEBUG("controller initialization failed");
399 return ERROR_NAND_OPERATION_FAILED
;
400 case ERROR_NAND_OPERATION_NOT_SUPPORTED
:
401 LOG_ERROR("BUG: controller reported that it doesn't support default parameters");
402 return ERROR_NAND_OPERATION_FAILED
;
404 LOG_ERROR("BUG: unknown controller initialization failure");
405 return ERROR_NAND_OPERATION_FAILED
;
409 device
->controller
->command(device
, NAND_CMD_RESET
);
410 device
->controller
->reset(device
);
412 device
->controller
->command(device
, NAND_CMD_READID
);
413 device
->controller
->address(device
, 0x0);
415 if (device
->bus_width
== 8)
417 device
->controller
->read_data(device
, &manufacturer_id
);
418 device
->controller
->read_data(device
, &device_id
);
423 device
->controller
->read_data(device
, &data_buf
);
424 manufacturer_id
= data_buf
& 0xff;
425 device
->controller
->read_data(device
, &data_buf
);
426 device_id
= data_buf
& 0xff;
429 for (i
= 0; nand_flash_ids
[i
].name
; i
++)
431 if (nand_flash_ids
[i
].id
== device_id
)
433 device
->device
= &nand_flash_ids
[i
];
438 for (i
= 0; nand_manuf_ids
[i
].name
; i
++)
440 if (nand_manuf_ids
[i
].id
== manufacturer_id
)
442 device
->manufacturer
= &nand_manuf_ids
[i
];
447 if (!device
->manufacturer
)
449 device
->manufacturer
= &nand_manuf_ids
[0];
450 device
->manufacturer
->id
= manufacturer_id
;
455 LOG_ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
456 manufacturer_id
, device_id
);
457 return ERROR_NAND_OPERATION_FAILED
;
460 LOG_DEBUG("found %s (%s)", device
->device
->name
, device
->manufacturer
->name
);
462 /* initialize device parameters */
465 if (device
->device
->options
& NAND_BUSWIDTH_16
)
466 device
->bus_width
= 16;
468 device
->bus_width
= 8;
470 /* Do we need extended device probe information? */
471 if (device
->device
->page_size
== 0 ||
472 device
->device
->erase_size
== 0)
474 if (device
->bus_width
== 8)
476 device
->controller
->read_data(device
, id_buff
+3);
477 device
->controller
->read_data(device
, id_buff
+4);
478 device
->controller
->read_data(device
, id_buff
+5);
484 device
->controller
->read_data(device
, &data_buf
);
485 id_buff
[3] = data_buf
;
487 device
->controller
->read_data(device
, &data_buf
);
488 id_buff
[4] = data_buf
;
490 device
->controller
->read_data(device
, &data_buf
);
491 id_buff
[5] = data_buf
>> 8;
496 if (device
->device
->page_size
== 0)
498 device
->page_size
= 1 << (10 + (id_buff
[4] & 3));
500 else if (device
->device
->page_size
== 256)
502 LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
503 return ERROR_NAND_OPERATION_FAILED
;
507 device
->page_size
= device
->device
->page_size
;
510 /* number of address cycles */
511 if (device
->page_size
<= 512)
513 /* small page devices */
514 if (device
->device
->chip_size
<= 32)
515 device
->address_cycles
= 3;
516 else if (device
->device
->chip_size
<= 8*1024)
517 device
->address_cycles
= 4;
520 LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
521 device
->address_cycles
= 5;
526 /* large page devices */
527 if (device
->device
->chip_size
<= 128)
528 device
->address_cycles
= 4;
529 else if (device
->device
->chip_size
<= 32*1024)
530 device
->address_cycles
= 5;
533 LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
534 device
->address_cycles
= 6;
539 if (device
->device
->erase_size
== 0)
541 switch ((id_buff
[4] >> 4) & 3) {
543 device
->erase_size
= 64 << 10;
546 device
->erase_size
= 128 << 10;
549 device
->erase_size
= 256 << 10;
552 device
->erase_size
=512 << 10;
558 device
->erase_size
= device
->device
->erase_size
;
561 /* initialize controller, but leave parameters at the controllers default */
562 if ((retval
= device
->controller
->init(device
) != ERROR_OK
))
566 case ERROR_NAND_OPERATION_FAILED
:
567 LOG_DEBUG("controller initialization failed");
568 return ERROR_NAND_OPERATION_FAILED
;
569 case ERROR_NAND_OPERATION_NOT_SUPPORTED
:
570 LOG_ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
571 device
->bus_width
, device
->address_cycles
, device
->page_size
);
572 return ERROR_NAND_OPERATION_FAILED
;
574 LOG_ERROR("BUG: unknown controller initialization failure");
575 return ERROR_NAND_OPERATION_FAILED
;
579 device
->num_blocks
= (device
->device
->chip_size
* 1024) / (device
->erase_size
/ 1024);
580 device
->blocks
= malloc(sizeof(nand_block_t
) * device
->num_blocks
);
582 for (i
= 0; i
< device
->num_blocks
; i
++)
584 device
->blocks
[i
].size
= device
->erase_size
;
585 device
->blocks
[i
].offset
= i
* device
->erase_size
;
586 device
->blocks
[i
].is_erased
= -1;
587 device
->blocks
[i
].is_bad
= -1;
593 int nand_erase(struct nand_device_s
*device
, int first_block
, int last_block
)
601 return ERROR_NAND_DEVICE_NOT_PROBED
;
603 if ((first_block
< 0) || (last_block
> device
->num_blocks
))
604 return ERROR_INVALID_ARGUMENTS
;
606 /* make sure we know if a block is bad before erasing it */
607 for (i
= first_block
; i
<= last_block
; i
++)
609 if (device
->blocks
[i
].is_bad
== -1)
611 nand_build_bbt(device
, i
, last_block
);
616 for (i
= first_block
; i
<= last_block
; i
++)
618 /* Send erase setup command */
619 device
->controller
->command(device
, NAND_CMD_ERASE1
);
621 page
= i
* (device
->erase_size
/ device
->page_size
);
623 /* Send page address */
624 if (device
->page_size
<= 512)
627 device
->controller
->address(device
, page
& 0xff);
628 device
->controller
->address(device
, (page
>> 8) & 0xff);
630 /* 3rd cycle only on devices with more than 32 MiB */
631 if (device
->address_cycles
>= 4)
632 device
->controller
->address(device
, (page
>> 16) & 0xff);
634 /* 4th cycle only on devices with more than 8 GiB */
635 if (device
->address_cycles
>= 5)
636 device
->controller
->address(device
, (page
>> 24) & 0xff);
641 device
->controller
->address(device
, page
& 0xff);
642 device
->controller
->address(device
, (page
>> 8) & 0xff);
644 /* 3rd cycle only on devices with more than 128 MiB */
645 if (device
->address_cycles
>= 5)
646 device
->controller
->address(device
, (page
>> 16) & 0xff);
649 /* Send erase confirm command */
650 device
->controller
->command(device
, NAND_CMD_ERASE2
);
652 if (!device
->controller
->nand_ready(device
, 1000))
654 LOG_ERROR("timeout waiting for NAND flash block erase to complete");
655 return ERROR_NAND_OPERATION_TIMEOUT
;
658 if ((retval
= nand_read_status(device
, &status
)) != ERROR_OK
)
660 LOG_ERROR("couldn't read status");
661 return ERROR_NAND_OPERATION_FAILED
;
666 LOG_ERROR("erase operation didn't pass, status: 0x%2.2x", status
);
667 return ERROR_NAND_OPERATION_FAILED
;
674 int nand_read_plain(struct nand_device_s
*device
, u32 address
, u8
*data
, u32 data_size
)
679 return ERROR_NAND_DEVICE_NOT_PROBED
;
681 if (address
% device
->page_size
)
683 LOG_ERROR("reads need to be page aligned");
684 return ERROR_NAND_OPERATION_FAILED
;
687 page
= malloc(device
->page_size
);
689 while (data_size
> 0 )
691 u32 thisrun_size
= (data_size
> device
->page_size
) ? device
->page_size
: data_size
;
695 page_address
= address
/ device
->page_size
;
697 nand_read_page(device
, page_address
, page
, device
->page_size
, NULL
, 0);
699 memcpy(data
, page
, thisrun_size
);
701 address
+= thisrun_size
;
702 data
+= thisrun_size
;
703 data_size
-= thisrun_size
;
711 int nand_write_plain(struct nand_device_s
*device
, u32 address
, u8
*data
, u32 data_size
)
716 return ERROR_NAND_DEVICE_NOT_PROBED
;
718 if (address
% device
->page_size
)
720 LOG_ERROR("writes need to be page aligned");
721 return ERROR_NAND_OPERATION_FAILED
;
724 page
= malloc(device
->page_size
);
726 while (data_size
> 0 )
728 u32 thisrun_size
= (data_size
> device
->page_size
) ? device
->page_size
: data_size
;
731 memset(page
, 0xff, device
->page_size
);
732 memcpy(page
, data
, thisrun_size
);
734 page_address
= address
/ device
->page_size
;
736 nand_write_page(device
, page_address
, page
, device
->page_size
, NULL
, 0);
738 address
+= thisrun_size
;
739 data
+= thisrun_size
;
740 data_size
-= thisrun_size
;
748 int nand_write_page(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
)
751 return ERROR_NAND_DEVICE_NOT_PROBED
;
753 if (device
->use_raw
|| device
->controller
->write_page
== NULL
)
754 return nand_write_page_raw(device
, page
, data
, data_size
, oob
, oob_size
);
756 return device
->controller
->write_page(device
, page
, data
, data_size
, oob
, oob_size
);
759 int nand_read_page(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
)
762 return ERROR_NAND_DEVICE_NOT_PROBED
;
764 if (device
->use_raw
|| device
->controller
->read_page
== NULL
)
765 return nand_read_page_raw(device
, page
, data
, data_size
, oob
, oob_size
);
767 return device
->controller
->read_page(device
, page
, data
, data_size
, oob
, oob_size
);
770 int nand_read_page_raw(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
)
775 return ERROR_NAND_DEVICE_NOT_PROBED
;
777 if (device
->page_size
<= 512)
779 /* small page device */
781 device
->controller
->command(device
, NAND_CMD_READ0
);
783 device
->controller
->command(device
, NAND_CMD_READOOB
);
785 /* column (always 0, we start at the beginning of a page/OOB area) */
786 device
->controller
->address(device
, 0x0);
789 device
->controller
->address(device
, page
& 0xff);
790 device
->controller
->address(device
, (page
>> 8) & 0xff);
792 /* 4th cycle only on devices with more than 32 MiB */
793 if (device
->address_cycles
>= 4)
794 device
->controller
->address(device
, (page
>> 16) & 0xff);
796 /* 5th cycle only on devices with more than 8 GiB */
797 if (device
->address_cycles
>= 5)
798 device
->controller
->address(device
, (page
>> 24) & 0xff);
802 /* large page device */
803 device
->controller
->command(device
, NAND_CMD_READ0
);
805 /* column (0 when we start at the beginning of a page,
806 * or 2048 for the beginning of OOB area)
808 device
->controller
->address(device
, 0x0);
810 device
->controller
->address(device
, 0x0);
812 device
->controller
->address(device
, 0x8);
815 device
->controller
->address(device
, page
& 0xff);
816 device
->controller
->address(device
, (page
>> 8) & 0xff);
818 /* 5th cycle only on devices with more than 128 MiB */
819 if (device
->address_cycles
>= 5)
820 device
->controller
->address(device
, (page
>> 16) & 0xff);
822 /* large page devices need a start command */
823 device
->controller
->command(device
, NAND_CMD_READSTART
);
826 if (!device
->controller
->nand_ready(device
, 100))
827 return ERROR_NAND_OPERATION_TIMEOUT
;
831 if (device
->controller
->read_block_data
!= NULL
)
832 (device
->controller
->read_block_data
)(device
, data
, data_size
);
835 for (i
= 0; i
< data_size
;)
837 if (device
->device
->options
& NAND_BUSWIDTH_16
)
839 device
->controller
->read_data(device
, data
);
845 device
->controller
->read_data(device
, data
);
855 if (device
->controller
->read_block_data
!= NULL
)
856 (device
->controller
->read_block_data
)(device
, oob
, oob_size
);
859 for (i
= 0; i
< oob_size
;)
861 if (device
->device
->options
& NAND_BUSWIDTH_16
)
863 device
->controller
->read_data(device
, oob
);
869 device
->controller
->read_data(device
, oob
);
880 int nand_write_page_raw(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
)
887 return ERROR_NAND_DEVICE_NOT_PROBED
;
889 device
->controller
->command(device
, NAND_CMD_SEQIN
);
891 if (device
->page_size
<= 512)
893 /* column (always 0, we start at the beginning of a page/OOB area) */
894 device
->controller
->address(device
, 0x0);
897 device
->controller
->address(device
, page
& 0xff);
898 device
->controller
->address(device
, (page
>> 8) & 0xff);
900 /* 4th cycle only on devices with more than 32 MiB */
901 if (device
->address_cycles
>= 4)
902 device
->controller
->address(device
, (page
>> 16) & 0xff);
904 /* 5th cycle only on devices with more than 8 GiB */
905 if (device
->address_cycles
>= 5)
906 device
->controller
->address(device
, (page
>> 24) & 0xff);
910 /* column (0 when we start at the beginning of a page,
911 * or 2048 for the beginning of OOB area)
913 device
->controller
->address(device
, 0x0);
915 device
->controller
->address(device
, 0x0);
917 device
->controller
->address(device
, 0x8);
920 device
->controller
->address(device
, page
& 0xff);
921 device
->controller
->address(device
, (page
>> 8) & 0xff);
923 /* 5th cycle only on devices with more than 128 MiB */
924 if (device
->address_cycles
>= 5)
925 device
->controller
->address(device
, (page
>> 16) & 0xff);
930 if (device
->controller
->write_block_data
!= NULL
)
931 (device
->controller
->write_block_data
)(device
, data
, data_size
);
934 for (i
= 0; i
< data_size
;)
936 if (device
->device
->options
& NAND_BUSWIDTH_16
)
938 u16 data_buf
= le_to_h_u16(data
);
939 device
->controller
->write_data(device
, data_buf
);
945 device
->controller
->write_data(device
, *data
);
955 if (device
->controller
->write_block_data
!= NULL
)
956 (device
->controller
->write_block_data
)(device
, oob
, oob_size
);
959 for (i
= 0; i
< oob_size
;)
961 if (device
->device
->options
& NAND_BUSWIDTH_16
)
963 u16 oob_buf
= le_to_h_u16(data
);
964 device
->controller
->write_data(device
, oob_buf
);
970 device
->controller
->write_data(device
, *oob
);
978 device
->controller
->command(device
, NAND_CMD_PAGEPROG
);
980 if (!device
->controller
->nand_ready(device
, 100))
981 return ERROR_NAND_OPERATION_TIMEOUT
;
983 if ((retval
= nand_read_status(device
, &status
)) != ERROR_OK
)
985 LOG_ERROR("couldn't read status");
986 return ERROR_NAND_OPERATION_FAILED
;
989 if (status
& NAND_STATUS_FAIL
)
991 LOG_ERROR("write operation didn't pass, status: 0x%2.2x", status
);
992 return ERROR_NAND_OPERATION_FAILED
;
998 int handle_nand_list_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1005 command_print(cmd_ctx
, "no NAND flash devices configured");
1009 for (p
= nand_devices
; p
; p
= p
->next
)
1012 command_print(cmd_ctx
, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
1013 i
++, p
->device
->name
, p
->manufacturer
->name
, p
->page_size
, p
->bus_width
, p
->erase_size
);
1015 command_print(cmd_ctx
, "#%i: not probed");
1021 int handle_nand_info_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1029 if ((argc
< 1) || (argc
> 3))
1031 return ERROR_COMMAND_SYNTAX_ERROR
;
1037 first
= last
= strtoul(args
[1], NULL
, 0);
1041 first
= strtoul(args
[1], NULL
, 0);
1042 last
= strtoul(args
[2], NULL
, 0);
1045 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1050 if (first
>= p
->num_blocks
)
1051 first
= p
->num_blocks
- 1;
1053 if (last
>= p
->num_blocks
)
1054 last
= p
->num_blocks
- 1;
1056 command_print(cmd_ctx
, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
1057 i
++, p
->device
->name
, p
->manufacturer
->name
, p
->page_size
, p
->bus_width
, p
->erase_size
);
1059 for (j
= first
; j
<= last
; j
++)
1061 char *erase_state
, *bad_state
;
1063 if (p
->blocks
[j
].is_erased
== 0)
1064 erase_state
= "not erased";
1065 else if (p
->blocks
[j
].is_erased
== 1)
1066 erase_state
= "erased";
1068 erase_state
= "erase state unknown";
1070 if (p
->blocks
[j
].is_bad
== 0)
1072 else if (p
->blocks
[j
].is_bad
== 1)
1073 bad_state
= " (marked bad)";
1075 bad_state
= " (block condition unknown)";
1077 command_print(cmd_ctx
, "\t#%i: 0x%8.8x (0x%xkB) %s%s",
1078 j
, p
->blocks
[j
].offset
, p
->blocks
[j
].size
/ 1024,
1079 erase_state
, bad_state
);
1084 command_print(cmd_ctx
, "#%i: not probed");
1091 int handle_nand_probe_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1098 return ERROR_COMMAND_SYNTAX_ERROR
;
1101 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1104 if ((retval
= nand_probe(p
)) == ERROR_OK
)
1106 command_print(cmd_ctx
, "NAND flash device '%s' found", p
->device
->name
);
1108 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1110 command_print(cmd_ctx
, "probing failed for NAND flash device");
1114 command_print(cmd_ctx
, "unknown error when probing NAND flash device");
1119 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1125 int handle_nand_erase_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1132 return ERROR_COMMAND_SYNTAX_ERROR
;
1136 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1139 int first
= strtoul(args
[1], NULL
, 0);
1140 int last
= strtoul(args
[2], NULL
, 0);
1142 if ((retval
= nand_erase(p
, first
, last
)) == ERROR_OK
)
1144 command_print(cmd_ctx
, "successfully erased blocks %i to %i on NAND flash device '%s'", first
, last
, p
->device
->name
);
1146 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1148 command_print(cmd_ctx
, "erase failed");
1152 command_print(cmd_ctx
, "unknown error when erasing NAND flash device");
1157 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1163 int handle_nand_check_bad_blocks_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1170 if ((argc
< 1) || (argc
> 3) || (argc
== 2))
1172 return ERROR_COMMAND_SYNTAX_ERROR
;
1178 first
= strtoul(args
[1], NULL
, 0);
1179 last
= strtoul(args
[2], NULL
, 0);
1182 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1185 if ((retval
= nand_build_bbt(p
, first
, last
)) == ERROR_OK
)
1187 command_print(cmd_ctx
, "checked NAND flash device for bad blocks, use \"nand info\" command to list blocks", p
->device
->name
);
1189 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1191 command_print(cmd_ctx
, "error when checking for bad blocks on NAND flash device");
1195 command_print(cmd_ctx
, "unknown error when checking for bad blocks on NAND flash device");
1200 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1206 int handle_nand_copy_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1212 return ERROR_COMMAND_SYNTAX_ERROR
;
1216 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1223 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1229 int handle_nand_write_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1234 enum oob_formats oob_format
= NAND_OOB_NONE
;
1238 duration_t duration
;
1239 char *duration_text
;
1245 return ERROR_COMMAND_SYNTAX_ERROR
;
1249 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1257 offset
= strtoul(args
[2], NULL
, 0);
1262 for (i
= 3; i
< argc
; i
++)
1264 if (!strcmp(args
[i
], "oob_raw"))
1265 oob_format
|= NAND_OOB_RAW
;
1266 else if (!strcmp(args
[i
], "oob_only"))
1267 oob_format
|= NAND_OOB_RAW
| NAND_OOB_ONLY
;
1270 command_print(cmd_ctx
, "unknown option: %s", args
[i
]);
1271 return ERROR_COMMAND_SYNTAX_ERROR
;
1276 duration_start_measure(&duration
);
1278 if (fileio_open(&fileio
, args
[1], FILEIO_READ
, FILEIO_BINARY
) != ERROR_OK
)
1283 buf_cnt
= binary_size
= fileio
.size
;
1285 if (!(oob_format
& NAND_OOB_ONLY
))
1287 page_size
= p
->page_size
;
1288 page
= malloc(p
->page_size
);
1291 if (oob_format
& NAND_OOB_RAW
)
1293 if (p
->page_size
== 512)
1295 else if (p
->page_size
== 2048)
1297 oob
= malloc(oob_size
);
1300 if (offset
% p
->page_size
)
1302 command_print(cmd_ctx
, "only page size aligned offsets and sizes are supported");
1303 fileio_close(&fileio
);
1315 fileio_read(&fileio
, page_size
, page
, &size_read
);
1316 buf_cnt
-= size_read
;
1317 if (size_read
< page_size
)
1319 memset(page
+ size_read
, 0xff, page_size
- size_read
);
1325 fileio_read(&fileio
, oob_size
, oob
, &size_read
);
1326 buf_cnt
-= size_read
;
1327 if (size_read
< oob_size
)
1329 memset(oob
+ size_read
, 0xff, oob_size
- size_read
);
1333 if (nand_write_page(p
, offset
/ p
->page_size
, page
, page_size
, oob
, oob_size
) != ERROR_OK
)
1335 command_print(cmd_ctx
, "failed writing file %s to NAND flash %s at offset 0x%8.8x",
1336 args
[1], args
[0], offset
);
1338 fileio_close(&fileio
);
1344 offset
+= page_size
;
1347 fileio_close(&fileio
);
1352 duration_stop_measure(&duration
, &duration_text
);
1353 command_print(cmd_ctx
, "wrote file %s to NAND flash %s up to offset 0x%8.8x in %s",
1354 args
[1], args
[0], offset
, duration_text
);
1355 free(duration_text
);
1356 duration_text
= NULL
;
1360 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1366 int handle_nand_dump_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1372 return ERROR_COMMAND_SYNTAX_ERROR
;
1375 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1381 duration_t duration
;
1382 char *duration_text
;
1389 u32 address
= strtoul(args
[2], NULL
, 0);
1390 u32 size
= strtoul(args
[3], NULL
, 0);
1392 enum oob_formats oob_format
= NAND_OOB_NONE
;
1397 for (i
= 4; i
< argc
; i
++)
1399 if (!strcmp(args
[i
], "oob_raw"))
1400 oob_format
|= NAND_OOB_RAW
;
1401 else if (!strcmp(args
[i
], "oob_only"))
1402 oob_format
|= NAND_OOB_RAW
| NAND_OOB_ONLY
;
1404 command_print(cmd_ctx
, "unknown option: '%s'", args
[i
]);
1408 if ((address
% p
->page_size
) || (size
% p
->page_size
))
1410 command_print(cmd_ctx
, "only page size aligned addresses and sizes are supported");
1414 if (!(oob_format
& NAND_OOB_ONLY
))
1416 page_size
= p
->page_size
;
1417 page
= malloc(p
->page_size
);
1420 if (oob_format
& NAND_OOB_RAW
)
1422 if (p
->page_size
== 512)
1424 else if (p
->page_size
== 2048)
1426 oob
= malloc(oob_size
);
1429 if (fileio_open(&fileio
, args
[1], FILEIO_WRITE
, FILEIO_BINARY
) != ERROR_OK
)
1434 duration_start_measure(&duration
);
1439 if ((retval
= nand_read_page(p
, address
/ p
->page_size
, page
, page_size
, oob
, oob_size
)) != ERROR_OK
)
1441 command_print(cmd_ctx
, "reading NAND flash page failed");
1444 fileio_close(&fileio
);
1450 fileio_write(&fileio
, page_size
, page
, &size_written
);
1451 bytes_done
+= page_size
;
1456 fileio_write(&fileio
, oob_size
, oob
, &size_written
);
1457 bytes_done
+= oob_size
;
1460 size
-= p
->page_size
;
1461 address
+= p
->page_size
;
1468 fileio_close(&fileio
);
1470 duration_stop_measure(&duration
, &duration_text
);
1471 command_print(cmd_ctx
, "dumped %"PRIi64
" byte in %s", fileio
.size
, duration_text
);
1472 free(duration_text
);
1473 duration_text
= NULL
;
1477 command_print(cmd_ctx
, "#%i: not probed");
1482 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1488 int handle_nand_raw_access_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1492 if ((argc
< 1) || (argc
> 2))
1494 return ERROR_COMMAND_SYNTAX_ERROR
;
1497 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1504 if (strcmp("enable", args
[1]) == 0)
1508 else if (strcmp("disable", args
[1]) == 0)
1514 return ERROR_COMMAND_SYNTAX_ERROR
;
1518 command_print(cmd_ctx
, "raw access is %s", (p
->use_raw
) ? "enabled" : "disabled");
1522 command_print(cmd_ctx
, "#%i: not probed");
1527 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
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