1 /***************************************************************************
2 * Copyright (C) 2007 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * Partially based on drivers/mtd/nand_ids.c from Linux. *
6 * Copyright (C) 2002 Thomas Gleixner <tglx@linutronix.de> *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
28 #include "time_support.h"
34 static int handle_nand_list_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
35 static int handle_nand_probe_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
36 static int handle_nand_check_bad_blocks_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
37 static int handle_nand_info_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
38 static int handle_nand_write_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
39 static int handle_nand_dump_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
40 static int handle_nand_erase_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
42 static int handle_nand_raw_access_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
44 static int nand_read_page(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
);
45 //static int nand_read_plain(struct nand_device_s *device, u32 address, u8 *data, u32 data_size);
47 static int nand_write_page(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
);
49 /* NAND flash controller
51 extern nand_flash_controller_t lpc3180_nand_controller
;
52 extern nand_flash_controller_t orion_nand_controller
;
53 extern nand_flash_controller_t s3c2410_nand_controller
;
54 extern nand_flash_controller_t s3c2412_nand_controller
;
55 extern nand_flash_controller_t s3c2440_nand_controller
;
56 extern nand_flash_controller_t s3c2443_nand_controller
;
58 /* extern nand_flash_controller_t boundary_scan_nand_controller; */
60 static nand_flash_controller_t
*nand_flash_controllers
[] =
62 &lpc3180_nand_controller
,
63 &orion_nand_controller
,
64 &s3c2410_nand_controller
,
65 &s3c2412_nand_controller
,
66 &s3c2440_nand_controller
,
67 &s3c2443_nand_controller
,
68 /* &boundary_scan_nand_controller, */
72 /* configured NAND devices and NAND Flash command handler */
73 static nand_device_t
*nand_devices
= NULL
;
74 static command_t
*nand_cmd
;
78 * Name, ID code, pagesize, chipsize in MegaByte, eraseblock size,
81 * Pagesize; 0, 256, 512
82 * 0 get this information from the extended chip ID
83 * 256 256 Byte page size
84 * 512 512 Byte page size
86 static nand_info_t nand_flash_ids
[] =
88 /* start "museum" IDs */
89 {"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, 0},
90 {"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, 0},
91 {"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, 0},
92 {"NAND 1MiB 3,3V 8-bit", 0xe8, 256, 1, 0x1000, 0},
93 {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, 0},
94 {"NAND 2MiB 3,3V 8-bit", 0xea, 256, 2, 0x1000, 0},
95 {"NAND 4MiB 3,3V 8-bit", 0xd5, 512, 4, 0x2000, 0},
96 {"NAND 4MiB 3,3V 8-bit", 0xe3, 512, 4, 0x2000, 0},
97 {"NAND 4MiB 3,3V 8-bit", 0xe5, 512, 4, 0x2000, 0},
98 {"NAND 8MiB 3,3V 8-bit", 0xd6, 512, 8, 0x2000, 0},
100 {"NAND 8MiB 1,8V 8-bit", 0x39, 512, 8, 0x2000, 0},
101 {"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, 0},
102 {"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16
},
103 {"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16
},
104 /* end "museum" IDs */
106 {"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, 0},
107 {"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, 0},
108 {"NAND 16MiB 1,8V 16-bit", 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16
},
109 {"NAND 16MiB 3,3V 16-bit", 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16
},
111 {"NAND 32MiB 1,8V 8-bit", 0x35, 512, 32, 0x4000, 0},
112 {"NAND 32MiB 3,3V 8-bit", 0x75, 512, 32, 0x4000, 0},
113 {"NAND 32MiB 1,8V 16-bit", 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16
},
114 {"NAND 32MiB 3,3V 16-bit", 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16
},
116 {"NAND 64MiB 1,8V 8-bit", 0x36, 512, 64, 0x4000, 0},
117 {"NAND 64MiB 3,3V 8-bit", 0x76, 512, 64, 0x4000, 0},
118 {"NAND 64MiB 1,8V 16-bit", 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16
},
119 {"NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16
},
121 {"NAND 128MiB 1,8V 8-bit", 0x78, 512, 128, 0x4000, 0},
122 {"NAND 128MiB 1,8V 8-bit", 0x39, 512, 128, 0x4000, 0},
123 {"NAND 128MiB 3,3V 8-bit", 0x79, 512, 128, 0x4000, 0},
124 {"NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
125 {"NAND 128MiB 1,8V 16-bit", 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
126 {"NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
127 {"NAND 128MiB 3,3V 16-bit", 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
129 {"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, 0},
131 {"NAND 64MiB 1,8V 8-bit", 0xA2, 0, 64, 0, LP_OPTIONS
},
132 {"NAND 64MiB 3,3V 8-bit", 0xF2, 0, 64, 0, LP_OPTIONS
},
133 {"NAND 64MiB 1,8V 16-bit", 0xB2, 0, 64, 0, LP_OPTIONS16
},
134 {"NAND 64MiB 3,3V 16-bit", 0xC2, 0, 64, 0, LP_OPTIONS16
},
136 {"NAND 128MiB 1,8V 8-bit", 0xA1, 0, 128, 0, LP_OPTIONS
},
137 {"NAND 128MiB 3,3V 8-bit", 0xF1, 0, 128, 0, LP_OPTIONS
},
138 {"NAND 128MiB 1,8V 16-bit", 0xB1, 0, 128, 0, LP_OPTIONS16
},
139 {"NAND 128MiB 3,3V 16-bit", 0xC1, 0, 128, 0, LP_OPTIONS16
},
141 {"NAND 256MiB 1,8V 8-bit", 0xAA, 0, 256, 0, LP_OPTIONS
},
142 {"NAND 256MiB 3,3V 8-bit", 0xDA, 0, 256, 0, LP_OPTIONS
},
143 {"NAND 256MiB 1,8V 16-bit", 0xBA, 0, 256, 0, LP_OPTIONS16
},
144 {"NAND 256MiB 3,3V 16-bit", 0xCA, 0, 256, 0, LP_OPTIONS16
},
146 {"NAND 512MiB 1,8V 8-bit", 0xAC, 0, 512, 0, LP_OPTIONS
},
147 {"NAND 512MiB 3,3V 8-bit", 0xDC, 0, 512, 0, LP_OPTIONS
},
148 {"NAND 512MiB 1,8V 16-bit", 0xBC, 0, 512, 0, LP_OPTIONS16
},
149 {"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, LP_OPTIONS16
},
151 {"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0, LP_OPTIONS
},
152 {"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0, LP_OPTIONS
},
153 {"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, LP_OPTIONS16
},
154 {"NAND 1GiB 3,3V 16-bit", 0xC3, 0, 1024, 0, LP_OPTIONS16
},
156 {"NAND 2GiB 1,8V 8-bit", 0xA5, 0, 2048, 0, LP_OPTIONS
},
157 {"NAND 2GiB 3,3V 8-bit", 0xD5, 0, 2048, 0, LP_OPTIONS
},
158 {"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, LP_OPTIONS16
},
159 {"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16
},
161 {NULL
, 0, 0, 0, 0, 0 }
164 /* Manufacturer ID list
166 static nand_manufacturer_t nand_manuf_ids
[] =
169 {NAND_MFR_TOSHIBA
, "Toshiba"},
170 {NAND_MFR_SAMSUNG
, "Samsung"},
171 {NAND_MFR_FUJITSU
, "Fujitsu"},
172 {NAND_MFR_NATIONAL
, "National"},
173 {NAND_MFR_RENESAS
, "Renesas"},
174 {NAND_MFR_STMICRO
, "ST Micro"},
175 {NAND_MFR_HYNIX
, "Hynix"},
176 {NAND_MFR_MICRON
, "Micron"},
181 * Define default oob placement schemes for large and small page devices
185 static nand_ecclayout_t nand_oob_8
= {
196 static nand_ecclayout_t nand_oob_16
= {
198 .eccpos
= {0, 1, 2, 3, 6, 7},
204 static nand_ecclayout_t nand_oob_64
= {
207 40, 41, 42, 43, 44, 45, 46, 47,
208 48, 49, 50, 51, 52, 53, 54, 55,
209 56, 57, 58, 59, 60, 61, 62, 63},
215 /* nand device <nand_controller> [controller options]
217 static int handle_nand_device_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
224 LOG_WARNING("incomplete flash device nand configuration");
225 return ERROR_FLASH_BANK_INVALID
;
228 for (i
= 0; nand_flash_controllers
[i
]; i
++)
230 nand_device_t
*p
, *c
;
232 if (strcmp(args
[0], nand_flash_controllers
[i
]->name
) == 0)
234 /* register flash specific commands */
235 if ((retval
= nand_flash_controllers
[i
]->register_commands(cmd_ctx
)) != ERROR_OK
)
237 LOG_ERROR("couldn't register '%s' commands", args
[0]);
241 c
= malloc(sizeof(nand_device_t
));
243 c
->controller
= nand_flash_controllers
[i
];
244 c
->controller_priv
= NULL
;
245 c
->manufacturer
= NULL
;
248 c
->address_cycles
= 0;
253 if ((retval
= nand_flash_controllers
[i
]->nand_device_command(cmd_ctx
, cmd
, args
, argc
, c
)) != ERROR_OK
)
255 LOG_ERROR("'%s' driver rejected nand flash", c
->controller
->name
);
260 /* put NAND device in linked list */
263 /* find last flash device */
264 for (p
= nand_devices
; p
&& p
->next
; p
= p
->next
);
277 /* no valid NAND controller was found (i.e. the configuration option,
278 * didn't match one of the compiled-in controllers)
280 LOG_ERROR("No valid NAND flash controller found (%s)", args
[0]);
281 LOG_ERROR("compiled-in NAND flash controllers:");
282 for (i
= 0; nand_flash_controllers
[i
]; i
++)
284 LOG_ERROR("%i: %s", i
, nand_flash_controllers
[i
]->name
);
290 int nand_register_commands(struct command_context_s
*cmd_ctx
)
292 nand_cmd
= register_command(cmd_ctx
, NULL
, "nand", NULL
, COMMAND_ANY
, "NAND specific commands");
294 register_command(cmd_ctx
, nand_cmd
, "device", handle_nand_device_command
, COMMAND_CONFIG
, NULL
);
299 int nand_init(struct command_context_s
*cmd_ctx
)
303 register_command(cmd_ctx
, nand_cmd
, "list", handle_nand_list_command
, COMMAND_EXEC
,
304 "list configured NAND flash devices");
305 register_command(cmd_ctx
, nand_cmd
, "info", handle_nand_info_command
, COMMAND_EXEC
,
306 "print info about NAND flash device <num>");
307 register_command(cmd_ctx
, nand_cmd
, "probe", handle_nand_probe_command
, COMMAND_EXEC
,
308 "identify NAND flash device <num>");
309 register_command(cmd_ctx
, nand_cmd
, "check_bad_blocks", handle_nand_check_bad_blocks_command
, COMMAND_EXEC
,
310 "check NAND flash device <num> for bad blocks [<first> <last>]");
311 register_command(cmd_ctx
, nand_cmd
, "erase", handle_nand_erase_command
, COMMAND_EXEC
,
312 "erase blocks on NAND flash device <num> <first> <last>");
313 register_command(cmd_ctx
, nand_cmd
, "dump", handle_nand_dump_command
, COMMAND_EXEC
,
314 "dump from NAND flash device <num> <filename> "
315 "<offset> <size> [oob_raw|oob_only]");
316 register_command(cmd_ctx
, nand_cmd
, "write", handle_nand_write_command
, COMMAND_EXEC
,
317 "write to NAND flash device <num> <filename> <offset> [oob_raw|oob_only|oob_softecc|oob_softecc_kw]");
318 register_command(cmd_ctx
, nand_cmd
, "raw_access", handle_nand_raw_access_command
, COMMAND_EXEC
,
319 "raw access to NAND flash device <num> ['enable'|'disable']");
325 nand_device_t
*get_nand_device_by_num(int num
)
330 for (p
= nand_devices
; p
; p
= p
->next
)
341 static int nand_build_bbt(struct nand_device_s
*device
, int first
, int last
)
347 if ((first
< 0) || (first
>= device
->num_blocks
))
350 if ((last
>= device
->num_blocks
) || (last
== -1))
351 last
= device
->num_blocks
- 1;
353 for (i
= first
; i
< last
; i
++)
355 nand_read_page(device
, page
, NULL
, 0, oob
, 6);
357 if (((device
->device
->options
& NAND_BUSWIDTH_16
) && ((oob
[0] & oob
[1]) != 0xff))
358 || (((device
->page_size
== 512) && (oob
[5] != 0xff)) ||
359 ((device
->page_size
== 2048) && (oob
[0] != 0xff))))
361 LOG_WARNING("invalid block: %i", i
);
362 device
->blocks
[i
].is_bad
= 1;
366 device
->blocks
[i
].is_bad
= 0;
369 page
+= (device
->erase_size
/ device
->page_size
);
375 int nand_read_status(struct nand_device_s
*device
, u8
*status
)
378 return ERROR_NAND_DEVICE_NOT_PROBED
;
380 /* Send read status command */
381 device
->controller
->command(device
, NAND_CMD_STATUS
);
386 if (device
->device
->options
& NAND_BUSWIDTH_16
)
389 device
->controller
->read_data(device
, &data
);
390 *status
= data
& 0xff;
394 device
->controller
->read_data(device
, status
);
400 static int nand_poll_ready(struct nand_device_s
*device
, int timeout
)
404 device
->controller
->command(device
, NAND_CMD_STATUS
);
406 if (device
->device
->options
& NAND_BUSWIDTH_16
) {
408 device
->controller
->read_data(device
, &data
);
409 status
= data
& 0xff;
411 device
->controller
->read_data(device
, &status
);
413 if (status
& NAND_STATUS_READY
)
418 return (status
& NAND_STATUS_READY
) != 0;
421 int nand_probe(struct nand_device_s
*device
)
423 u8 manufacturer_id
, device_id
;
428 /* clear device data */
429 device
->device
= NULL
;
430 device
->manufacturer
= NULL
;
432 /* clear device parameters */
433 device
->bus_width
= 0;
434 device
->address_cycles
= 0;
435 device
->page_size
= 0;
436 device
->erase_size
= 0;
438 /* initialize controller (device parameters are zero, use controller default) */
439 if ((retval
= device
->controller
->init(device
) != ERROR_OK
))
443 case ERROR_NAND_OPERATION_FAILED
:
444 LOG_DEBUG("controller initialization failed");
445 return ERROR_NAND_OPERATION_FAILED
;
446 case ERROR_NAND_OPERATION_NOT_SUPPORTED
:
447 LOG_ERROR("BUG: controller reported that it doesn't support default parameters");
448 return ERROR_NAND_OPERATION_FAILED
;
450 LOG_ERROR("BUG: unknown controller initialization failure");
451 return ERROR_NAND_OPERATION_FAILED
;
455 device
->controller
->command(device
, NAND_CMD_RESET
);
456 device
->controller
->reset(device
);
458 device
->controller
->command(device
, NAND_CMD_READID
);
459 device
->controller
->address(device
, 0x0);
461 if (device
->bus_width
== 8)
463 device
->controller
->read_data(device
, &manufacturer_id
);
464 device
->controller
->read_data(device
, &device_id
);
469 device
->controller
->read_data(device
, &data_buf
);
470 manufacturer_id
= data_buf
& 0xff;
471 device
->controller
->read_data(device
, &data_buf
);
472 device_id
= data_buf
& 0xff;
475 for (i
= 0; nand_flash_ids
[i
].name
; i
++)
477 if (nand_flash_ids
[i
].id
== device_id
)
479 device
->device
= &nand_flash_ids
[i
];
484 for (i
= 0; nand_manuf_ids
[i
].name
; i
++)
486 if (nand_manuf_ids
[i
].id
== manufacturer_id
)
488 device
->manufacturer
= &nand_manuf_ids
[i
];
493 if (!device
->manufacturer
)
495 device
->manufacturer
= &nand_manuf_ids
[0];
496 device
->manufacturer
->id
= manufacturer_id
;
501 LOG_ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
502 manufacturer_id
, device_id
);
503 return ERROR_NAND_OPERATION_FAILED
;
506 LOG_DEBUG("found %s (%s)", device
->device
->name
, device
->manufacturer
->name
);
508 /* initialize device parameters */
511 if (device
->device
->options
& NAND_BUSWIDTH_16
)
512 device
->bus_width
= 16;
514 device
->bus_width
= 8;
516 /* Do we need extended device probe information? */
517 if (device
->device
->page_size
== 0 ||
518 device
->device
->erase_size
== 0)
520 if (device
->bus_width
== 8)
522 device
->controller
->read_data(device
, id_buff
+3);
523 device
->controller
->read_data(device
, id_buff
+4);
524 device
->controller
->read_data(device
, id_buff
+5);
530 device
->controller
->read_data(device
, &data_buf
);
531 id_buff
[3] = data_buf
;
533 device
->controller
->read_data(device
, &data_buf
);
534 id_buff
[4] = data_buf
;
536 device
->controller
->read_data(device
, &data_buf
);
537 id_buff
[5] = data_buf
>> 8;
542 if (device
->device
->page_size
== 0)
544 device
->page_size
= 1 << (10 + (id_buff
[4] & 3));
546 else if (device
->device
->page_size
== 256)
548 LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
549 return ERROR_NAND_OPERATION_FAILED
;
553 device
->page_size
= device
->device
->page_size
;
556 /* number of address cycles */
557 if (device
->page_size
<= 512)
559 /* small page devices */
560 if (device
->device
->chip_size
<= 32)
561 device
->address_cycles
= 3;
562 else if (device
->device
->chip_size
<= 8*1024)
563 device
->address_cycles
= 4;
566 LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
567 device
->address_cycles
= 5;
572 /* large page devices */
573 if (device
->device
->chip_size
<= 128)
574 device
->address_cycles
= 4;
575 else if (device
->device
->chip_size
<= 32*1024)
576 device
->address_cycles
= 5;
579 LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
580 device
->address_cycles
= 6;
585 if (device
->device
->erase_size
== 0)
587 switch ((id_buff
[4] >> 4) & 3) {
589 device
->erase_size
= 64 << 10;
592 device
->erase_size
= 128 << 10;
595 device
->erase_size
= 256 << 10;
598 device
->erase_size
=512 << 10;
604 device
->erase_size
= device
->device
->erase_size
;
607 /* initialize controller, but leave parameters at the controllers default */
608 if ((retval
= device
->controller
->init(device
) != ERROR_OK
))
612 case ERROR_NAND_OPERATION_FAILED
:
613 LOG_DEBUG("controller initialization failed");
614 return ERROR_NAND_OPERATION_FAILED
;
615 case ERROR_NAND_OPERATION_NOT_SUPPORTED
:
616 LOG_ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
617 device
->bus_width
, device
->address_cycles
, device
->page_size
);
618 return ERROR_NAND_OPERATION_FAILED
;
620 LOG_ERROR("BUG: unknown controller initialization failure");
621 return ERROR_NAND_OPERATION_FAILED
;
625 device
->num_blocks
= (device
->device
->chip_size
* 1024) / (device
->erase_size
/ 1024);
626 device
->blocks
= malloc(sizeof(nand_block_t
) * device
->num_blocks
);
628 for (i
= 0; i
< device
->num_blocks
; i
++)
630 device
->blocks
[i
].size
= device
->erase_size
;
631 device
->blocks
[i
].offset
= i
* device
->erase_size
;
632 device
->blocks
[i
].is_erased
= -1;
633 device
->blocks
[i
].is_bad
= -1;
639 int nand_erase(struct nand_device_s
*device
, int first_block
, int last_block
)
647 return ERROR_NAND_DEVICE_NOT_PROBED
;
649 if ((first_block
< 0) || (last_block
> device
->num_blocks
))
650 return ERROR_INVALID_ARGUMENTS
;
652 /* make sure we know if a block is bad before erasing it */
653 for (i
= first_block
; i
<= last_block
; i
++)
655 if (device
->blocks
[i
].is_bad
== -1)
657 nand_build_bbt(device
, i
, last_block
);
662 for (i
= first_block
; i
<= last_block
; i
++)
664 /* Send erase setup command */
665 device
->controller
->command(device
, NAND_CMD_ERASE1
);
667 page
= i
* (device
->erase_size
/ device
->page_size
);
669 /* Send page address */
670 if (device
->page_size
<= 512)
673 device
->controller
->address(device
, page
& 0xff);
674 device
->controller
->address(device
, (page
>> 8) & 0xff);
676 /* 3rd cycle only on devices with more than 32 MiB */
677 if (device
->address_cycles
>= 4)
678 device
->controller
->address(device
, (page
>> 16) & 0xff);
680 /* 4th cycle only on devices with more than 8 GiB */
681 if (device
->address_cycles
>= 5)
682 device
->controller
->address(device
, (page
>> 24) & 0xff);
687 device
->controller
->address(device
, page
& 0xff);
688 device
->controller
->address(device
, (page
>> 8) & 0xff);
690 /* 3rd cycle only on devices with more than 128 MiB */
691 if (device
->address_cycles
>= 5)
692 device
->controller
->address(device
, (page
>> 16) & 0xff);
695 /* Send erase confirm command */
696 device
->controller
->command(device
, NAND_CMD_ERASE2
);
698 retval
= device
->controller
->nand_ready
?
699 device
->controller
->nand_ready(device
, 1000) :
700 nand_poll_ready(device
, 1000);
702 LOG_ERROR("timeout waiting for NAND flash block erase to complete");
703 return ERROR_NAND_OPERATION_TIMEOUT
;
706 if ((retval
= nand_read_status(device
, &status
)) != ERROR_OK
)
708 LOG_ERROR("couldn't read status");
709 return ERROR_NAND_OPERATION_FAILED
;
714 LOG_ERROR("erase operation didn't pass, status: 0x%2.2x", status
);
715 return ERROR_NAND_OPERATION_FAILED
;
718 device
->blocks
[i
].is_erased
= 1;
725 static int nand_read_plain(struct nand_device_s
*device
, u32 address
, u8
*data
, u32 data_size
)
730 return ERROR_NAND_DEVICE_NOT_PROBED
;
732 if (address
% device
->page_size
)
734 LOG_ERROR("reads need to be page aligned");
735 return ERROR_NAND_OPERATION_FAILED
;
738 page
= malloc(device
->page_size
);
740 while (data_size
> 0 )
742 u32 thisrun_size
= (data_size
> device
->page_size
) ? device
->page_size
: data_size
;
746 page_address
= address
/ device
->page_size
;
748 nand_read_page(device
, page_address
, page
, device
->page_size
, NULL
, 0);
750 memcpy(data
, page
, thisrun_size
);
752 address
+= thisrun_size
;
753 data
+= thisrun_size
;
754 data_size
-= thisrun_size
;
762 static int nand_write_plain(struct nand_device_s
*device
, u32 address
, u8
*data
, u32 data_size
)
767 return ERROR_NAND_DEVICE_NOT_PROBED
;
769 if (address
% device
->page_size
)
771 LOG_ERROR("writes need to be page aligned");
772 return ERROR_NAND_OPERATION_FAILED
;
775 page
= malloc(device
->page_size
);
777 while (data_size
> 0 )
779 u32 thisrun_size
= (data_size
> device
->page_size
) ? device
->page_size
: data_size
;
782 memset(page
, 0xff, device
->page_size
);
783 memcpy(page
, data
, thisrun_size
);
785 page_address
= address
/ device
->page_size
;
787 nand_write_page(device
, page_address
, page
, device
->page_size
, NULL
, 0);
789 address
+= thisrun_size
;
790 data
+= thisrun_size
;
791 data_size
-= thisrun_size
;
800 int nand_write_page(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
)
805 return ERROR_NAND_DEVICE_NOT_PROBED
;
807 block
= page
/ (device
->erase_size
/ device
->page_size
);
808 if (device
->blocks
[block
].is_erased
== 1)
809 device
->blocks
[block
].is_erased
= 0;
811 if (device
->use_raw
|| device
->controller
->write_page
== NULL
)
812 return nand_write_page_raw(device
, page
, data
, data_size
, oob
, oob_size
);
814 return device
->controller
->write_page(device
, page
, data
, data_size
, oob
, oob_size
);
817 static int nand_read_page(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
)
820 return ERROR_NAND_DEVICE_NOT_PROBED
;
822 if (device
->use_raw
|| device
->controller
->read_page
== NULL
)
823 return nand_read_page_raw(device
, page
, data
, data_size
, oob
, oob_size
);
825 return device
->controller
->read_page(device
, page
, data
, data_size
, oob
, oob_size
);
828 int nand_read_page_raw(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
)
833 return ERROR_NAND_DEVICE_NOT_PROBED
;
835 if (device
->page_size
<= 512)
837 /* small page device */
839 device
->controller
->command(device
, NAND_CMD_READ0
);
841 device
->controller
->command(device
, NAND_CMD_READOOB
);
843 /* column (always 0, we start at the beginning of a page/OOB area) */
844 device
->controller
->address(device
, 0x0);
847 device
->controller
->address(device
, page
& 0xff);
848 device
->controller
->address(device
, (page
>> 8) & 0xff);
850 /* 4th cycle only on devices with more than 32 MiB */
851 if (device
->address_cycles
>= 4)
852 device
->controller
->address(device
, (page
>> 16) & 0xff);
854 /* 5th cycle only on devices with more than 8 GiB */
855 if (device
->address_cycles
>= 5)
856 device
->controller
->address(device
, (page
>> 24) & 0xff);
860 /* large page device */
861 device
->controller
->command(device
, NAND_CMD_READ0
);
863 /* column (0 when we start at the beginning of a page,
864 * or 2048 for the beginning of OOB area)
866 device
->controller
->address(device
, 0x0);
868 device
->controller
->address(device
, 0x0);
870 device
->controller
->address(device
, 0x8);
873 device
->controller
->address(device
, page
& 0xff);
874 device
->controller
->address(device
, (page
>> 8) & 0xff);
876 /* 5th cycle only on devices with more than 128 MiB */
877 if (device
->address_cycles
>= 5)
878 device
->controller
->address(device
, (page
>> 16) & 0xff);
880 /* large page devices need a start command */
881 device
->controller
->command(device
, NAND_CMD_READSTART
);
884 if (device
->controller
->nand_ready
) {
885 if (!device
->controller
->nand_ready(device
, 100))
886 return ERROR_NAND_OPERATION_TIMEOUT
;
893 if (device
->controller
->read_block_data
!= NULL
)
894 (device
->controller
->read_block_data
)(device
, data
, data_size
);
897 for (i
= 0; i
< data_size
;)
899 if (device
->device
->options
& NAND_BUSWIDTH_16
)
901 device
->controller
->read_data(device
, data
);
907 device
->controller
->read_data(device
, data
);
917 if (device
->controller
->read_block_data
!= NULL
)
918 (device
->controller
->read_block_data
)(device
, oob
, oob_size
);
921 for (i
= 0; i
< oob_size
;)
923 if (device
->device
->options
& NAND_BUSWIDTH_16
)
925 device
->controller
->read_data(device
, oob
);
931 device
->controller
->read_data(device
, oob
);
942 int nand_write_page_raw(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
)
949 return ERROR_NAND_DEVICE_NOT_PROBED
;
951 device
->controller
->command(device
, NAND_CMD_SEQIN
);
953 if (device
->page_size
<= 512)
955 /* column (always 0, we start at the beginning of a page/OOB area) */
956 device
->controller
->address(device
, 0x0);
959 device
->controller
->address(device
, page
& 0xff);
960 device
->controller
->address(device
, (page
>> 8) & 0xff);
962 /* 4th cycle only on devices with more than 32 MiB */
963 if (device
->address_cycles
>= 4)
964 device
->controller
->address(device
, (page
>> 16) & 0xff);
966 /* 5th cycle only on devices with more than 8 GiB */
967 if (device
->address_cycles
>= 5)
968 device
->controller
->address(device
, (page
>> 24) & 0xff);
972 /* column (0 when we start at the beginning of a page,
973 * or 2048 for the beginning of OOB area)
975 device
->controller
->address(device
, 0x0);
977 device
->controller
->address(device
, 0x0);
979 device
->controller
->address(device
, 0x8);
982 device
->controller
->address(device
, page
& 0xff);
983 device
->controller
->address(device
, (page
>> 8) & 0xff);
985 /* 5th cycle only on devices with more than 128 MiB */
986 if (device
->address_cycles
>= 5)
987 device
->controller
->address(device
, (page
>> 16) & 0xff);
992 if (device
->controller
->write_block_data
!= NULL
)
993 (device
->controller
->write_block_data
)(device
, data
, data_size
);
996 for (i
= 0; i
< data_size
;)
998 if (device
->device
->options
& NAND_BUSWIDTH_16
)
1000 u16 data_buf
= le_to_h_u16(data
);
1001 device
->controller
->write_data(device
, data_buf
);
1007 device
->controller
->write_data(device
, *data
);
1017 if (device
->controller
->write_block_data
!= NULL
)
1018 (device
->controller
->write_block_data
)(device
, oob
, oob_size
);
1021 for (i
= 0; i
< oob_size
;)
1023 if (device
->device
->options
& NAND_BUSWIDTH_16
)
1025 u16 oob_buf
= le_to_h_u16(data
);
1026 device
->controller
->write_data(device
, oob_buf
);
1032 device
->controller
->write_data(device
, *oob
);
1040 device
->controller
->command(device
, NAND_CMD_PAGEPROG
);
1042 retval
= device
->controller
->nand_ready
?
1043 device
->controller
->nand_ready(device
, 100) :
1044 nand_poll_ready(device
, 100);
1046 return ERROR_NAND_OPERATION_TIMEOUT
;
1048 if ((retval
= nand_read_status(device
, &status
)) != ERROR_OK
)
1050 LOG_ERROR("couldn't read status");
1051 return ERROR_NAND_OPERATION_FAILED
;
1054 if (status
& NAND_STATUS_FAIL
)
1056 LOG_ERROR("write operation didn't pass, status: 0x%2.2x", status
);
1057 return ERROR_NAND_OPERATION_FAILED
;
1063 int handle_nand_list_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1070 command_print(cmd_ctx
, "no NAND flash devices configured");
1074 for (p
= nand_devices
, i
= 0; p
; p
= p
->next
, i
++)
1077 command_print(cmd_ctx
, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
1078 i
, p
->device
->name
, p
->manufacturer
->name
, p
->page_size
, p
->bus_width
, p
->erase_size
);
1080 command_print(cmd_ctx
, "#%i: not probed", i
);
1086 static int handle_nand_info_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1094 if ((argc
< 1) || (argc
> 3))
1096 return ERROR_COMMAND_SYNTAX_ERROR
;
1102 first
= last
= strtoul(args
[1], NULL
, 0);
1106 first
= strtoul(args
[1], NULL
, 0);
1107 last
= strtoul(args
[2], NULL
, 0);
1110 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1115 if (first
>= p
->num_blocks
)
1116 first
= p
->num_blocks
- 1;
1118 if (last
>= p
->num_blocks
)
1119 last
= p
->num_blocks
- 1;
1121 command_print(cmd_ctx
, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
1122 i
++, p
->device
->name
, p
->manufacturer
->name
, p
->page_size
, p
->bus_width
, p
->erase_size
);
1124 for (j
= first
; j
<= last
; j
++)
1126 char *erase_state
, *bad_state
;
1128 if (p
->blocks
[j
].is_erased
== 0)
1129 erase_state
= "not erased";
1130 else if (p
->blocks
[j
].is_erased
== 1)
1131 erase_state
= "erased";
1133 erase_state
= "erase state unknown";
1135 if (p
->blocks
[j
].is_bad
== 0)
1137 else if (p
->blocks
[j
].is_bad
== 1)
1138 bad_state
= " (marked bad)";
1140 bad_state
= " (block condition unknown)";
1142 command_print(cmd_ctx
, "\t#%i: 0x%8.8x (0x%xkB) %s%s",
1143 j
, p
->blocks
[j
].offset
, p
->blocks
[j
].size
/ 1024,
1144 erase_state
, bad_state
);
1149 command_print(cmd_ctx
, "#%s: not probed", args
[0]);
1156 static int handle_nand_probe_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1163 return ERROR_COMMAND_SYNTAX_ERROR
;
1166 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1169 if ((retval
= nand_probe(p
)) == ERROR_OK
)
1171 command_print(cmd_ctx
, "NAND flash device '%s' found", p
->device
->name
);
1173 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1175 command_print(cmd_ctx
, "probing failed for NAND flash device");
1179 command_print(cmd_ctx
, "unknown error when probing NAND flash device");
1184 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1190 static int handle_nand_erase_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1197 return ERROR_COMMAND_SYNTAX_ERROR
;
1201 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1204 int first
= strtoul(args
[1], NULL
, 0);
1205 int last
= strtoul(args
[2], NULL
, 0);
1207 if ((retval
= nand_erase(p
, first
, last
)) == ERROR_OK
)
1209 command_print(cmd_ctx
, "successfully erased blocks %i to %i on NAND flash device '%s'", first
, last
, p
->device
->name
);
1211 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1213 command_print(cmd_ctx
, "erase failed");
1217 command_print(cmd_ctx
, "unknown error when erasing NAND flash device");
1222 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1228 int handle_nand_check_bad_blocks_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1235 if ((argc
< 1) || (argc
> 3) || (argc
== 2))
1237 return ERROR_COMMAND_SYNTAX_ERROR
;
1243 first
= strtoul(args
[1], NULL
, 0);
1244 last
= strtoul(args
[2], NULL
, 0);
1247 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1250 if ((retval
= nand_build_bbt(p
, first
, last
)) == ERROR_OK
)
1252 command_print(cmd_ctx
, "checked NAND flash device for bad blocks, use \"nand info\" command to list blocks");
1254 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1256 command_print(cmd_ctx
, "error when checking for bad blocks on NAND flash device");
1260 command_print(cmd_ctx
, "unknown error when checking for bad blocks on NAND flash device");
1265 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1271 static int handle_nand_write_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1276 enum oob_formats oob_format
= NAND_OOB_NONE
;
1280 duration_t duration
;
1281 char *duration_text
;
1287 return ERROR_COMMAND_SYNTAX_ERROR
;
1291 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1298 const int *eccpos
= NULL
;
1300 offset
= strtoul(args
[2], NULL
, 0);
1305 for (i
= 3; i
< argc
; i
++)
1307 if (!strcmp(args
[i
], "oob_raw"))
1308 oob_format
|= NAND_OOB_RAW
;
1309 else if (!strcmp(args
[i
], "oob_only"))
1310 oob_format
|= NAND_OOB_RAW
| NAND_OOB_ONLY
;
1311 else if (!strcmp(args
[i
], "oob_softecc"))
1312 oob_format
|= NAND_OOB_SW_ECC
;
1313 else if (!strcmp(args
[i
], "oob_softecc_kw"))
1314 oob_format
|= NAND_OOB_SW_ECC_KW
;
1317 command_print(cmd_ctx
, "unknown option: %s", args
[i
]);
1318 return ERROR_COMMAND_SYNTAX_ERROR
;
1323 duration_start_measure(&duration
);
1325 if (fileio_open(&fileio
, args
[1], FILEIO_READ
, FILEIO_BINARY
) != ERROR_OK
)
1330 buf_cnt
= binary_size
= fileio
.size
;
1332 if (!(oob_format
& NAND_OOB_ONLY
))
1334 page_size
= p
->page_size
;
1335 page
= malloc(p
->page_size
);
1338 if (oob_format
& (NAND_OOB_RAW
| NAND_OOB_SW_ECC
| NAND_OOB_SW_ECC_KW
))
1340 if (p
->page_size
== 512) {
1342 eccpos
= nand_oob_16
.eccpos
;
1343 } else if (p
->page_size
== 2048) {
1345 eccpos
= nand_oob_64
.eccpos
;
1347 oob
= malloc(oob_size
);
1350 if (offset
% p
->page_size
)
1352 command_print(cmd_ctx
, "only page size aligned offsets and sizes are supported");
1353 fileio_close(&fileio
);
1365 fileio_read(&fileio
, page_size
, page
, &size_read
);
1366 buf_cnt
-= size_read
;
1367 if (size_read
< page_size
)
1369 memset(page
+ size_read
, 0xff, page_size
- size_read
);
1373 if (oob_format
& NAND_OOB_SW_ECC
)
1377 memset(oob
, 0xff, oob_size
);
1378 for (i
= 0, j
= 0; i
< page_size
; i
+= 256) {
1379 nand_calculate_ecc(p
, page
+i
, ecc
);
1380 oob
[eccpos
[j
++]] = ecc
[0];
1381 oob
[eccpos
[j
++]] = ecc
[1];
1382 oob
[eccpos
[j
++]] = ecc
[2];
1384 } else if (oob_format
& NAND_OOB_SW_ECC_KW
)
1387 * In this case eccpos is not used as
1388 * the ECC data is always stored contigously
1389 * at the end of the OOB area. It consists
1390 * of 10 bytes per 512-byte data block.
1393 u8
*ecc
= oob
+ oob_size
- page_size
/512 * 10;
1394 memset(oob
, 0xff, oob_size
);
1395 for (i
= 0; i
< page_size
; i
+= 512) {
1396 nand_calculate_ecc_kw(p
, page
+i
, ecc
);
1400 else if (NULL
!= oob
)
1402 fileio_read(&fileio
, oob_size
, oob
, &size_read
);
1403 buf_cnt
-= size_read
;
1404 if (size_read
< oob_size
)
1406 memset(oob
+ size_read
, 0xff, oob_size
- size_read
);
1410 if (nand_write_page(p
, offset
/ p
->page_size
, page
, page_size
, oob
, oob_size
) != ERROR_OK
)
1412 command_print(cmd_ctx
, "failed writing file %s to NAND flash %s at offset 0x%8.8x",
1413 args
[1], args
[0], offset
);
1415 fileio_close(&fileio
);
1421 offset
+= page_size
;
1424 fileio_close(&fileio
);
1429 duration_stop_measure(&duration
, &duration_text
);
1430 command_print(cmd_ctx
, "wrote file %s to NAND flash %s up to offset 0x%8.8x in %s",
1431 args
[1], args
[0], offset
, duration_text
);
1432 free(duration_text
);
1433 duration_text
= NULL
;
1437 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1443 static int handle_nand_dump_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1449 return ERROR_COMMAND_SYNTAX_ERROR
;
1452 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1458 duration_t duration
;
1459 char *duration_text
;
1466 u32 address
= strtoul(args
[2], NULL
, 0);
1467 u32 size
= strtoul(args
[3], NULL
, 0);
1469 enum oob_formats oob_format
= NAND_OOB_NONE
;
1474 for (i
= 4; i
< argc
; i
++)
1476 if (!strcmp(args
[i
], "oob_raw"))
1477 oob_format
|= NAND_OOB_RAW
;
1478 else if (!strcmp(args
[i
], "oob_only"))
1479 oob_format
|= NAND_OOB_RAW
| NAND_OOB_ONLY
;
1481 command_print(cmd_ctx
, "unknown option: '%s'", args
[i
]);
1485 if ((address
% p
->page_size
) || (size
% p
->page_size
))
1487 command_print(cmd_ctx
, "only page size aligned addresses and sizes are supported");
1491 if (!(oob_format
& NAND_OOB_ONLY
))
1493 page_size
= p
->page_size
;
1494 page
= malloc(p
->page_size
);
1497 if (oob_format
& NAND_OOB_RAW
)
1499 if (p
->page_size
== 512)
1501 else if (p
->page_size
== 2048)
1503 oob
= malloc(oob_size
);
1506 if (fileio_open(&fileio
, args
[1], FILEIO_WRITE
, FILEIO_BINARY
) != ERROR_OK
)
1511 duration_start_measure(&duration
);
1516 if ((retval
= nand_read_page(p
, address
/ p
->page_size
, page
, page_size
, oob
, oob_size
)) != ERROR_OK
)
1518 command_print(cmd_ctx
, "reading NAND flash page failed");
1521 fileio_close(&fileio
);
1527 fileio_write(&fileio
, page_size
, page
, &size_written
);
1528 bytes_done
+= page_size
;
1533 fileio_write(&fileio
, oob_size
, oob
, &size_written
);
1534 bytes_done
+= oob_size
;
1537 size
-= p
->page_size
;
1538 address
+= p
->page_size
;
1545 fileio_close(&fileio
);
1547 duration_stop_measure(&duration
, &duration_text
);
1548 command_print(cmd_ctx
, "dumped %lld byte in %s", fileio
.size
, duration_text
);
1549 free(duration_text
);
1550 duration_text
= NULL
;
1554 command_print(cmd_ctx
, "#%s: not probed", args
[0]);
1559 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1565 static int handle_nand_raw_access_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1569 if ((argc
< 1) || (argc
> 2))
1571 return ERROR_COMMAND_SYNTAX_ERROR
;
1574 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1581 if (strcmp("enable", args
[1]) == 0)
1585 else if (strcmp("disable", args
[1]) == 0)
1591 return ERROR_COMMAND_SYNTAX_ERROR
;
1595 command_print(cmd_ctx
, "raw access is %s", (p
->use_raw
) ? "enabled" : "disabled");
1599 command_print(cmd_ctx
, "#%s: not probed", args
[0]);
1604 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
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