1 /***************************************************************************
2 * Copyright (C) 2007 by Dominic Rath <Dominic.Rath@gmx.de> *
3 * Copyright (C) 2002 Thomas Gleixner <tglx@linutronix.de> *
4 * Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net> *
6 * Partially based on drivers/mtd/nand_ids.c from Linux. *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
29 /* configured NAND devices and NAND Flash command handler */
30 struct nand_device
*nand_devices
= NULL
;
32 void nand_device_add(struct nand_device
*c
)
35 struct nand_device
*p
= nand_devices
;
36 while (p
&& p
->next
) p
= p
->next
;
45 * Name, ID code, pagesize, chipsize in MegaByte, eraseblock size,
48 * Pagesize; 0, 256, 512
49 * 0 get this information from the extended chip ID
50 * 256 256 Byte page size
51 * 512 512 Byte page size
53 static struct nand_info nand_flash_ids
[] =
55 /* start "museum" IDs */
56 {"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, 0},
57 {"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, 0},
58 {"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, 0},
59 {"NAND 1MiB 3,3V 8-bit", 0xe8, 256, 1, 0x1000, 0},
60 {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, 0},
61 {"NAND 2MiB 3,3V 8-bit", 0xea, 256, 2, 0x1000, 0},
62 {"NAND 4MiB 3,3V 8-bit", 0xd5, 512, 4, 0x2000, 0},
63 {"NAND 4MiB 3,3V 8-bit", 0xe3, 512, 4, 0x2000, 0},
64 {"NAND 4MiB 3,3V 8-bit", 0xe5, 512, 4, 0x2000, 0},
65 {"NAND 8MiB 3,3V 8-bit", 0xd6, 512, 8, 0x2000, 0},
67 {"NAND 8MiB 1,8V 8-bit", 0x39, 512, 8, 0x2000, 0},
68 {"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, 0},
69 {"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16
},
70 {"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16
},
71 /* end "museum" IDs */
73 {"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, 0},
74 {"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, 0},
75 {"NAND 16MiB 1,8V 16-bit", 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16
},
76 {"NAND 16MiB 3,3V 16-bit", 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16
},
78 {"NAND 32MiB 1,8V 8-bit", 0x35, 512, 32, 0x4000, 0},
79 {"NAND 32MiB 3,3V 8-bit", 0x75, 512, 32, 0x4000, 0},
80 {"NAND 32MiB 1,8V 16-bit", 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16
},
81 {"NAND 32MiB 3,3V 16-bit", 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16
},
83 {"NAND 64MiB 1,8V 8-bit", 0x36, 512, 64, 0x4000, 0},
84 {"NAND 64MiB 3,3V 8-bit", 0x76, 512, 64, 0x4000, 0},
85 {"NAND 64MiB 1,8V 16-bit", 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16
},
86 {"NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16
},
88 {"NAND 128MiB 1,8V 8-bit", 0x78, 512, 128, 0x4000, 0},
89 {"NAND 128MiB 1,8V 8-bit", 0x39, 512, 128, 0x4000, 0},
90 {"NAND 128MiB 3,3V 8-bit", 0x79, 512, 128, 0x4000, 0},
91 {"NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
92 {"NAND 128MiB 1,8V 16-bit", 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
93 {"NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
94 {"NAND 128MiB 3,3V 16-bit", 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
96 {"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, 0},
98 {"NAND 64MiB 1,8V 8-bit", 0xA2, 0, 64, 0, LP_OPTIONS
},
99 {"NAND 64MiB 3,3V 8-bit", 0xF2, 0, 64, 0, LP_OPTIONS
},
100 {"NAND 64MiB 1,8V 16-bit", 0xB2, 0, 64, 0, LP_OPTIONS16
},
101 {"NAND 64MiB 3,3V 16-bit", 0xC2, 0, 64, 0, LP_OPTIONS16
},
103 {"NAND 128MiB 1,8V 8-bit", 0xA1, 0, 128, 0, LP_OPTIONS
},
104 {"NAND 128MiB 3,3V 8-bit", 0xF1, 0, 128, 0, LP_OPTIONS
},
105 {"NAND 128MiB 1,8V 16-bit", 0xB1, 0, 128, 0, LP_OPTIONS16
},
106 {"NAND 128MiB 3,3V 16-bit", 0xC1, 0, 128, 0, LP_OPTIONS16
},
108 {"NAND 256MiB 1,8V 8-bit", 0xAA, 0, 256, 0, LP_OPTIONS
},
109 {"NAND 256MiB 3,3V 8-bit", 0xDA, 0, 256, 0, LP_OPTIONS
},
110 {"NAND 256MiB 1,8V 16-bit", 0xBA, 0, 256, 0, LP_OPTIONS16
},
111 {"NAND 256MiB 3,3V 16-bit", 0xCA, 0, 256, 0, LP_OPTIONS16
},
113 {"NAND 512MiB 1,8V 8-bit", 0xAC, 0, 512, 0, LP_OPTIONS
},
114 {"NAND 512MiB 3,3V 8-bit", 0xDC, 0, 512, 0, LP_OPTIONS
},
115 {"NAND 512MiB 1,8V 16-bit", 0xBC, 0, 512, 0, LP_OPTIONS16
},
116 {"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, LP_OPTIONS16
},
118 {"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0, LP_OPTIONS
},
119 {"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0, LP_OPTIONS
},
120 {"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, LP_OPTIONS16
},
121 {"NAND 1GiB 3,3V 16-bit", 0xC3, 0, 1024, 0, LP_OPTIONS16
},
123 {"NAND 2GiB 1,8V 8-bit", 0xA5, 0, 2048, 0, LP_OPTIONS
},
124 {"NAND 2GiB 3,3V 8-bit", 0xD5, 0, 2048, 0, LP_OPTIONS
},
125 {"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, LP_OPTIONS16
},
126 {"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16
},
128 {NULL
, 0, 0, 0, 0, 0 }
131 /* Manufacturer ID list
133 static struct nand_manufacturer nand_manuf_ids
[] =
136 {NAND_MFR_TOSHIBA
, "Toshiba"},
137 {NAND_MFR_SAMSUNG
, "Samsung"},
138 {NAND_MFR_FUJITSU
, "Fujitsu"},
139 {NAND_MFR_NATIONAL
, "National"},
140 {NAND_MFR_RENESAS
, "Renesas"},
141 {NAND_MFR_STMICRO
, "ST Micro"},
142 {NAND_MFR_HYNIX
, "Hynix"},
143 {NAND_MFR_MICRON
, "Micron"},
148 * Define default oob placement schemes for large and small page devices
152 static struct nand_ecclayout nand_oob_8
= {
164 * Returns the flash bank specified by @a name, which matches the
165 * driver name and a suffix (option) specify the driver-specific
166 * bank number. The suffix consists of the '.' and the driver-specific
167 * bank number: when two davinci banks are defined, then 'davinci.1' refers
168 * to the second (e.g. DM355EVM).
170 static struct nand_device
*get_nand_device_by_name(const char *name
)
172 unsigned requested
= get_flash_name_index(name
);
175 struct nand_device
*nand
;
176 for (nand
= nand_devices
; NULL
!= nand
; nand
= nand
->next
)
178 if (strcmp(nand
->name
, name
) == 0)
180 if (!flash_driver_name_matches(nand
->controller
->name
, name
))
182 if (++found
< requested
)
189 struct nand_device
*get_nand_device_by_num(int num
)
191 struct nand_device
*p
;
194 for (p
= nand_devices
; p
; p
= p
->next
)
205 COMMAND_HELPER(nand_command_get_device
, unsigned name_index
,
206 struct nand_device
**nand
)
208 const char *str
= CMD_ARGV
[name_index
];
209 *nand
= get_nand_device_by_name(str
);
214 COMMAND_PARSE_NUMBER(uint
, str
, num
);
215 *nand
= get_nand_device_by_num(num
);
217 command_print(CMD_CTX
, "NAND flash device '%s' not found", str
);
218 return ERROR_INVALID_ARGUMENTS
;
223 int nand_build_bbt(struct nand_device
*nand
, int first
, int last
)
229 if ((first
< 0) || (first
>= nand
->num_blocks
))
232 if ((last
>= nand
->num_blocks
) || (last
== -1))
233 last
= nand
->num_blocks
- 1;
235 for (i
= first
; i
< last
; i
++)
237 nand_read_page(nand
, page
, NULL
, 0, oob
, 6);
239 if (((nand
->device
->options
& NAND_BUSWIDTH_16
) && ((oob
[0] & oob
[1]) != 0xff))
240 || (((nand
->page_size
== 512) && (oob
[5] != 0xff)) ||
241 ((nand
->page_size
== 2048) && (oob
[0] != 0xff))))
243 LOG_WARNING("bad block: %i", i
);
244 nand
->blocks
[i
].is_bad
= 1;
248 nand
->blocks
[i
].is_bad
= 0;
251 page
+= (nand
->erase_size
/ nand
->page_size
);
257 int nand_read_status(struct nand_device
*nand
, uint8_t *status
)
260 return ERROR_NAND_DEVICE_NOT_PROBED
;
262 /* Send read status command */
263 nand
->controller
->command(nand
, NAND_CMD_STATUS
);
268 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
271 nand
->controller
->read_data(nand
, &data
);
272 *status
= data
& 0xff;
276 nand
->controller
->read_data(nand
, status
);
282 static int nand_poll_ready(struct nand_device
*nand
, int timeout
)
286 nand
->controller
->command(nand
, NAND_CMD_STATUS
);
288 if (nand
->device
->options
& NAND_BUSWIDTH_16
) {
290 nand
->controller
->read_data(nand
, &data
);
291 status
= data
& 0xff;
293 nand
->controller
->read_data(nand
, &status
);
295 if (status
& NAND_STATUS_READY
)
300 return (status
& NAND_STATUS_READY
) != 0;
303 int nand_probe(struct nand_device
*nand
)
305 uint8_t manufacturer_id
, device_id
;
310 /* clear device data */
312 nand
->manufacturer
= NULL
;
314 /* clear device parameters */
316 nand
->address_cycles
= 0;
318 nand
->erase_size
= 0;
320 /* initialize controller (device parameters are zero, use controller default) */
321 if ((retval
= nand
->controller
->init(nand
) != ERROR_OK
))
325 case ERROR_NAND_OPERATION_FAILED
:
326 LOG_DEBUG("controller initialization failed");
327 return ERROR_NAND_OPERATION_FAILED
;
328 case ERROR_NAND_OPERATION_NOT_SUPPORTED
:
329 LOG_ERROR("BUG: controller reported that it doesn't support default parameters");
330 return ERROR_NAND_OPERATION_FAILED
;
332 LOG_ERROR("BUG: unknown controller initialization failure");
333 return ERROR_NAND_OPERATION_FAILED
;
337 nand
->controller
->command(nand
, NAND_CMD_RESET
);
338 nand
->controller
->reset(nand
);
340 nand
->controller
->command(nand
, NAND_CMD_READID
);
341 nand
->controller
->address(nand
, 0x0);
343 if (nand
->bus_width
== 8)
345 nand
->controller
->read_data(nand
, &manufacturer_id
);
346 nand
->controller
->read_data(nand
, &device_id
);
351 nand
->controller
->read_data(nand
, &data_buf
);
352 manufacturer_id
= data_buf
& 0xff;
353 nand
->controller
->read_data(nand
, &data_buf
);
354 device_id
= data_buf
& 0xff;
357 for (i
= 0; nand_flash_ids
[i
].name
; i
++)
359 if (nand_flash_ids
[i
].id
== device_id
)
361 nand
->device
= &nand_flash_ids
[i
];
366 for (i
= 0; nand_manuf_ids
[i
].name
; i
++)
368 if (nand_manuf_ids
[i
].id
== manufacturer_id
)
370 nand
->manufacturer
= &nand_manuf_ids
[i
];
375 if (!nand
->manufacturer
)
377 nand
->manufacturer
= &nand_manuf_ids
[0];
378 nand
->manufacturer
->id
= manufacturer_id
;
383 LOG_ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
384 manufacturer_id
, device_id
);
385 return ERROR_NAND_OPERATION_FAILED
;
388 LOG_DEBUG("found %s (%s)", nand
->device
->name
, nand
->manufacturer
->name
);
390 /* initialize device parameters */
393 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
394 nand
->bus_width
= 16;
398 /* Do we need extended device probe information? */
399 if (nand
->device
->page_size
== 0 ||
400 nand
->device
->erase_size
== 0)
402 if (nand
->bus_width
== 8)
404 nand
->controller
->read_data(nand
, id_buff
+ 3);
405 nand
->controller
->read_data(nand
, id_buff
+ 4);
406 nand
->controller
->read_data(nand
, id_buff
+ 5);
412 nand
->controller
->read_data(nand
, &data_buf
);
413 id_buff
[3] = data_buf
;
415 nand
->controller
->read_data(nand
, &data_buf
);
416 id_buff
[4] = data_buf
;
418 nand
->controller
->read_data(nand
, &data_buf
);
419 id_buff
[5] = data_buf
>> 8;
424 if (nand
->device
->page_size
== 0)
426 nand
->page_size
= 1 << (10 + (id_buff
[4] & 3));
428 else if (nand
->device
->page_size
== 256)
430 LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
431 return ERROR_NAND_OPERATION_FAILED
;
435 nand
->page_size
= nand
->device
->page_size
;
438 /* number of address cycles */
439 if (nand
->page_size
<= 512)
441 /* small page devices */
442 if (nand
->device
->chip_size
<= 32)
443 nand
->address_cycles
= 3;
444 else if (nand
->device
->chip_size
<= 8*1024)
445 nand
->address_cycles
= 4;
448 LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
449 nand
->address_cycles
= 5;
454 /* large page devices */
455 if (nand
->device
->chip_size
<= 128)
456 nand
->address_cycles
= 4;
457 else if (nand
->device
->chip_size
<= 32*1024)
458 nand
->address_cycles
= 5;
461 LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
462 nand
->address_cycles
= 6;
467 if (nand
->device
->erase_size
== 0)
469 switch ((id_buff
[4] >> 4) & 3) {
471 nand
->erase_size
= 64 << 10;
474 nand
->erase_size
= 128 << 10;
477 nand
->erase_size
= 256 << 10;
480 nand
->erase_size
=512 << 10;
486 nand
->erase_size
= nand
->device
->erase_size
;
489 /* initialize controller, but leave parameters at the controllers default */
490 if ((retval
= nand
->controller
->init(nand
) != ERROR_OK
))
494 case ERROR_NAND_OPERATION_FAILED
:
495 LOG_DEBUG("controller initialization failed");
496 return ERROR_NAND_OPERATION_FAILED
;
497 case ERROR_NAND_OPERATION_NOT_SUPPORTED
:
498 LOG_ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
499 nand
->bus_width
, nand
->address_cycles
, nand
->page_size
);
500 return ERROR_NAND_OPERATION_FAILED
;
502 LOG_ERROR("BUG: unknown controller initialization failure");
503 return ERROR_NAND_OPERATION_FAILED
;
507 nand
->num_blocks
= (nand
->device
->chip_size
* 1024) / (nand
->erase_size
/ 1024);
508 nand
->blocks
= malloc(sizeof(struct nand_block
) * nand
->num_blocks
);
510 for (i
= 0; i
< nand
->num_blocks
; i
++)
512 nand
->blocks
[i
].size
= nand
->erase_size
;
513 nand
->blocks
[i
].offset
= i
* nand
->erase_size
;
514 nand
->blocks
[i
].is_erased
= -1;
515 nand
->blocks
[i
].is_bad
= -1;
521 int nand_erase(struct nand_device
*nand
, int first_block
, int last_block
)
529 return ERROR_NAND_DEVICE_NOT_PROBED
;
531 if ((first_block
< 0) || (last_block
> nand
->num_blocks
))
532 return ERROR_INVALID_ARGUMENTS
;
534 /* make sure we know if a block is bad before erasing it */
535 for (i
= first_block
; i
<= last_block
; i
++)
537 if (nand
->blocks
[i
].is_bad
== -1)
539 nand_build_bbt(nand
, i
, last_block
);
544 for (i
= first_block
; i
<= last_block
; i
++)
546 /* Send erase setup command */
547 nand
->controller
->command(nand
, NAND_CMD_ERASE1
);
549 page
= i
* (nand
->erase_size
/ nand
->page_size
);
551 /* Send page address */
552 if (nand
->page_size
<= 512)
555 nand
->controller
->address(nand
, page
& 0xff);
556 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
558 /* 3rd cycle only on devices with more than 32 MiB */
559 if (nand
->address_cycles
>= 4)
560 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
562 /* 4th cycle only on devices with more than 8 GiB */
563 if (nand
->address_cycles
>= 5)
564 nand
->controller
->address(nand
, (page
>> 24) & 0xff);
569 nand
->controller
->address(nand
, page
& 0xff);
570 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
572 /* 3rd cycle only on devices with more than 128 MiB */
573 if (nand
->address_cycles
>= 5)
574 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
577 /* Send erase confirm command */
578 nand
->controller
->command(nand
, NAND_CMD_ERASE2
);
580 retval
= nand
->controller
->nand_ready
?
581 nand
->controller
->nand_ready(nand
, 1000) :
582 nand_poll_ready(nand
, 1000);
584 LOG_ERROR("timeout waiting for NAND flash block erase to complete");
585 return ERROR_NAND_OPERATION_TIMEOUT
;
588 if ((retval
= nand_read_status(nand
, &status
)) != ERROR_OK
)
590 LOG_ERROR("couldn't read status");
591 return ERROR_NAND_OPERATION_FAILED
;
596 LOG_ERROR("didn't erase %sblock %d; status: 0x%2.2x",
597 (nand
->blocks
[i
].is_bad
== 1)
600 /* continue; other blocks might still be erasable */
603 nand
->blocks
[i
].is_erased
= 1;
610 static int nand_read_plain(struct nand_device
*nand
, uint32_t address
, uint8_t *data
, uint32_t data_size
)
615 return ERROR_NAND_DEVICE_NOT_PROBED
;
617 if (address
% nand
->page_size
)
619 LOG_ERROR("reads need to be page aligned");
620 return ERROR_NAND_OPERATION_FAILED
;
623 page
= malloc(nand
->page_size
);
625 while (data_size
> 0)
627 uint32_t thisrun_size
= (data_size
> nand
->page_size
) ? nand
->page_size
: data_size
;
628 uint32_t page_address
;
631 page_address
= address
/ nand
->page_size
;
633 nand_read_page(nand
, page_address
, page
, nand
->page_size
, NULL
, 0);
635 memcpy(data
, page
, thisrun_size
);
637 address
+= thisrun_size
;
638 data
+= thisrun_size
;
639 data_size
-= thisrun_size
;
647 static int nand_write_plain(struct nand_device
*nand
, uint32_t address
, uint8_t *data
, uint32_t data_size
)
652 return ERROR_NAND_DEVICE_NOT_PROBED
;
654 if (address
% nand
->page_size
)
656 LOG_ERROR("writes need to be page aligned");
657 return ERROR_NAND_OPERATION_FAILED
;
660 page
= malloc(nand
->page_size
);
662 while (data_size
> 0)
664 uint32_t thisrun_size
= (data_size
> nand
->page_size
) ? nand
->page_size
: data_size
;
665 uint32_t page_address
;
667 memset(page
, 0xff, nand
->page_size
);
668 memcpy(page
, data
, thisrun_size
);
670 page_address
= address
/ nand
->page_size
;
672 nand_write_page(nand
, page_address
, page
, nand
->page_size
, NULL
, 0);
674 address
+= thisrun_size
;
675 data
+= thisrun_size
;
676 data_size
-= thisrun_size
;
685 int nand_write_page(struct nand_device
*nand
, uint32_t page
,
686 uint8_t *data
, uint32_t data_size
,
687 uint8_t *oob
, uint32_t oob_size
)
692 return ERROR_NAND_DEVICE_NOT_PROBED
;
694 block
= page
/ (nand
->erase_size
/ nand
->page_size
);
695 if (nand
->blocks
[block
].is_erased
== 1)
696 nand
->blocks
[block
].is_erased
= 0;
698 if (nand
->use_raw
|| nand
->controller
->write_page
== NULL
)
699 return nand_write_page_raw(nand
, page
, data
, data_size
, oob
, oob_size
);
701 return nand
->controller
->write_page(nand
, page
, data
, data_size
, oob
, oob_size
);
704 int nand_read_page(struct nand_device
*nand
, uint32_t page
,
705 uint8_t *data
, uint32_t data_size
,
706 uint8_t *oob
, uint32_t oob_size
)
709 return ERROR_NAND_DEVICE_NOT_PROBED
;
711 if (nand
->use_raw
|| nand
->controller
->read_page
== NULL
)
712 return nand_read_page_raw(nand
, page
, data
, data_size
, oob
, oob_size
);
714 return nand
->controller
->read_page(nand
, page
, data
, data_size
, oob
, oob_size
);
717 int nand_page_command(struct nand_device
*nand
, uint32_t page
,
718 uint8_t cmd
, bool oob_only
)
721 return ERROR_NAND_DEVICE_NOT_PROBED
;
723 if (oob_only
&& NAND_CMD_READ0
== cmd
&& nand
->page_size
<= 512)
724 cmd
= NAND_CMD_READOOB
;
726 nand
->controller
->command(nand
, cmd
);
728 if (nand
->page_size
<= 512) {
729 /* small page device */
731 /* column (always 0, we start at the beginning of a page/OOB area) */
732 nand
->controller
->address(nand
, 0x0);
735 nand
->controller
->address(nand
, page
& 0xff);
736 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
738 /* 4th cycle only on devices with more than 32 MiB */
739 if (nand
->address_cycles
>= 4)
740 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
742 /* 5th cycle only on devices with more than 8 GiB */
743 if (nand
->address_cycles
>= 5)
744 nand
->controller
->address(nand
, (page
>> 24) & 0xff);
746 /* large page device */
748 /* column (0 when we start at the beginning of a page,
749 * or 2048 for the beginning of OOB area)
751 nand
->controller
->address(nand
, 0x0);
753 nand
->controller
->address(nand
, 0x8);
755 nand
->controller
->address(nand
, 0x0);
758 nand
->controller
->address(nand
, page
& 0xff);
759 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
761 /* 5th cycle only on devices with more than 128 MiB */
762 if (nand
->address_cycles
>= 5)
763 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
765 /* large page devices need a start command if reading */
766 if (NAND_CMD_READ0
== cmd
)
767 nand
->controller
->command(nand
, NAND_CMD_READSTART
);
770 if (nand
->controller
->nand_ready
) {
771 if (!nand
->controller
->nand_ready(nand
, 100))
772 return ERROR_NAND_OPERATION_TIMEOUT
;
780 int nand_read_data_page(struct nand_device
*nand
, uint8_t *data
, uint32_t size
)
782 int retval
= ERROR_NAND_NO_BUFFER
;
784 if (nand
->controller
->read_block_data
!= NULL
)
785 retval
= (nand
->controller
->read_block_data
)(nand
, data
, size
);
787 if (ERROR_NAND_NO_BUFFER
== retval
) {
789 int incr
= (nand
->device
->options
& NAND_BUSWIDTH_16
) ? 2 : 1;
792 for (i
= 0; retval
== ERROR_OK
&& i
< size
; i
+= incr
) {
793 retval
= nand
->controller
->read_data(nand
, data
);
801 int nand_read_page_raw(struct nand_device
*nand
, uint32_t page
,
802 uint8_t *data
, uint32_t data_size
,
803 uint8_t *oob
, uint32_t oob_size
)
807 retval
= nand_page_command(nand
, page
, NAND_CMD_READ0
, !data
);
808 if (ERROR_OK
!= retval
)
812 nand_read_data_page(nand
, data
, data_size
);
815 nand_read_data_page(nand
, oob
, oob_size
);
820 int nand_write_data_page(struct nand_device
*nand
, uint8_t *data
, uint32_t size
)
822 int retval
= ERROR_NAND_NO_BUFFER
;
824 if (nand
->controller
->write_block_data
!= NULL
)
825 retval
= (nand
->controller
->write_block_data
)(nand
, data
, size
);
827 if (ERROR_NAND_NO_BUFFER
== retval
) {
828 bool is16bit
= nand
->device
->options
& NAND_BUSWIDTH_16
;
829 uint32_t incr
= is16bit
? 2 : 1;
833 for (i
= 0; i
< size
; i
+= incr
) {
835 write_data
= le_to_h_u16(data
);
839 retval
= nand
->controller
->write_data(nand
, write_data
);
840 if (ERROR_OK
!= retval
)
850 int nand_write_finish(struct nand_device
*nand
)
855 nand
->controller
->command(nand
, NAND_CMD_PAGEPROG
);
857 retval
= nand
->controller
->nand_ready
?
858 nand
->controller
->nand_ready(nand
, 100) :
859 nand_poll_ready(nand
, 100);
861 return ERROR_NAND_OPERATION_TIMEOUT
;
863 retval
= nand_read_status(nand
, &status
);
864 if (ERROR_OK
!= retval
) {
865 LOG_ERROR("couldn't read status");
866 return ERROR_NAND_OPERATION_FAILED
;
869 if (status
& NAND_STATUS_FAIL
) {
870 LOG_ERROR("write operation didn't pass, status: 0x%2.2x",
872 return ERROR_NAND_OPERATION_FAILED
;
878 int nand_write_page_raw(struct nand_device
*nand
, uint32_t page
,
879 uint8_t *data
, uint32_t data_size
,
880 uint8_t *oob
, uint32_t oob_size
)
884 retval
= nand_page_command(nand
, page
, NAND_CMD_SEQIN
, !data
);
885 if (ERROR_OK
!= retval
)
889 retval
= nand_write_data_page(nand
, data
, data_size
);
890 if (ERROR_OK
!= retval
) {
891 LOG_ERROR("Unable to write data to NAND device");
897 retval
= nand_write_data_page(nand
, oob
, oob_size
);
898 if (ERROR_OK
!= retval
) {
899 LOG_ERROR("Unable to write OOB data to NAND device");
904 return nand_write_finish(nand
);
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