- split fileio handling into fileio part and image handling
[openocd.git] / src / flash / non_cfi.c
1 /***************************************************************************
2 * Copyright (C) 2007 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
20 #ifdef HAVE_CONFIG_H
21 #include "config.h"
22 #endif
23
24 #include <stdlib.h>
25
26 #include "log.h"
27
28 #include "flash.h"
29 #include "cfi.h"
30 #include "non_cfi.h"
31
32 /* non-CFI compatible flashes */
33 non_cfi_t non_cfi_flashes[] = {
34 {
35 .mfr = CFI_MFR_SST,
36 .id = 0xd4,
37 .pri_id = 0x02,
38 .dev_size = 0x10,
39 .interface_desc = 0x0,
40 .max_buf_write_size = 0x0,
41 .num_erase_regions = 1,
42 .erase_region_info =
43 {
44 0x0010000f,
45 0x00000000
46 }
47 },
48 {
49 .mfr = CFI_MFR_SST,
50 .id = 0xd5,
51 .pri_id = 0x02,
52 .dev_size = 0x11,
53 .interface_desc = 0x0,
54 .max_buf_write_size = 0x0,
55 .num_erase_regions = 1,
56 .erase_region_info =
57 {
58 0x0010001f,
59 0x00000000
60 }
61 },
62 {
63 .mfr = CFI_MFR_SST,
64 .id = 0xd6,
65 .pri_id = 0x02,
66 .dev_size = 0x12,
67 .interface_desc = 0x0,
68 .max_buf_write_size = 0x0,
69 .num_erase_regions = 1,
70 .erase_region_info =
71 {
72 0x0010003f,
73 0x00000000
74 }
75 },
76 {
77 .mfr = CFI_MFR_SST,
78 .id = 0xd7,
79 .pri_id = 0x02,
80 .dev_size = 0x13,
81 .interface_desc = 0x0,
82 .max_buf_write_size = 0x0,
83 .num_erase_regions = 1,
84 .erase_region_info =
85 {
86 0x0010007f,
87 0x00000000
88 }
89 },
90 {
91 .mfr = 0,
92 .id = 0,
93 }
94 };
95
96 void cfi_fixup_non_cfi(flash_bank_t *bank, void *param)
97 {
98 cfi_flash_bank_t *cfi_info = bank->driver_priv;
99 non_cfi_t *non_cfi = non_cfi_flashes;
100
101 while (non_cfi->mfr)
102 {
103 if ((cfi_info->manufacturer == non_cfi->mfr)
104 && (cfi_info->device_id == non_cfi->id))
105 {
106 break;
107 }
108 non_cfi++;
109 }
110
111 cfi_info->not_cfi = 1;
112
113 /* fill in defaults for non-critical data */
114 cfi_info->vcc_min = 0x0;
115 cfi_info->vcc_max = 0x0;
116 cfi_info->vpp_min = 0x0;
117 cfi_info->vpp_max = 0x0;
118 cfi_info->word_write_timeout_typ = 0x0;
119 cfi_info->buf_write_timeout_typ = 0x0;
120 cfi_info->block_erase_timeout_typ = 0x0;
121 cfi_info->chip_erase_timeout_typ = 0x0;
122 cfi_info->word_write_timeout_max = 0x0;
123 cfi_info->buf_write_timeout_max = 0x0;
124 cfi_info->block_erase_timeout_max = 0x0;
125 cfi_info->chip_erase_timeout_max = 0x0;
126
127 cfi_info->qry[0] = 'Q';
128 cfi_info->qry[1] = 'R';
129 cfi_info->qry[2] = 'Y';
130
131 cfi_info->pri_id = non_cfi->pri_id;
132 cfi_info->pri_addr = 0x0;
133 cfi_info->alt_id = 0x0;
134 cfi_info->alt_addr = 0x0;
135 cfi_info->alt_ext = NULL;
136
137 cfi_info->interface_desc = non_cfi->interface_desc;
138 cfi_info->max_buf_write_size = non_cfi->max_buf_write_size;
139 cfi_info->num_erase_regions = non_cfi->num_erase_regions;
140 cfi_info->erase_region_info = non_cfi->erase_region_info;
141
142 if (cfi_info->pri_id == 0x2)
143 {
144 cfi_spansion_pri_ext_t *pri_ext = malloc(sizeof(cfi_spansion_pri_ext_t));
145
146 pri_ext->pri[0] = 'P';
147 pri_ext->pri[1] = 'R';
148 pri_ext->pri[2] = 'I';
149
150 pri_ext->major_version = '1';
151 pri_ext->minor_version = '0';
152
153 pri_ext->SiliconRevision = 0x0;
154 pri_ext->EraseSuspend = 0x0;
155 pri_ext->EraseSuspend = 0x0;
156 pri_ext->BlkProt = 0x0;
157 pri_ext->TmpBlkUnprotect = 0x0;
158 pri_ext->BlkProtUnprot = 0x0;
159 pri_ext->SimultaneousOps = 0x0;
160 pri_ext->BurstMode = 0x0;
161 pri_ext->PageMode = 0x0;
162 pri_ext->VppMin = 0x0;
163 pri_ext->VppMax = 0x0;
164 pri_ext->TopBottom = 0x0;
165
166 pri_ext->_reversed_geometry = 0;
167
168 cfi_info->pri_ext = pri_ext;
169 } else if ((cfi_info->pri_id == 0x1) || (cfi_info->pri_id == 0x3))
170 {
171 ERROR("BUG: non-CFI flashes using the Intel commandset are not yet supported");
172 exit(-1);
173 }
174 }
175

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