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FLASH/NOR: Remove useless file str9x.h
[openocd.git] / src / flash / nor / avrf.c
1 /***************************************************************************
2 * Copyright (C) 2009 by Simon Qian *
3 * SimonQian@SimonQian.com *
4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
20 #ifdef HAVE_CONFIG_H
21 #include "config.h"
22 #endif
23
24 #include "imp.h"
25 #include <target/avrt.h>
26
27
28 /* AVR_JTAG_Instructions */
29 #define AVR_JTAG_INS_LEN 4
30 // Public Instructions:
31 #define AVR_JTAG_INS_EXTEST 0x00
32 #define AVR_JTAG_INS_IDCODE 0x01
33 #define AVR_JTAG_INS_SAMPLE_PRELOAD 0x02
34 #define AVR_JTAG_INS_BYPASS 0x0F
35 // AVR Specified Public Instructions:
36 #define AVR_JTAG_INS_AVR_RESET 0x0C
37 #define AVR_JTAG_INS_PROG_ENABLE 0x04
38 #define AVR_JTAG_INS_PROG_COMMANDS 0x05
39 #define AVR_JTAG_INS_PROG_PAGELOAD 0x06
40 #define AVR_JTAG_INS_PROG_PAGEREAD 0x07
41
42 // Data Registers:
43 #define AVR_JTAG_REG_Bypass_Len 1
44 #define AVR_JTAG_REG_DeviceID_Len 32
45
46 #define AVR_JTAG_REG_Reset_Len 1
47 #define AVR_JTAG_REG_JTAGID_Len 32
48 #define AVR_JTAG_REG_ProgrammingEnable_Len 16
49 #define AVR_JTAG_REG_ProgrammingCommand_Len 15
50 #define AVR_JTAG_REG_FlashDataByte_Len 16
51
52 struct avrf_type
53 {
54 char name[15];
55 uint16_t chip_id;
56 int flash_page_size;
57 int flash_page_num;
58 int eeprom_page_size;
59 int eeprom_page_num;
60 };
61
62 struct avrf_flash_bank
63 {
64 int ppage_size;
65 int probed;
66 };
67
68 static struct avrf_type avft_chips_info[] =
69 {
70 /* name, chip_id, flash_page_size, flash_page_num,
71 * eeprom_page_size, eeprom_page_num
72 */
73 {"atmega128", 0x9702, 256, 512, 8, 512},
74 {"at90can128", 0x9781, 256, 512, 8, 512},
75 };
76
77 /* avr program functions */
78 static int avr_jtag_reset(struct avr_common *avr, uint32_t reset)
79 {
80 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_AVR_RESET);
81 avr_jtag_senddat(avr->jtag_info.tap, NULL, reset ,AVR_JTAG_REG_Reset_Len);
82
83 return ERROR_OK;
84 }
85
86 static int avr_jtag_read_jtagid(struct avr_common *avr, uint32_t *id)
87 {
88 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_IDCODE);
89 avr_jtag_senddat(avr->jtag_info.tap, id, 0, AVR_JTAG_REG_JTAGID_Len);
90
91 return ERROR_OK;
92 }
93
94 static int avr_jtagprg_enterprogmode(struct avr_common *avr)
95 {
96 avr_jtag_reset(avr, 1);
97
98 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
99 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xA370, AVR_JTAG_REG_ProgrammingEnable_Len);
100
101 return ERROR_OK;
102 }
103
104 static int avr_jtagprg_leaveprogmode(struct avr_common *avr)
105 {
106 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
107 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2300, AVR_JTAG_REG_ProgrammingCommand_Len);
108 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3300, AVR_JTAG_REG_ProgrammingCommand_Len);
109
110 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
111 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0, AVR_JTAG_REG_ProgrammingEnable_Len);
112
113 avr_jtag_reset(avr, 0);
114
115 return ERROR_OK;
116 }
117
118 static int avr_jtagprg_chiperase(struct avr_common *avr)
119 {
120 uint32_t poll_value;
121
122 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
123 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2380, AVR_JTAG_REG_ProgrammingCommand_Len);
124 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3180, AVR_JTAG_REG_ProgrammingCommand_Len);
125 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
126 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
127
128 do {
129 poll_value = 0;
130 avr_jtag_senddat(avr->jtag_info.tap, &poll_value, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
131 if (ERROR_OK != mcu_execute_queue())
132 {
133 return ERROR_FAIL;
134 }
135 LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
136 } while (!(poll_value & 0x0200));
137
138 return ERROR_OK;
139 }
140
141 static int avr_jtagprg_writeflashpage(struct avr_common *avr, uint8_t *page_buf, uint32_t buf_size, uint32_t addr, uint32_t page_size)
142 {
143 uint32_t i, poll_value;
144
145 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
146 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2310, AVR_JTAG_REG_ProgrammingCommand_Len);
147
148 // load addr high byte
149 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x0700 | ((addr >> 9) & 0xFF), AVR_JTAG_REG_ProgrammingCommand_Len);
150
151 // load addr low byte
152 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x0300 | ((addr >> 1) & 0xFF), AVR_JTAG_REG_ProgrammingCommand_Len);
153
154 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_PAGELOAD);
155
156 for (i = 0; i < page_size; i++)
157 {
158 if (i < buf_size)
159 {
160 avr_jtag_senddat(avr->jtag_info.tap, NULL, page_buf[i], 8);
161 }
162 else
163 {
164 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xFF, 8);
165 }
166 }
167
168 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
169
170 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
171 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3500, AVR_JTAG_REG_ProgrammingCommand_Len);
172 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
173 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
174
175 do {
176 poll_value = 0;
177 avr_jtag_senddat(avr->jtag_info.tap, &poll_value, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
178 if (ERROR_OK != mcu_execute_queue())
179 {
180 return ERROR_FAIL;
181 }
182 LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
183 } while (!(poll_value & 0x0200));
184
185 return ERROR_OK;
186 }
187
188 FLASH_BANK_COMMAND_HANDLER(avrf_flash_bank_command)
189 {
190 struct avrf_flash_bank *avrf_info;
191
192 if (CMD_ARGC < 6)
193 {
194 LOG_WARNING("incomplete flash_bank avr configuration");
195 return ERROR_FLASH_BANK_INVALID;
196 }
197
198 avrf_info = malloc(sizeof(struct avrf_flash_bank));
199 bank->driver_priv = avrf_info;
200
201 avrf_info->probed = 0;
202
203 return ERROR_OK;
204 }
205
206 static int avrf_erase(struct flash_bank *bank, int first, int last)
207 {
208 struct target *target = bank->target;
209 struct avr_common *avr = target->arch_info;
210 int status;
211
212 LOG_DEBUG("%s", __FUNCTION__);
213
214 if (target->state != TARGET_HALTED)
215 {
216 LOG_ERROR("Target not halted");
217 return ERROR_TARGET_NOT_HALTED;
218 }
219
220 status = avr_jtagprg_enterprogmode(avr);
221 if (status != ERROR_OK)
222 return status;
223
224 status = avr_jtagprg_chiperase(avr);
225 if (status != ERROR_OK)
226 return status;
227
228 return avr_jtagprg_leaveprogmode(avr);
229 }
230
231 static int avrf_protect(struct flash_bank *bank, int set, int first, int last)
232 {
233 LOG_INFO("%s", __FUNCTION__);
234 return ERROR_OK;
235 }
236
237 static int avrf_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
238 {
239 struct target *target = bank->target;
240 struct avr_common *avr = target->arch_info;
241 uint32_t cur_size, cur_buffer_size, page_size;
242
243 if (bank->target->state != TARGET_HALTED)
244 {
245 LOG_ERROR("Target not halted");
246 return ERROR_TARGET_NOT_HALTED;
247 }
248
249 page_size = bank->sectors[0].size;
250 if ((offset % page_size) != 0)
251 {
252 LOG_WARNING("offset 0x%" PRIx32 " breaks required %" PRIu32 "-byte alignment", offset, page_size);
253 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
254 }
255
256 LOG_DEBUG("offset is 0x%08" PRIx32 "", offset);
257 LOG_DEBUG("count is %" PRId32 "", count);
258
259 if (ERROR_OK != avr_jtagprg_enterprogmode(avr))
260 {
261 return ERROR_FAIL;
262 }
263
264 cur_size = 0;
265 while (count > 0)
266 {
267 if (count > page_size)
268 {
269 cur_buffer_size = page_size;
270 }
271 else
272 {
273 cur_buffer_size = count;
274 }
275 avr_jtagprg_writeflashpage(avr, buffer + cur_size, cur_buffer_size, offset + cur_size, page_size);
276 count -= cur_buffer_size;
277 cur_size += cur_buffer_size;
278
279 keep_alive();
280 }
281
282 return avr_jtagprg_leaveprogmode(avr);
283 }
284
285 #define EXTRACT_MFG(X) (((X) & 0xffe) >> 1)
286 #define EXTRACT_PART(X) (((X) & 0xffff000) >> 12)
287 #define EXTRACT_VER(X) (((X) & 0xf0000000) >> 28)
288 static int avrf_probe(struct flash_bank *bank)
289 {
290 struct target *target = bank->target;
291 struct avrf_flash_bank *avrf_info = bank->driver_priv;
292 struct avr_common *avr = target->arch_info;
293 struct avrf_type *avr_info = NULL;
294 int i;
295 uint32_t device_id;
296
297 if (bank->target->state != TARGET_HALTED)
298 {
299 LOG_ERROR("Target not halted");
300 return ERROR_TARGET_NOT_HALTED;
301 }
302
303 avrf_info->probed = 0;
304
305 avr_jtag_read_jtagid(avr, &device_id);
306 if (ERROR_OK != mcu_execute_queue())
307 {
308 return ERROR_FAIL;
309 }
310
311 LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
312 if (EXTRACT_MFG(device_id) != 0x1F)
313 {
314 LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected", EXTRACT_MFG(device_id), 0x1F);
315 }
316
317 for (i = 0; i < (int)ARRAY_SIZE(avft_chips_info); i++)
318 {
319 if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id))
320 {
321 avr_info = &avft_chips_info[i];
322 LOG_INFO("target device is %s", avr_info->name);
323 break;
324 }
325 }
326
327 if (avr_info != NULL)
328 {
329 if (bank->sectors)
330 {
331 free(bank->sectors);
332 bank->sectors = NULL;
333 }
334
335 // chip found
336 bank->base = 0x00000000;
337 bank->size = (avr_info->flash_page_size * avr_info->flash_page_num);
338 bank->num_sectors = avr_info->flash_page_num;
339 bank->sectors = malloc(sizeof(struct flash_sector) * avr_info->flash_page_num);
340
341 for (i = 0; i < avr_info->flash_page_num; i++)
342 {
343 bank->sectors[i].offset = i * avr_info->flash_page_size;
344 bank->sectors[i].size = avr_info->flash_page_size;
345 bank->sectors[i].is_erased = -1;
346 bank->sectors[i].is_protected = 1;
347 }
348
349 avrf_info->probed = 1;
350 return ERROR_OK;
351 }
352 else
353 {
354 // chip not supported
355 LOG_ERROR("0x%" PRIx32 " is not support for avr", EXTRACT_PART(device_id));
356
357 avrf_info->probed = 1;
358 return ERROR_FAIL;
359 }
360 }
361
362 static int avrf_auto_probe(struct flash_bank *bank)
363 {
364 struct avrf_flash_bank *avrf_info = bank->driver_priv;
365 if (avrf_info->probed)
366 return ERROR_OK;
367 return avrf_probe(bank);
368 }
369
370 static int avrf_protect_check(struct flash_bank *bank)
371 {
372 LOG_INFO("%s", __FUNCTION__);
373 return ERROR_OK;
374 }
375
376 static int avrf_info(struct flash_bank *bank, char *buf, int buf_size)
377 {
378 struct target *target = bank->target;
379 struct avr_common *avr = target->arch_info;
380 struct avrf_type *avr_info = NULL;
381 int i;
382 uint32_t device_id;
383
384 if (bank->target->state != TARGET_HALTED)
385 {
386 LOG_ERROR("Target not halted");
387 return ERROR_TARGET_NOT_HALTED;
388 }
389
390 avr_jtag_read_jtagid(avr, &device_id);
391 if (ERROR_OK != mcu_execute_queue())
392 {
393 return ERROR_FAIL;
394 }
395
396 LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
397 if (EXTRACT_MFG(device_id) != 0x1F)
398 {
399 LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected", EXTRACT_MFG(device_id), 0x1F);
400 }
401
402 for (i = 0; i < (int)ARRAY_SIZE(avft_chips_info); i++)
403 {
404 if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id))
405 {
406 avr_info = &avft_chips_info[i];
407 LOG_INFO("target device is %s", avr_info->name);
408
409 break;
410 }
411 }
412
413 if (avr_info != NULL)
414 {
415 // chip found
416 snprintf(buf, buf_size, "%s - Rev: 0x%" PRIx32 "", avr_info->name, EXTRACT_VER(device_id));
417 return ERROR_OK;
418 }
419 else
420 {
421 // chip not supported
422 snprintf(buf, buf_size, "Cannot identify target as a avr\n");
423 return ERROR_FLASH_OPERATION_FAILED;
424 }
425 }
426
427 static int avrf_mass_erase(struct flash_bank *bank)
428 {
429 struct target *target = bank->target;
430 struct avr_common *avr = target->arch_info;
431
432 if (target->state != TARGET_HALTED)
433 {
434 LOG_ERROR("Target not halted");
435 return ERROR_TARGET_NOT_HALTED;
436 }
437
438 if ((ERROR_OK != avr_jtagprg_enterprogmode(avr))
439 || (ERROR_OK != avr_jtagprg_chiperase(avr))
440 || (ERROR_OK != avr_jtagprg_leaveprogmode(avr)))
441 {
442 return ERROR_FAIL;
443 }
444
445 return ERROR_OK;
446 }
447
448 COMMAND_HANDLER(avrf_handle_mass_erase_command)
449 {
450 int i;
451
452 if (CMD_ARGC < 1)
453 {
454 command_print(CMD_CTX, "avr mass_erase <bank>");
455 return ERROR_OK;
456 }
457
458 struct flash_bank *bank;
459 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
460 if (ERROR_OK != retval)
461 return retval;
462
463 if (avrf_mass_erase(bank) == ERROR_OK)
464 {
465 /* set all sectors as erased */
466 for (i = 0; i < bank->num_sectors; i++)
467 {
468 bank->sectors[i].is_erased = 1;
469 }
470
471 command_print(CMD_CTX, "avr mass erase complete");
472 }
473 else
474 {
475 command_print(CMD_CTX, "avr mass erase failed");
476 }
477
478 LOG_DEBUG("%s", __FUNCTION__);
479 return ERROR_OK;
480 }
481
482 static const struct command_registration avrf_exec_command_handlers[] = {
483 {
484 .name = "mass_erase",
485 .handler = avrf_handle_mass_erase_command,
486 .mode = COMMAND_EXEC,
487 .help = "erase entire device",
488 },
489 COMMAND_REGISTRATION_DONE
490 };
491 static const struct command_registration avrf_command_handlers[] = {
492 {
493 .name = "avrf",
494 .mode = COMMAND_ANY,
495 .help = "AVR flash command group",
496 .chain = avrf_exec_command_handlers,
497 },
498 COMMAND_REGISTRATION_DONE
499 };
500
501 struct flash_driver avr_flash = {
502 .name = "avr",
503 .commands = avrf_command_handlers,
504 .flash_bank_command = avrf_flash_bank_command,
505 .erase = avrf_erase,
506 .protect = avrf_protect,
507 .write = avrf_write,
508 .read = default_flash_read,
509 .probe = avrf_probe,
510 .auto_probe = avrf_auto_probe,
511 .erase_check = default_flash_mem_blank_check,
512 .protect_check = avrf_protect_check,
513 .info = avrf_info,
514 };
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