src/flash/nor/avrf.c

   1 /***************************************************************************
   2  *   Copyright (C) 2009 by Simon Qian                                      *
   3  *   SimonQian@SimonQian.com                                               *
   4  *                                                                         *
   5  *   This program is free software; you can redistribute it and/or modify  *
   6  *   it under the terms of the GNU General Public License as published by  *
   7  *   the Free Software Foundation; either version 2 of the License, or     *
   8  *   (at your option) any later version.                                   *
   9  *                                                                         *
  10  *   This program is distributed in the hope that it will be useful,       *
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  13  *   GNU General Public License for more details.                          *
  14  *                                                                         *
  15  *   You should have received a copy of the GNU General Public License     *
  16  *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  17  ***************************************************************************/
  18
  19 #ifdef HAVE_CONFIG_H
  20 #include "config.h"
  21 #endif
  22
  23 #include "imp.h"
  24 #include <target/avrt.h>
  25
  26 /* AVR_JTAG_Instructions */
  27 #define AVR_JTAG_INS_LEN                                        4
  28 /* Public Instructions: */
  29 #define AVR_JTAG_INS_EXTEST                                     0x00
  30 #define AVR_JTAG_INS_IDCODE                                     0x01
  31 #define AVR_JTAG_INS_SAMPLE_PRELOAD                             0x02
  32 #define AVR_JTAG_INS_BYPASS                                     0x0F
  33 /* AVR Specified Public Instructions: */
  34 #define AVR_JTAG_INS_AVR_RESET                                  0x0C
  35 #define AVR_JTAG_INS_PROG_ENABLE                                0x04
  36 #define AVR_JTAG_INS_PROG_COMMANDS                              0x05
  37 #define AVR_JTAG_INS_PROG_PAGELOAD                              0x06
  38 #define AVR_JTAG_INS_PROG_PAGEREAD                              0x07
  39
  40 /* Data Registers: */
  41 #define AVR_JTAG_REG_BYPASS_LEN                                 1
  42 #define AVR_JTAG_REG_DEVICEID_LEN                               32
  43
  44 #define AVR_JTAG_REG_RESET_LEN                                  1
  45 #define AVR_JTAG_REG_JTAGID_LEN                                 32
  46 #define AVR_JTAG_REG_PROGRAMMING_ENABLE_LEN                     16
  47 #define AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN                    15
  48 #define AVR_JTAG_REG_FLASH_DATA_BYTE_LEN                        16
  49
  50 struct avrf_type {
  51         char name[15];
  52         uint16_t chip_id;
  53         int flash_page_size;
  54         int flash_page_num;
  55         int eeprom_page_size;
  56         int eeprom_page_num;
  57 };
  58
  59 struct avrf_flash_bank {
  60         int ppage_size;
  61         bool probed;
  62 };
  63
  64 static const struct avrf_type avft_chips_info[] = {
  65 /*      name, chip_id,  flash_page_size, flash_page_num,
  66  *                      eeprom_page_size, eeprom_page_num
  67  */
  68         {"atmega128", 0x9702, 256, 512, 8, 512},
  69         {"atmega128rfa1", 0xa701, 128, 512, 8, 512},
  70         {"atmega256rfr2", 0xa802, 256, 1024, 8, 1024},
  71         {"at90can128", 0x9781, 256, 512, 8, 512},
  72         {"at90usb128", 0x9782, 256, 512, 8, 512},
  73         {"atmega164p", 0x940a, 128, 128, 4, 128},
  74         {"atmega324p", 0x9508, 128, 256, 4, 256},
  75         {"atmega324pa", 0x9511, 128, 256, 4, 256},
  76         {"atmega644p", 0x960a, 256, 256, 8, 256},
  77         {"atmega1284p", 0x9705, 256, 512, 8, 512},
  78 };
  79
  80 /* avr program functions */
  81 static int avr_jtag_reset(struct avr_common *avr, uint32_t reset)
  82 {
  83         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_AVR_RESET);
  84         avr_jtag_senddat(avr->jtag_info.tap, NULL, reset, AVR_JTAG_REG_RESET_LEN);
  85
  86         return ERROR_OK;
  87 }
  88
  89 static int avr_jtag_read_jtagid(struct avr_common *avr, uint32_t *id)
  90 {
  91         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_IDCODE);
  92         avr_jtag_senddat(avr->jtag_info.tap, id, 0, AVR_JTAG_REG_JTAGID_LEN);
  93
  94         return ERROR_OK;
  95 }
  96
  97 static int avr_jtagprg_enterprogmode(struct avr_common *avr)
  98 {
  99         avr_jtag_reset(avr, 1);
 100
 101         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
 102         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xA370, AVR_JTAG_REG_PROGRAMMING_ENABLE_LEN);
 103
 104         return ERROR_OK;
 105 }
 106
 107 static int avr_jtagprg_leaveprogmode(struct avr_common *avr)
 108 {
 109         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
 110         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2300, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 111         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3300, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 112
 113         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
 114         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0, AVR_JTAG_REG_PROGRAMMING_ENABLE_LEN);
 115
 116         avr_jtag_reset(avr, 0);
 117
 118         return ERROR_OK;
 119 }
 120
 121 static int avr_jtagprg_chiperase(struct avr_common *avr)
 122 {
 123         uint32_t poll_value;
 124
 125         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
 126         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2380, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 127         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3180, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 128         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 129         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 130
 131         do {
 132                 poll_value = 0;
 133                 avr_jtag_senddat(avr->jtag_info.tap,
 134                         &poll_value,
 135                         0x3380,
 136                         AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 137                 if (mcu_execute_queue() != ERROR_OK)
 138                         return ERROR_FAIL;
 139                 LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
 140         } while (!(poll_value & 0x0200));
 141
 142         return ERROR_OK;
 143 }
 144
 145 static int avr_jtagprg_writeflashpage(struct avr_common *avr,
 146         const bool ext_addressing,
 147         const uint8_t *page_buf,
 148         uint32_t buf_size,
 149         uint32_t addr,
 150         uint32_t page_size)
 151 {
 152         uint32_t poll_value;
 153
 154         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
 155         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2310, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 156
 157         /* load extended high byte */
 158         if (ext_addressing)
 159                 avr_jtag_senddat(avr->jtag_info.tap,
 160                         NULL,
 161                         0x0b00 | ((addr >> 17) & 0xFF),
 162                         AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 163
 164         /* load addr high byte */
 165         avr_jtag_senddat(avr->jtag_info.tap,
 166                 NULL,
 167                 0x0700 | ((addr >> 9) & 0xFF),
 168                 AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 169
 170         /* load addr low byte */
 171         avr_jtag_senddat(avr->jtag_info.tap,
 172                 NULL,
 173                 0x0300 | ((addr >> 1) & 0xFF),
 174                 AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 175
 176         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_PAGELOAD);
 177
 178         for (uint32_t i = 0; i < page_size; i++) {
 179                 if (i < buf_size)
 180                         avr_jtag_senddat(avr->jtag_info.tap, NULL, page_buf[i], 8);
 181                 else
 182                         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xFF, 8);
 183         }
 184
 185         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
 186
 187         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 188         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3500, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 189         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 190         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 191
 192         do {
 193                 poll_value = 0;
 194                 avr_jtag_senddat(avr->jtag_info.tap,
 195                         &poll_value,
 196                         0x3700,
 197                         AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 198                 if (mcu_execute_queue() != ERROR_OK)
 199                         return ERROR_FAIL;
 200                 LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
 201         } while (!(poll_value & 0x0200));
 202
 203         return ERROR_OK;
 204 }
 205
 206 FLASH_BANK_COMMAND_HANDLER(avrf_flash_bank_command)
 207 {
 208         struct avrf_flash_bank *avrf_info;
 209
 210         if (CMD_ARGC < 6)
 211                 return ERROR_COMMAND_SYNTAX_ERROR;
 212
 213         avrf_info = malloc(sizeof(struct avrf_flash_bank));
 214         bank->driver_priv = avrf_info;
 215
 216         avrf_info->probed = false;
 217
 218         return ERROR_OK;
 219 }
 220
 221 static int avrf_erase(struct flash_bank *bank, unsigned int first,
 222                 unsigned int last)
 223 {
 224         struct target *target = bank->target;
 225         struct avr_common *avr = target->arch_info;
 226         int status;
 227
 228         LOG_DEBUG("%s", __func__);
 229
 230         if (target->state != TARGET_HALTED) {
 231                 LOG_ERROR("Target not halted");
 232                 return ERROR_TARGET_NOT_HALTED;
 233         }
 234
 235         status = avr_jtagprg_enterprogmode(avr);
 236         if (status != ERROR_OK)
 237                 return status;
 238
 239         status = avr_jtagprg_chiperase(avr);
 240         if (status != ERROR_OK)
 241                 return status;
 242
 243         return avr_jtagprg_leaveprogmode(avr);
 244 }
 245
 246 static int avrf_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
 247 {
 248         struct target *target = bank->target;
 249         struct avr_common *avr = target->arch_info;
 250         uint32_t cur_size, cur_buffer_size, page_size;
 251         bool ext_addressing;
 252
 253         if (bank->target->state != TARGET_HALTED) {
 254                 LOG_ERROR("Target not halted");
 255                 return ERROR_TARGET_NOT_HALTED;
 256         }
 257
 258         page_size = bank->sectors[0].size;
 259         if ((offset % page_size) != 0) {
 260                 LOG_WARNING("offset 0x%" PRIx32 " breaks required %" PRIu32 "-byte alignment",
 261                         offset,
 262                         page_size);
 263                 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
 264         }
 265
 266         LOG_DEBUG("offset is 0x%08" PRIx32 "", offset);
 267         LOG_DEBUG("count is %" PRIu32 "", count);
 268
 269         if (avr_jtagprg_enterprogmode(avr) != ERROR_OK)
 270                 return ERROR_FAIL;
 271
 272         if (bank->size > 0x20000)
 273                 ext_addressing = true;
 274         else
 275                 ext_addressing = false;
 276
 277         cur_size = 0;
 278         while (count > 0) {
 279                 if (count > page_size)
 280                         cur_buffer_size = page_size;
 281                 else
 282                         cur_buffer_size = count;
 283                 avr_jtagprg_writeflashpage(avr,
 284                         ext_addressing,
 285                         buffer + cur_size,
 286                         cur_buffer_size,
 287                         offset + cur_size,
 288                         page_size);
 289                 count -= cur_buffer_size;
 290                 cur_size += cur_buffer_size;
 291
 292                 keep_alive();
 293         }
 294
 295         return avr_jtagprg_leaveprogmode(avr);
 296 }
 297
 298 #define EXTRACT_MFG(X)  (((X) & 0xffe) >> 1)
 299 #define EXTRACT_PART(X) (((X) & 0xffff000) >> 12)
 300 #define EXTRACT_VER(X)  (((X) & 0xf0000000) >> 28)
 301
 302 static int avrf_probe(struct flash_bank *bank)
 303 {
 304         struct target *target = bank->target;
 305         struct avrf_flash_bank *avrf_info = bank->driver_priv;
 306         struct avr_common *avr = target->arch_info;
 307         const struct avrf_type *avr_info = NULL;
 308         uint32_t device_id;
 309
 310         if (bank->target->state != TARGET_HALTED) {
 311                 LOG_ERROR("Target not halted");
 312                 return ERROR_TARGET_NOT_HALTED;
 313         }
 314
 315         avrf_info->probed = false;
 316
 317         avr_jtag_read_jtagid(avr, &device_id);
 318         if (mcu_execute_queue() != ERROR_OK)
 319                 return ERROR_FAIL;
 320
 321         LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
 322         if (EXTRACT_MFG(device_id) != 0x1F)
 323                 LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected",
 324                         EXTRACT_MFG(device_id),
 325                         0x1F);
 326
 327         for (size_t i = 0; i < ARRAY_SIZE(avft_chips_info); i++) {
 328                 if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id)) {
 329                         avr_info = &avft_chips_info[i];
 330                         LOG_INFO("target device is %s", avr_info->name);
 331                         break;
 332                 }
 333         }
 334
 335         if (avr_info) {
 336                 free(bank->sectors);
 337
 338                 /* chip found */
 339                 bank->base = 0x00000000;
 340                 bank->size = (avr_info->flash_page_size * avr_info->flash_page_num);
 341                 bank->num_sectors = avr_info->flash_page_num;
 342                 bank->sectors = malloc(sizeof(struct flash_sector) * avr_info->flash_page_num);
 343
 344                 for (int i = 0; i < avr_info->flash_page_num; i++) {
 345                         bank->sectors[i].offset = i * avr_info->flash_page_size;
 346                         bank->sectors[i].size = avr_info->flash_page_size;
 347                         bank->sectors[i].is_erased = -1;
 348                         bank->sectors[i].is_protected = -1;
 349                 }
 350
 351                 avrf_info->probed = true;
 352                 return ERROR_OK;
 353         } else {
 354                 /* chip not supported */
 355                 LOG_ERROR("0x%" PRIx32 " is not support for avr", EXTRACT_PART(device_id));
 356
 357                 avrf_info->probed = true;
 358                 return ERROR_FAIL;
 359         }
 360 }
 361
 362 static int avrf_auto_probe(struct flash_bank *bank)
 363 {
 364         struct avrf_flash_bank *avrf_info = bank->driver_priv;
 365         if (avrf_info->probed)
 366                 return ERROR_OK;
 367         return avrf_probe(bank);
 368 }
 369
 370 static int avrf_info(struct flash_bank *bank, struct command_invocation *cmd)
 371 {
 372         struct target *target = bank->target;
 373         struct avr_common *avr = target->arch_info;
 374         const struct avrf_type *avr_info = NULL;
 375         uint32_t device_id;
 376
 377         if (bank->target->state != TARGET_HALTED) {
 378                 LOG_ERROR("Target not halted");
 379                 return ERROR_TARGET_NOT_HALTED;
 380         }
 381
 382         avr_jtag_read_jtagid(avr, &device_id);
 383         if (mcu_execute_queue() != ERROR_OK)
 384                 return ERROR_FAIL;
 385
 386         LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
 387         if (EXTRACT_MFG(device_id) != 0x1F)
 388                 LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected",
 389                         EXTRACT_MFG(device_id),
 390                         0x1F);
 391
 392         for (size_t i = 0; i < ARRAY_SIZE(avft_chips_info); i++) {
 393                 if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id)) {
 394                         avr_info = &avft_chips_info[i];
 395                         LOG_INFO("target device is %s", avr_info->name);
 396
 397                         break;
 398                 }
 399         }
 400
 401         if (avr_info) {
 402                 /* chip found */
 403                 command_print_sameline(cmd, "%s - Rev: 0x%" PRIx32 "", avr_info->name,
 404                         EXTRACT_VER(device_id));
 405                 return ERROR_OK;
 406         } else {
 407                 /* chip not supported */
 408                 command_print_sameline(cmd, "Cannot identify target as a avr\n");
 409                 return ERROR_FLASH_OPERATION_FAILED;
 410         }
 411 }
 412
 413 static int avrf_mass_erase(struct flash_bank *bank)
 414 {
 415         struct target *target = bank->target;
 416         struct avr_common *avr = target->arch_info;
 417
 418         if (target->state != TARGET_HALTED) {
 419                 LOG_ERROR("Target not halted");
 420                 return ERROR_TARGET_NOT_HALTED;
 421         }
 422
 423         if ((avr_jtagprg_enterprogmode(avr) != ERROR_OK)
 424             || (avr_jtagprg_chiperase(avr) != ERROR_OK)
 425             || (avr_jtagprg_leaveprogmode(avr) != ERROR_OK))
 426                 return ERROR_FAIL;
 427
 428         return ERROR_OK;
 429 }
 430
 431 COMMAND_HANDLER(avrf_handle_mass_erase_command)
 432 {
 433         if (CMD_ARGC < 1)
 434                 return ERROR_COMMAND_SYNTAX_ERROR;
 435
 436         struct flash_bank *bank;
 437         int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
 438         if (retval != ERROR_OK)
 439                 return retval;
 440
 441         if (avrf_mass_erase(bank) == ERROR_OK)
 442                 command_print(CMD, "avr mass erase complete");
 443         else
 444                 command_print(CMD, "avr mass erase failed");
 445
 446         LOG_DEBUG("%s", __func__);
 447         return ERROR_OK;
 448 }
 449
 450 static const struct command_registration avrf_exec_command_handlers[] = {
 451         {
 452                 .name = "mass_erase",
 453                 .usage = "<bank>",
 454                 .handler = avrf_handle_mass_erase_command,
 455                 .mode = COMMAND_EXEC,
 456                 .help = "erase entire device",
 457         },
 458         COMMAND_REGISTRATION_DONE
 459 };
 460 static const struct command_registration avrf_command_handlers[] = {
 461         {
 462                 .name = "avrf",
 463                 .mode = COMMAND_ANY,
 464                 .help = "AVR flash command group",
 465                 .usage = "",
 466                 .chain = avrf_exec_command_handlers,
 467         },
 468         COMMAND_REGISTRATION_DONE
 469 };
 470
 471 const struct flash_driver avr_flash = {
 472         .name = "avr",
 473         .commands = avrf_command_handlers,
 474         .flash_bank_command = avrf_flash_bank_command,
 475         .erase = avrf_erase,
 476         .write = avrf_write,
 477         .read = default_flash_read,
 478         .probe = avrf_probe,
 479         .auto_probe = avrf_auto_probe,
 480         .erase_check = default_flash_blank_check,
 481         .info = avrf_info,
 482         .free_driver_priv = default_flash_free_driver_priv,
 483 };