stm32l4x: Fix stm32l4x dual bank support
[openocd.git] / src / flash / nor / avrf.c
1 /***************************************************************************
2 * Copyright (C) 2009 by Simon Qian *
3 * SimonQian@SimonQian.com *
4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
17 ***************************************************************************/
18
19 #ifdef HAVE_CONFIG_H
20 #include "config.h"
21 #endif
22
23 #include "imp.h"
24 #include <target/avrt.h>
25
26 /* AVR_JTAG_Instructions */
27 #define AVR_JTAG_INS_LEN 4
28 /* Public Instructions: */
29 #define AVR_JTAG_INS_EXTEST 0x00
30 #define AVR_JTAG_INS_IDCODE 0x01
31 #define AVR_JTAG_INS_SAMPLE_PRELOAD 0x02
32 #define AVR_JTAG_INS_BYPASS 0x0F
33 /* AVR Specified Public Instructions: */
34 #define AVR_JTAG_INS_AVR_RESET 0x0C
35 #define AVR_JTAG_INS_PROG_ENABLE 0x04
36 #define AVR_JTAG_INS_PROG_COMMANDS 0x05
37 #define AVR_JTAG_INS_PROG_PAGELOAD 0x06
38 #define AVR_JTAG_INS_PROG_PAGEREAD 0x07
39
40 /* Data Registers: */
41 #define AVR_JTAG_REG_Bypass_Len 1
42 #define AVR_JTAG_REG_DeviceID_Len 32
43
44 #define AVR_JTAG_REG_Reset_Len 1
45 #define AVR_JTAG_REG_JTAGID_Len 32
46 #define AVR_JTAG_REG_ProgrammingEnable_Len 16
47 #define AVR_JTAG_REG_ProgrammingCommand_Len 15
48 #define AVR_JTAG_REG_FlashDataByte_Len 16
49
50 struct avrf_type {
51 char name[15];
52 uint16_t chip_id;
53 int flash_page_size;
54 int flash_page_num;
55 int eeprom_page_size;
56 int eeprom_page_num;
57 };
58
59 struct avrf_flash_bank {
60 int ppage_size;
61 int probed;
62 };
63
64 static const struct avrf_type avft_chips_info[] = {
65 /* name, chip_id, flash_page_size, flash_page_num,
66 * eeprom_page_size, eeprom_page_num
67 */
68 {"atmega128", 0x9702, 256, 512, 8, 512},
69 {"atmega128rfa1", 0xa701, 128, 512, 8, 512},
70 {"at90can128", 0x9781, 256, 512, 8, 512},
71 {"at90usb128", 0x9782, 256, 512, 8, 512},
72 {"atmega164p", 0x940a, 128, 128, 4, 128},
73 {"atmega324p", 0x9508, 128, 256, 4, 256},
74 {"atmega324pa", 0x9511, 128, 256, 4, 256},
75 {"atmega644p", 0x960a, 256, 256, 8, 256},
76 {"atmega1284p", 0x9705, 256, 512, 8, 512},
77 };
78
79 /* avr program functions */
80 static int avr_jtag_reset(struct avr_common *avr, uint32_t reset)
81 {
82 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_AVR_RESET);
83 avr_jtag_senddat(avr->jtag_info.tap, NULL, reset, AVR_JTAG_REG_Reset_Len);
84
85 return ERROR_OK;
86 }
87
88 static int avr_jtag_read_jtagid(struct avr_common *avr, uint32_t *id)
89 {
90 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_IDCODE);
91 avr_jtag_senddat(avr->jtag_info.tap, id, 0, AVR_JTAG_REG_JTAGID_Len);
92
93 return ERROR_OK;
94 }
95
96 static int avr_jtagprg_enterprogmode(struct avr_common *avr)
97 {
98 avr_jtag_reset(avr, 1);
99
100 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
101 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xA370, AVR_JTAG_REG_ProgrammingEnable_Len);
102
103 return ERROR_OK;
104 }
105
106 static int avr_jtagprg_leaveprogmode(struct avr_common *avr)
107 {
108 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
109 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2300, AVR_JTAG_REG_ProgrammingCommand_Len);
110 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3300, AVR_JTAG_REG_ProgrammingCommand_Len);
111
112 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
113 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0, AVR_JTAG_REG_ProgrammingEnable_Len);
114
115 avr_jtag_reset(avr, 0);
116
117 return ERROR_OK;
118 }
119
120 static int avr_jtagprg_chiperase(struct avr_common *avr)
121 {
122 uint32_t poll_value;
123
124 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
125 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2380, AVR_JTAG_REG_ProgrammingCommand_Len);
126 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3180, AVR_JTAG_REG_ProgrammingCommand_Len);
127 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
128 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
129
130 do {
131 poll_value = 0;
132 avr_jtag_senddat(avr->jtag_info.tap,
133 &poll_value,
134 0x3380,
135 AVR_JTAG_REG_ProgrammingCommand_Len);
136 if (ERROR_OK != mcu_execute_queue())
137 return ERROR_FAIL;
138 LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
139 } while (!(poll_value & 0x0200));
140
141 return ERROR_OK;
142 }
143
144 static int avr_jtagprg_writeflashpage(struct avr_common *avr,
145 const uint8_t *page_buf,
146 uint32_t buf_size,
147 uint32_t addr,
148 uint32_t page_size)
149 {
150 uint32_t i, poll_value;
151
152 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
153 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2310, AVR_JTAG_REG_ProgrammingCommand_Len);
154
155 /* load addr high byte */
156 avr_jtag_senddat(avr->jtag_info.tap,
157 NULL,
158 0x0700 | ((addr >> 9) & 0xFF),
159 AVR_JTAG_REG_ProgrammingCommand_Len);
160
161 /* load addr low byte */
162 avr_jtag_senddat(avr->jtag_info.tap,
163 NULL,
164 0x0300 | ((addr >> 1) & 0xFF),
165 AVR_JTAG_REG_ProgrammingCommand_Len);
166
167 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_PAGELOAD);
168
169 for (i = 0; i < page_size; i++) {
170 if (i < buf_size)
171 avr_jtag_senddat(avr->jtag_info.tap, NULL, page_buf[i], 8);
172 else
173 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xFF, 8);
174 }
175
176 avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
177
178 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
179 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3500, AVR_JTAG_REG_ProgrammingCommand_Len);
180 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
181 avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
182
183 do {
184 poll_value = 0;
185 avr_jtag_senddat(avr->jtag_info.tap,
186 &poll_value,
187 0x3700,
188 AVR_JTAG_REG_ProgrammingCommand_Len);
189 if (ERROR_OK != mcu_execute_queue())
190 return ERROR_FAIL;
191 LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
192 } while (!(poll_value & 0x0200));
193
194 return ERROR_OK;
195 }
196
197 FLASH_BANK_COMMAND_HANDLER(avrf_flash_bank_command)
198 {
199 struct avrf_flash_bank *avrf_info;
200
201 if (CMD_ARGC < 6)
202 return ERROR_COMMAND_SYNTAX_ERROR;
203
204 avrf_info = malloc(sizeof(struct avrf_flash_bank));
205 bank->driver_priv = avrf_info;
206
207 avrf_info->probed = 0;
208
209 return ERROR_OK;
210 }
211
212 static int avrf_erase(struct flash_bank *bank, int first, int last)
213 {
214 struct target *target = bank->target;
215 struct avr_common *avr = target->arch_info;
216 int status;
217
218 LOG_DEBUG("%s", __func__);
219
220 if (target->state != TARGET_HALTED) {
221 LOG_ERROR("Target not halted");
222 return ERROR_TARGET_NOT_HALTED;
223 }
224
225 status = avr_jtagprg_enterprogmode(avr);
226 if (status != ERROR_OK)
227 return status;
228
229 status = avr_jtagprg_chiperase(avr);
230 if (status != ERROR_OK)
231 return status;
232
233 return avr_jtagprg_leaveprogmode(avr);
234 }
235
236 static int avrf_protect(struct flash_bank *bank, int set, int first, int last)
237 {
238 LOG_INFO("%s", __func__);
239 return ERROR_OK;
240 }
241
242 static int avrf_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
243 {
244 struct target *target = bank->target;
245 struct avr_common *avr = target->arch_info;
246 uint32_t cur_size, cur_buffer_size, page_size;
247
248 if (bank->target->state != TARGET_HALTED) {
249 LOG_ERROR("Target not halted");
250 return ERROR_TARGET_NOT_HALTED;
251 }
252
253 page_size = bank->sectors[0].size;
254 if ((offset % page_size) != 0) {
255 LOG_WARNING("offset 0x%" PRIx32 " breaks required %" PRIu32 "-byte alignment",
256 offset,
257 page_size);
258 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
259 }
260
261 LOG_DEBUG("offset is 0x%08" PRIx32 "", offset);
262 LOG_DEBUG("count is %" PRId32 "", count);
263
264 if (ERROR_OK != avr_jtagprg_enterprogmode(avr))
265 return ERROR_FAIL;
266
267 cur_size = 0;
268 while (count > 0) {
269 if (count > page_size)
270 cur_buffer_size = page_size;
271 else
272 cur_buffer_size = count;
273 avr_jtagprg_writeflashpage(avr,
274 buffer + cur_size,
275 cur_buffer_size,
276 offset + cur_size,
277 page_size);
278 count -= cur_buffer_size;
279 cur_size += cur_buffer_size;
280
281 keep_alive();
282 }
283
284 return avr_jtagprg_leaveprogmode(avr);
285 }
286
287 #define EXTRACT_MFG(X) (((X) & 0xffe) >> 1)
288 #define EXTRACT_PART(X) (((X) & 0xffff000) >> 12)
289 #define EXTRACT_VER(X) (((X) & 0xf0000000) >> 28)
290
291 static int avrf_probe(struct flash_bank *bank)
292 {
293 struct target *target = bank->target;
294 struct avrf_flash_bank *avrf_info = bank->driver_priv;
295 struct avr_common *avr = target->arch_info;
296 const struct avrf_type *avr_info = NULL;
297 int i;
298 uint32_t device_id;
299
300 if (bank->target->state != TARGET_HALTED) {
301 LOG_ERROR("Target not halted");
302 return ERROR_TARGET_NOT_HALTED;
303 }
304
305 avrf_info->probed = 0;
306
307 avr_jtag_read_jtagid(avr, &device_id);
308 if (ERROR_OK != mcu_execute_queue())
309 return ERROR_FAIL;
310
311 LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
312 if (EXTRACT_MFG(device_id) != 0x1F)
313 LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected",
314 EXTRACT_MFG(device_id),
315 0x1F);
316
317 for (i = 0; i < (int)ARRAY_SIZE(avft_chips_info); i++) {
318 if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id)) {
319 avr_info = &avft_chips_info[i];
320 LOG_INFO("target device is %s", avr_info->name);
321 break;
322 }
323 }
324
325 if (avr_info != NULL) {
326 if (bank->sectors) {
327 free(bank->sectors);
328 bank->sectors = NULL;
329 }
330
331 /* chip found */
332 bank->base = 0x00000000;
333 bank->size = (avr_info->flash_page_size * avr_info->flash_page_num);
334 bank->num_sectors = avr_info->flash_page_num;
335 bank->sectors = malloc(sizeof(struct flash_sector) * avr_info->flash_page_num);
336
337 for (i = 0; i < avr_info->flash_page_num; i++) {
338 bank->sectors[i].offset = i * avr_info->flash_page_size;
339 bank->sectors[i].size = avr_info->flash_page_size;
340 bank->sectors[i].is_erased = -1;
341 bank->sectors[i].is_protected = 1;
342 }
343
344 avrf_info->probed = 1;
345 return ERROR_OK;
346 } else {
347 /* chip not supported */
348 LOG_ERROR("0x%" PRIx32 " is not support for avr", EXTRACT_PART(device_id));
349
350 avrf_info->probed = 1;
351 return ERROR_FAIL;
352 }
353 }
354
355 static int avrf_auto_probe(struct flash_bank *bank)
356 {
357 struct avrf_flash_bank *avrf_info = bank->driver_priv;
358 if (avrf_info->probed)
359 return ERROR_OK;
360 return avrf_probe(bank);
361 }
362
363 static int avrf_protect_check(struct flash_bank *bank)
364 {
365 LOG_INFO("%s", __func__);
366 return ERROR_OK;
367 }
368
369 static int avrf_info(struct flash_bank *bank, char *buf, int buf_size)
370 {
371 struct target *target = bank->target;
372 struct avr_common *avr = target->arch_info;
373 const struct avrf_type *avr_info = NULL;
374 int i;
375 uint32_t device_id;
376
377 if (bank->target->state != TARGET_HALTED) {
378 LOG_ERROR("Target not halted");
379 return ERROR_TARGET_NOT_HALTED;
380 }
381
382 avr_jtag_read_jtagid(avr, &device_id);
383 if (ERROR_OK != mcu_execute_queue())
384 return ERROR_FAIL;
385
386 LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
387 if (EXTRACT_MFG(device_id) != 0x1F)
388 LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected",
389 EXTRACT_MFG(device_id),
390 0x1F);
391
392 for (i = 0; i < (int)ARRAY_SIZE(avft_chips_info); i++) {
393 if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id)) {
394 avr_info = &avft_chips_info[i];
395 LOG_INFO("target device is %s", avr_info->name);
396
397 break;
398 }
399 }
400
401 if (avr_info != NULL) {
402 /* chip found */
403 snprintf(buf, buf_size, "%s - Rev: 0x%" PRIx32 "", avr_info->name,
404 EXTRACT_VER(device_id));
405 return ERROR_OK;
406 } else {
407 /* chip not supported */
408 snprintf(buf, buf_size, "Cannot identify target as a avr\n");
409 return ERROR_FLASH_OPERATION_FAILED;
410 }
411 }
412
413 static int avrf_mass_erase(struct flash_bank *bank)
414 {
415 struct target *target = bank->target;
416 struct avr_common *avr = target->arch_info;
417
418 if (target->state != TARGET_HALTED) {
419 LOG_ERROR("Target not halted");
420 return ERROR_TARGET_NOT_HALTED;
421 }
422
423 if ((ERROR_OK != avr_jtagprg_enterprogmode(avr))
424 || (ERROR_OK != avr_jtagprg_chiperase(avr))
425 || (ERROR_OK != avr_jtagprg_leaveprogmode(avr)))
426 return ERROR_FAIL;
427
428 return ERROR_OK;
429 }
430
431 COMMAND_HANDLER(avrf_handle_mass_erase_command)
432 {
433 int i;
434
435 if (CMD_ARGC < 1)
436 return ERROR_COMMAND_SYNTAX_ERROR;
437
438 struct flash_bank *bank;
439 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
440 if (ERROR_OK != retval)
441 return retval;
442
443 if (avrf_mass_erase(bank) == ERROR_OK) {
444 /* set all sectors as erased */
445 for (i = 0; i < bank->num_sectors; i++)
446 bank->sectors[i].is_erased = 1;
447
448 command_print(CMD_CTX, "avr mass erase complete");
449 } else
450 command_print(CMD_CTX, "avr mass erase failed");
451
452 LOG_DEBUG("%s", __func__);
453 return ERROR_OK;
454 }
455
456 static const struct command_registration avrf_exec_command_handlers[] = {
457 {
458 .name = "mass_erase",
459 .usage = "<bank>",
460 .handler = avrf_handle_mass_erase_command,
461 .mode = COMMAND_EXEC,
462 .help = "erase entire device",
463 },
464 COMMAND_REGISTRATION_DONE
465 };
466 static const struct command_registration avrf_command_handlers[] = {
467 {
468 .name = "avrf",
469 .mode = COMMAND_ANY,
470 .help = "AVR flash command group",
471 .usage = "",
472 .chain = avrf_exec_command_handlers,
473 },
474 COMMAND_REGISTRATION_DONE
475 };
476
477 struct flash_driver avr_flash = {
478 .name = "avr",
479 .commands = avrf_command_handlers,
480 .flash_bank_command = avrf_flash_bank_command,
481 .erase = avrf_erase,
482 .protect = avrf_protect,
483 .write = avrf_write,
484 .read = default_flash_read,
485 .probe = avrf_probe,
486 .auto_probe = avrf_auto_probe,
487 .erase_check = default_flash_blank_check,
488 .protect_check = avrf_protect_check,
489 .info = avrf_info,
490 .free_driver_priv = default_flash_free_driver_priv,
491 };

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)