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jtag: linuxgpiod: drop extra parenthesis
[openocd.git] / src / flash / nor / em357.c
1 // SPDX-License-Identifier: GPL-2.0-or-later
2
3 /***************************************************************************
4 * Copyright (C) 2005 by Dominic Rath *
5 * Dominic.Rath@gmx.de *
6 * *
7 * Copyright (C) 2008 by Spencer Oliver *
8 * spen@spen-soft.co.uk *
9 *
10 * Copyright (C) 2011 by Erik Botö
11 * erik.boto@pelagicore.com
12 ***************************************************************************/
13
14 #ifdef HAVE_CONFIG_H
15 #include "config.h"
16 #endif
17
18 #include "imp.h"
19 #include <helper/binarybuffer.h>
20 #include <target/algorithm.h>
21 #include <target/armv7m.h>
22
23 /* em357 register locations */
24
25 #define EM357_FLASH_ACR 0x40008000
26 #define EM357_FLASH_KEYR 0x40008004
27 #define EM357_FLASH_OPTKEYR 0x40008008
28 #define EM357_FLASH_SR 0x4000800C
29 #define EM357_FLASH_CR 0x40008010
30 #define EM357_FLASH_AR 0x40008014
31 #define EM357_FLASH_OBR 0x4000801C
32 #define EM357_FLASH_WRPR 0x40008020
33
34 #define EM357_FPEC_CLK 0x4000402c
35 /* option byte location */
36
37 #define EM357_OB_RDP 0x08040800
38 #define EM357_OB_WRP0 0x08040808
39 #define EM357_OB_WRP1 0x0804080A
40 #define EM357_OB_WRP2 0x0804080C
41
42 /* FLASH_CR register bits */
43
44 #define FLASH_PG (1 << 0)
45 #define FLASH_PER (1 << 1)
46 #define FLASH_MER (1 << 2)
47 #define FLASH_OPTPG (1 << 4)
48 #define FLASH_OPTER (1 << 5)
49 #define FLASH_STRT (1 << 6)
50 #define FLASH_LOCK (1 << 7)
51 #define FLASH_OPTWRE (1 << 9)
52
53 /* FLASH_SR register bits */
54
55 #define FLASH_BSY (1 << 0)
56 #define FLASH_PGERR (1 << 2)
57 #define FLASH_WRPRTERR (1 << 4)
58 #define FLASH_EOP (1 << 5)
59
60 /* EM357_FLASH_OBR bit definitions (reading) */
61
62 #define OPT_ERROR 0
63 #define OPT_READOUT 1
64
65 /* register unlock keys */
66
67 #define KEY1 0x45670123
68 #define KEY2 0xCDEF89AB
69
70 struct em357_options {
71 uint16_t RDP;
72 uint16_t user_options;
73 uint16_t protection[3];
74 };
75
76 struct em357_flash_bank {
77 struct em357_options option_bytes;
78 int ppage_size;
79 bool probed;
80 };
81
82 static int em357_mass_erase(struct flash_bank *bank);
83
84 /* flash bank em357 <base> <size> 0 0 <target#>
85 */
86 FLASH_BANK_COMMAND_HANDLER(em357_flash_bank_command)
87 {
88 struct em357_flash_bank *em357_info;
89
90 if (CMD_ARGC < 6)
91 return ERROR_COMMAND_SYNTAX_ERROR;
92
93 em357_info = malloc(sizeof(struct em357_flash_bank));
94 bank->driver_priv = em357_info;
95
96 em357_info->probed = false;
97
98 return ERROR_OK;
99 }
100
101 static inline int em357_get_flash_status(struct flash_bank *bank, uint32_t *status)
102 {
103 struct target *target = bank->target;
104 return target_read_u32(target, EM357_FLASH_SR, status);
105 }
106
107 static int em357_wait_status_busy(struct flash_bank *bank, int timeout)
108 {
109 struct target *target = bank->target;
110 uint32_t status;
111 int retval = ERROR_OK;
112
113 /* wait for busy to clear */
114 for (;; ) {
115 retval = em357_get_flash_status(bank, &status);
116 if (retval != ERROR_OK)
117 return retval;
118 LOG_DEBUG("status: 0x%" PRIx32 "", status);
119 if ((status & FLASH_BSY) == 0)
120 break;
121 if (timeout-- <= 0) {
122 LOG_ERROR("timed out waiting for flash");
123 return ERROR_FAIL;
124 }
125 alive_sleep(1);
126 }
127
128 if (status & FLASH_WRPRTERR) {
129 LOG_ERROR("em357 device protected");
130 retval = ERROR_FAIL;
131 }
132
133 if (status & FLASH_PGERR) {
134 LOG_ERROR("em357 device programming failed");
135 retval = ERROR_FAIL;
136 }
137
138 /* Clear but report errors */
139 if (status & (FLASH_WRPRTERR | FLASH_PGERR)) {
140 /* If this operation fails, we ignore it and report the original
141 * retval
142 */
143 target_write_u32(target, EM357_FLASH_SR, FLASH_WRPRTERR | FLASH_PGERR);
144 }
145 return retval;
146 }
147
148 static int em357_read_options(struct flash_bank *bank)
149 {
150 uint32_t optiondata;
151 struct em357_flash_bank *em357_info = NULL;
152 struct target *target = bank->target;
153
154 em357_info = bank->driver_priv;
155
156 /* read current option bytes */
157 int retval = target_read_u32(target, EM357_FLASH_OBR, &optiondata);
158 if (retval != ERROR_OK)
159 return retval;
160
161 em357_info->option_bytes.user_options = (uint16_t)0xFFFC | ((optiondata >> 2) & 0x03);
162 em357_info->option_bytes.RDP = (optiondata & (1 << OPT_READOUT)) ? 0xFFFF : 0x5AA5;
163
164 if (optiondata & (1 << OPT_READOUT))
165 LOG_INFO("Device Security Bit Set");
166
167 /* each bit refers to a 4bank protection */
168 retval = target_read_u32(target, EM357_FLASH_WRPR, &optiondata);
169 if (retval != ERROR_OK)
170 return retval;
171
172 em357_info->option_bytes.protection[0] = (uint16_t)optiondata;
173 em357_info->option_bytes.protection[1] = (uint16_t)(optiondata >> 8);
174 em357_info->option_bytes.protection[2] = (uint16_t)(optiondata >> 16);
175
176 return ERROR_OK;
177 }
178
179 static int em357_erase_options(struct flash_bank *bank)
180 {
181 struct em357_flash_bank *em357_info = NULL;
182 struct target *target = bank->target;
183
184 em357_info = bank->driver_priv;
185
186 /* read current options */
187 em357_read_options(bank);
188
189 /* unlock flash registers */
190 int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
191 if (retval != ERROR_OK)
192 return retval;
193
194 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
195 if (retval != ERROR_OK)
196 return retval;
197
198 /* unlock option flash registers */
199 retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY1);
200 if (retval != ERROR_OK)
201 return retval;
202 retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY2);
203 if (retval != ERROR_OK)
204 return retval;
205
206 /* erase option bytes */
207 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_OPTER | FLASH_OPTWRE);
208 if (retval != ERROR_OK)
209 return retval;
210 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_OPTER | FLASH_STRT | FLASH_OPTWRE);
211 if (retval != ERROR_OK)
212 return retval;
213
214 retval = em357_wait_status_busy(bank, 10);
215 if (retval != ERROR_OK)
216 return retval;
217
218 /* clear readout protection and complementary option bytes
219 * this will also force a device unlock if set */
220 em357_info->option_bytes.RDP = 0x5AA5;
221
222 return ERROR_OK;
223 }
224
225 static int em357_write_options(struct flash_bank *bank)
226 {
227 struct em357_flash_bank *em357_info = NULL;
228 struct target *target = bank->target;
229
230 em357_info = bank->driver_priv;
231
232 /* unlock flash registers */
233 int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
234 if (retval != ERROR_OK)
235 return retval;
236 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
237 if (retval != ERROR_OK)
238 return retval;
239
240 /* unlock option flash registers */
241 retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY1);
242 if (retval != ERROR_OK)
243 return retval;
244 retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY2);
245 if (retval != ERROR_OK)
246 return retval;
247
248 /* program option bytes */
249 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_OPTPG | FLASH_OPTWRE);
250 if (retval != ERROR_OK)
251 return retval;
252
253 retval = em357_wait_status_busy(bank, 10);
254 if (retval != ERROR_OK)
255 return retval;
256
257 /* write protection byte 1 */
258 retval = target_write_u16(target, EM357_OB_WRP0, em357_info->option_bytes.protection[0]);
259 if (retval != ERROR_OK)
260 return retval;
261
262 retval = em357_wait_status_busy(bank, 10);
263 if (retval != ERROR_OK)
264 return retval;
265
266 /* write protection byte 2 */
267 retval = target_write_u16(target, EM357_OB_WRP1, em357_info->option_bytes.protection[1]);
268 if (retval != ERROR_OK)
269 return retval;
270
271 retval = em357_wait_status_busy(bank, 10);
272 if (retval != ERROR_OK)
273 return retval;
274
275 /* write protection byte 3 */
276 retval = target_write_u16(target, EM357_OB_WRP2, em357_info->option_bytes.protection[2]);
277 if (retval != ERROR_OK)
278 return retval;
279
280 retval = em357_wait_status_busy(bank, 10);
281 if (retval != ERROR_OK)
282 return retval;
283
284 /* write readout protection bit */
285 retval = target_write_u16(target, EM357_OB_RDP, em357_info->option_bytes.RDP);
286 if (retval != ERROR_OK)
287 return retval;
288
289 retval = em357_wait_status_busy(bank, 10);
290 if (retval != ERROR_OK)
291 return retval;
292
293 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
294 if (retval != ERROR_OK)
295 return retval;
296
297 return ERROR_OK;
298 }
299
300 static int em357_protect_check(struct flash_bank *bank)
301 {
302 struct target *target = bank->target;
303 struct em357_flash_bank *em357_info = bank->driver_priv;
304
305 uint32_t protection;
306 int i, s;
307 int num_bits;
308 int set;
309
310 if (target->state != TARGET_HALTED) {
311 LOG_ERROR("Target not halted");
312 return ERROR_TARGET_NOT_HALTED;
313 }
314
315 /* each bit refers to a 4bank protection (bit 0-23) */
316 int retval = target_read_u32(target, EM357_FLASH_WRPR, &protection);
317 if (retval != ERROR_OK)
318 return retval;
319
320 /* each protection bit is for 4 * 2K pages */
321 num_bits = (bank->num_sectors / em357_info->ppage_size);
322
323 for (i = 0; i < num_bits; i++) {
324 set = 1;
325 if (protection & (1 << i))
326 set = 0;
327
328 for (s = 0; s < em357_info->ppage_size; s++)
329 bank->sectors[(i * em357_info->ppage_size) + s].is_protected = set;
330 }
331
332 return ERROR_OK;
333 }
334
335 static int em357_erase(struct flash_bank *bank, unsigned int first,
336 unsigned int last)
337 {
338 struct target *target = bank->target;
339
340 if (bank->target->state != TARGET_HALTED) {
341 LOG_ERROR("Target not halted");
342 return ERROR_TARGET_NOT_HALTED;
343 }
344
345 if ((first == 0) && (last == (bank->num_sectors - 1)))
346 return em357_mass_erase(bank);
347
348 /* Enable FPEC clock */
349 target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
350
351 /* unlock flash registers */
352 int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
353 if (retval != ERROR_OK)
354 return retval;
355 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
356 if (retval != ERROR_OK)
357 return retval;
358
359 for (unsigned int i = first; i <= last; i++) {
360 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PER);
361 if (retval != ERROR_OK)
362 return retval;
363 retval = target_write_u32(target, EM357_FLASH_AR,
364 bank->base + bank->sectors[i].offset);
365 if (retval != ERROR_OK)
366 return retval;
367 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PER | FLASH_STRT);
368 if (retval != ERROR_OK)
369 return retval;
370
371 retval = em357_wait_status_busy(bank, 100);
372 if (retval != ERROR_OK)
373 return retval;
374 }
375
376 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
377 if (retval != ERROR_OK)
378 return retval;
379
380 return ERROR_OK;
381 }
382
383 static int em357_protect(struct flash_bank *bank, int set, unsigned int first,
384 unsigned int last)
385 {
386 struct em357_flash_bank *em357_info = NULL;
387 struct target *target = bank->target;
388 uint16_t prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
389 int reg, bit;
390 int status;
391 uint32_t protection;
392
393 em357_info = bank->driver_priv;
394
395 if (target->state != TARGET_HALTED) {
396 LOG_ERROR("Target not halted");
397 return ERROR_TARGET_NOT_HALTED;
398 }
399
400 if ((first % em357_info->ppage_size) != 0) {
401 LOG_WARNING("aligned start protect sector to a %d sector boundary",
402 em357_info->ppage_size);
403 first = first - (first % em357_info->ppage_size);
404 }
405 if (((last + 1) % em357_info->ppage_size) != 0) {
406 LOG_WARNING("aligned end protect sector to a %d sector boundary",
407 em357_info->ppage_size);
408 last++;
409 last = last - (last % em357_info->ppage_size);
410 last--;
411 }
412
413 /* each bit refers to a 4bank protection */
414 int retval = target_read_u32(target, EM357_FLASH_WRPR, &protection);
415 if (retval != ERROR_OK)
416 return retval;
417
418 prot_reg[0] = (uint16_t)protection;
419 prot_reg[1] = (uint16_t)(protection >> 8);
420 prot_reg[2] = (uint16_t)(protection >> 16);
421
422 for (unsigned int i = first; i <= last; i++) {
423 reg = (i / em357_info->ppage_size) / 8;
424 bit = (i / em357_info->ppage_size) - (reg * 8);
425
426 LOG_WARNING("reg, bit: %d, %d", reg, bit);
427 if (set)
428 prot_reg[reg] &= ~(1 << bit);
429 else
430 prot_reg[reg] |= (1 << bit);
431 }
432
433 status = em357_erase_options(bank);
434 if (retval != ERROR_OK)
435 return status;
436
437 em357_info->option_bytes.protection[0] = prot_reg[0];
438 em357_info->option_bytes.protection[1] = prot_reg[1];
439 em357_info->option_bytes.protection[2] = prot_reg[2];
440
441 return em357_write_options(bank);
442 }
443
444 static int em357_write_block(struct flash_bank *bank, const uint8_t *buffer,
445 uint32_t offset, uint32_t count)
446 {
447 struct target *target = bank->target;
448 uint32_t buffer_size = 16384;
449 struct working_area *write_algorithm;
450 struct working_area *source;
451 uint32_t address = bank->base + offset;
452 struct reg_param reg_params[4];
453 struct armv7m_algorithm armv7m_info;
454 int retval = ERROR_OK;
455
456 /* see contrib/loaders/flash/stm32x.s for src, the same is used here except for
457 * a modified *_FLASH_BASE */
458
459 static const uint8_t em357_flash_write_code[] = {
460 /* #define EM357_FLASH_CR_OFFSET 0x10
461 * #define EM357_FLASH_SR_OFFSET 0x0C
462 * write: */
463 0x08, 0x4c, /* ldr r4, EM357_FLASH_BASE */
464 0x1c, 0x44, /* add r4, r3 */
465 /* write_half_word: */
466 0x01, 0x23, /* movs r3, #0x01 */
467 0x23, 0x61, /* str r3, [r4,
468 *#EM357_FLASH_CR_OFFSET] */
469 0x30, 0xf8, 0x02, 0x3b, /* ldrh r3, [r0], #0x02 */
470 0x21, 0xf8, 0x02, 0x3b, /* strh r3, [r1], #0x02 */
471 /* busy: */
472 0xe3, 0x68, /* ldr r3, [r4,
473 *#EM357_FLASH_SR_OFFSET] */
474 0x13, 0xf0, 0x01, 0x0f, /* tst r3, #0x01 */
475 0xfb, 0xd0, /* beq busy */
476 0x13, 0xf0, 0x14, 0x0f, /* tst r3, #0x14 */
477 0x01, 0xd1, /* bne exit */
478 0x01, 0x3a, /* subs r2, r2, #0x01 */
479 0xf0, 0xd1, /* bne write_half_word */
480 /* exit: */
481 0x00, 0xbe, /* bkpt #0x00 */
482 0x00, 0x80, 0x00, 0x40, /* EM357_FLASH_BASE: .word 0x40008000 */
483 };
484
485 /* flash write code */
486 if (target_alloc_working_area(target, sizeof(em357_flash_write_code),
487 &write_algorithm) != ERROR_OK) {
488 LOG_WARNING("no working area available, can't do block memory writes");
489 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
490 }
491
492 retval = target_write_buffer(target, write_algorithm->address,
493 sizeof(em357_flash_write_code), em357_flash_write_code);
494 if (retval != ERROR_OK)
495 return retval;
496
497 /* memory buffer */
498 while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
499 buffer_size /= 2;
500 if (buffer_size <= 256) {
501 /* we already allocated the writing code, but failed to get a
502 * buffer, free the algorithm */
503 target_free_working_area(target, write_algorithm);
504
505 LOG_WARNING(
506 "no large enough working area available, can't do block memory writes");
507 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
508 }
509 }
510
511 armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
512 armv7m_info.core_mode = ARM_MODE_THREAD;
513
514 init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
515 init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);
516 init_reg_param(&reg_params[2], "r2", 32, PARAM_OUT);
517 init_reg_param(&reg_params[3], "r3", 32, PARAM_IN_OUT);
518
519 while (count > 0) {
520 uint32_t thisrun_count = (count > (buffer_size / 2)) ?
521 (buffer_size / 2) : count;
522
523 retval = target_write_buffer(target, source->address, thisrun_count * 2, buffer);
524 if (retval != ERROR_OK)
525 break;
526
527 buf_set_u32(reg_params[0].value, 0, 32, source->address);
528 buf_set_u32(reg_params[1].value, 0, 32, address);
529 buf_set_u32(reg_params[2].value, 0, 32, thisrun_count);
530 buf_set_u32(reg_params[3].value, 0, 32, 0);
531
532 retval = target_run_algorithm(target, 0, NULL, 4, reg_params,
533 write_algorithm->address, 0, 10000, &armv7m_info);
534 if (retval != ERROR_OK) {
535 LOG_ERROR("error executing em357 flash write algorithm");
536 break;
537 }
538
539 if (buf_get_u32(reg_params[3].value, 0, 32) & FLASH_PGERR) {
540 LOG_ERROR("flash memory not erased before writing");
541 /* Clear but report errors */
542 target_write_u32(target, EM357_FLASH_SR, FLASH_PGERR);
543 retval = ERROR_FAIL;
544 break;
545 }
546
547 if (buf_get_u32(reg_params[3].value, 0, 32) & FLASH_WRPRTERR) {
548 LOG_ERROR("flash memory write protected");
549 /* Clear but report errors */
550 target_write_u32(target, EM357_FLASH_SR, FLASH_WRPRTERR);
551 retval = ERROR_FAIL;
552 break;
553 }
554
555 buffer += thisrun_count * 2;
556 address += thisrun_count * 2;
557 count -= thisrun_count;
558 }
559
560 target_free_working_area(target, source);
561 target_free_working_area(target, write_algorithm);
562
563 destroy_reg_param(&reg_params[0]);
564 destroy_reg_param(&reg_params[1]);
565 destroy_reg_param(&reg_params[2]);
566 destroy_reg_param(&reg_params[3]);
567
568 return retval;
569 }
570
571 static int em357_write(struct flash_bank *bank, const uint8_t *buffer,
572 uint32_t offset, uint32_t count)
573 {
574 struct target *target = bank->target;
575 uint32_t words_remaining = (count / 2);
576 uint32_t bytes_remaining = (count & 0x00000001);
577 uint32_t address = bank->base + offset;
578 uint32_t bytes_written = 0;
579 int retval;
580
581 if (bank->target->state != TARGET_HALTED) {
582 LOG_ERROR("Target not halted");
583 return ERROR_TARGET_NOT_HALTED;
584 }
585
586 if (offset & 0x1) {
587 LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
588 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
589 }
590
591 /* unlock flash registers */
592 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
593 if (retval != ERROR_OK)
594 return retval;
595 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
596 if (retval != ERROR_OK)
597 return retval;
598
599 target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
600
601 /* multiple half words (2-byte) to be programmed? */
602 if (words_remaining > 0) {
603 /* try using a block write */
604 retval = em357_write_block(bank, buffer, offset, words_remaining);
605 if (retval != ERROR_OK) {
606 if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
607 /* if block write failed (no sufficient working area),
608 * we use normal (slow) single dword accesses */
609 LOG_WARNING(
610 "couldn't use block writes, falling back to single memory accesses");
611 }
612 } else {
613 buffer += words_remaining * 2;
614 address += words_remaining * 2;
615 words_remaining = 0;
616 }
617 }
618
619 if ((retval != ERROR_OK) && (retval != ERROR_TARGET_RESOURCE_NOT_AVAILABLE))
620 return retval;
621
622 while (words_remaining > 0) {
623 uint16_t value;
624 memcpy(&value, buffer + bytes_written, sizeof(uint16_t));
625
626 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PG);
627 if (retval != ERROR_OK)
628 return retval;
629 retval = target_write_u16(target, address, value);
630 if (retval != ERROR_OK)
631 return retval;
632
633 retval = em357_wait_status_busy(bank, 5);
634 if (retval != ERROR_OK)
635 return retval;
636
637 bytes_written += 2;
638 words_remaining--;
639 address += 2;
640 }
641
642 if (bytes_remaining) {
643 uint16_t value = 0xffff;
644 memcpy(&value, buffer + bytes_written, bytes_remaining);
645
646 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PG);
647 if (retval != ERROR_OK)
648 return retval;
649 retval = target_write_u16(target, address, value);
650 if (retval != ERROR_OK)
651 return retval;
652
653 retval = em357_wait_status_busy(bank, 5);
654 if (retval != ERROR_OK)
655 return retval;
656 }
657
658 return target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
659 }
660
661 static int em357_probe(struct flash_bank *bank)
662 {
663 struct target *target = bank->target;
664 struct em357_flash_bank *em357_info = bank->driver_priv;
665 int i;
666 uint16_t num_pages;
667 int page_size;
668 uint32_t base_address = 0x08000000;
669
670 em357_info->probed = false;
671
672 switch (bank->size) {
673 case 0x10000:
674 /* 64k -- 64 1k pages */
675 num_pages = 64;
676 page_size = 1024;
677 break;
678 case 0x20000:
679 /* 128k -- 128 1k pages */
680 num_pages = 128;
681 page_size = 1024;
682 break;
683 case 0x30000:
684 /* 192k -- 96 2k pages */
685 num_pages = 96;
686 page_size = 2048;
687 break;
688 case 0x40000:
689 /* 256k -- 128 2k pages */
690 num_pages = 128;
691 page_size = 2048;
692 break;
693 case 0x80000:
694 /* 512k -- 256 2k pages */
695 num_pages = 256;
696 page_size = 2048;
697 break;
698 default:
699 LOG_WARNING("No size specified for em357 flash driver, assuming 192k!");
700 num_pages = 96;
701 page_size = 2048;
702 break;
703 }
704
705 /* Enable FPEC CLK */
706 int retval = target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
707 if (retval != ERROR_OK)
708 return retval;
709
710 em357_info->ppage_size = 4;
711
712 LOG_INFO("flash size = %d KiB", num_pages*page_size/1024);
713
714 free(bank->sectors);
715
716 bank->base = base_address;
717 bank->size = (num_pages * page_size);
718 bank->num_sectors = num_pages;
719 bank->sectors = malloc(sizeof(struct flash_sector) * num_pages);
720
721 for (i = 0; i < num_pages; i++) {
722 bank->sectors[i].offset = i * page_size;
723 bank->sectors[i].size = page_size;
724 bank->sectors[i].is_erased = -1;
725 bank->sectors[i].is_protected = 1;
726 }
727
728 em357_info->probed = true;
729
730 return ERROR_OK;
731 }
732
733 static int em357_auto_probe(struct flash_bank *bank)
734 {
735 struct em357_flash_bank *em357_info = bank->driver_priv;
736 if (em357_info->probed)
737 return ERROR_OK;
738 return em357_probe(bank);
739 }
740
741 COMMAND_HANDLER(em357_handle_lock_command)
742 {
743 struct target *target = NULL;
744 struct em357_flash_bank *em357_info = NULL;
745
746 if (CMD_ARGC < 1)
747 return ERROR_COMMAND_SYNTAX_ERROR;
748
749 struct flash_bank *bank;
750 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
751 if (retval != ERROR_OK)
752 return retval;
753
754 em357_info = bank->driver_priv;
755
756 target = bank->target;
757
758 if (target->state != TARGET_HALTED) {
759 LOG_ERROR("Target not halted");
760 return ERROR_TARGET_NOT_HALTED;
761 }
762
763 if (em357_erase_options(bank) != ERROR_OK) {
764 command_print(CMD, "em357 failed to erase options");
765 return ERROR_OK;
766 }
767
768 /* set readout protection */
769 em357_info->option_bytes.RDP = 0;
770
771 if (em357_write_options(bank) != ERROR_OK) {
772 command_print(CMD, "em357 failed to lock device");
773 return ERROR_OK;
774 }
775
776 command_print(CMD, "em357 locked");
777
778 return ERROR_OK;
779 }
780
781 COMMAND_HANDLER(em357_handle_unlock_command)
782 {
783 struct target *target = NULL;
784
785 if (CMD_ARGC < 1)
786 return ERROR_COMMAND_SYNTAX_ERROR;
787
788 struct flash_bank *bank;
789 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
790 if (retval != ERROR_OK)
791 return retval;
792
793 target = bank->target;
794
795 if (target->state != TARGET_HALTED) {
796 LOG_ERROR("Target not halted");
797 return ERROR_TARGET_NOT_HALTED;
798 }
799
800 if (em357_erase_options(bank) != ERROR_OK) {
801 command_print(CMD, "em357 failed to unlock device");
802 return ERROR_OK;
803 }
804
805 if (em357_write_options(bank) != ERROR_OK) {
806 command_print(CMD, "em357 failed to lock device");
807 return ERROR_OK;
808 }
809
810 command_print(CMD, "em357 unlocked.\n"
811 "INFO: a reset or power cycle is required "
812 "for the new settings to take effect.");
813
814 return ERROR_OK;
815 }
816
817 static int em357_mass_erase(struct flash_bank *bank)
818 {
819 struct target *target = bank->target;
820
821 if (target->state != TARGET_HALTED) {
822 LOG_ERROR("Target not halted");
823 return ERROR_TARGET_NOT_HALTED;
824 }
825
826 /* Make sure the flash clock is on */
827 target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
828
829 /* unlock option flash registers */
830 int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
831 if (retval != ERROR_OK)
832 return retval;
833 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
834 if (retval != ERROR_OK)
835 return retval;
836
837 /* mass erase flash memory */
838 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_MER);
839 if (retval != ERROR_OK)
840 return retval;
841 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_MER | FLASH_STRT);
842 if (retval != ERROR_OK)
843 return retval;
844
845 retval = em357_wait_status_busy(bank, 100);
846 if (retval != ERROR_OK)
847 return retval;
848
849 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
850 if (retval != ERROR_OK)
851 return retval;
852
853 return ERROR_OK;
854 }
855
856 COMMAND_HANDLER(em357_handle_mass_erase_command)
857 {
858 if (CMD_ARGC < 1)
859 return ERROR_COMMAND_SYNTAX_ERROR;
860
861 struct flash_bank *bank;
862 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
863 if (retval != ERROR_OK)
864 return retval;
865
866 retval = em357_mass_erase(bank);
867 if (retval == ERROR_OK)
868 command_print(CMD, "em357 mass erase complete");
869 else
870 command_print(CMD, "em357 mass erase failed");
871
872 return retval;
873 }
874
875 static const struct command_registration em357_exec_command_handlers[] = {
876 {
877 .name = "lock",
878 .usage = "<bank>",
879 .handler = em357_handle_lock_command,
880 .mode = COMMAND_EXEC,
881 .help = "Lock entire flash device.",
882 },
883 {
884 .name = "unlock",
885 .usage = "<bank>",
886 .handler = em357_handle_unlock_command,
887 .mode = COMMAND_EXEC,
888 .help = "Unlock entire protected flash device.",
889 },
890 {
891 .name = "mass_erase",
892 .usage = "<bank>",
893 .handler = em357_handle_mass_erase_command,
894 .mode = COMMAND_EXEC,
895 .help = "Erase entire flash device.",
896 },
897 COMMAND_REGISTRATION_DONE
898 };
899
900 static const struct command_registration em357_command_handlers[] = {
901 {
902 .name = "em357",
903 .mode = COMMAND_ANY,
904 .help = "em357 flash command group",
905 .usage = "",
906 .chain = em357_exec_command_handlers,
907 },
908 COMMAND_REGISTRATION_DONE
909 };
910
911 const struct flash_driver em357_flash = {
912 .name = "em357",
913 .commands = em357_command_handlers,
914 .flash_bank_command = em357_flash_bank_command,
915 .erase = em357_erase,
916 .protect = em357_protect,
917 .write = em357_write,
918 .read = default_flash_read,
919 .probe = em357_probe,
920 .auto_probe = em357_auto_probe,
921 .erase_check = default_flash_blank_check,
922 .protect_check = em357_protect_check,
923 .free_driver_priv = default_flash_free_driver_priv,
924 };
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