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[openocd.git] / src / flash / nor / em357.c
1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
4 * *
5 * Copyright (C) 2008 by Spencer Oliver *
6 * spen@spen-soft.co.uk *
7 *
8 * Copyright (C) 2011 by Erik Botö
9 * erik.boto@pelagicore.com
10 *
11 * This program is free software; you can redistribute it and/or modify *
12 * it under the terms of the GNU General Public License as published by *
13 * the Free Software Foundation; either version 2 of the License, or *
14 * (at your option) any later version. *
15 * *
16 * This program is distributed in the hope that it will be useful, *
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
19 * GNU General Public License for more details. *
20 * *
21 * You should have received a copy of the GNU General Public License *
22 * along with this program; if not, write to the *
23 * Free Software Foundation, Inc., *
24 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
25 ***************************************************************************/
26 #ifdef HAVE_CONFIG_H
27 #include "config.h"
28 #endif
29
30 #include "imp.h"
31 #include <helper/binarybuffer.h>
32 #include <target/algorithm.h>
33 #include <target/armv7m.h>
34
35 /* em357 register locations */
36
37 #define EM357_FLASH_ACR 0x40008000
38 #define EM357_FLASH_KEYR 0x40008004
39 #define EM357_FLASH_OPTKEYR 0x40008008
40 #define EM357_FLASH_SR 0x4000800C
41 #define EM357_FLASH_CR 0x40008010
42 #define EM357_FLASH_AR 0x40008014
43 #define EM357_FLASH_OBR 0x4000801C
44 #define EM357_FLASH_WRPR 0x40008020
45
46 #define EM357_FPEC_CLK 0x4000402c
47 /* option byte location */
48
49 #define EM357_OB_RDP 0x08040800
50 #define EM357_OB_WRP0 0x08040808
51 #define EM357_OB_WRP1 0x0804080A
52 #define EM357_OB_WRP2 0x0804080C
53
54 /* FLASH_CR register bits */
55
56 #define FLASH_PG (1 << 0)
57 #define FLASH_PER (1 << 1)
58 #define FLASH_MER (1 << 2)
59 #define FLASH_OPTPG (1 << 4)
60 #define FLASH_OPTER (1 << 5)
61 #define FLASH_STRT (1 << 6)
62 #define FLASH_LOCK (1 << 7)
63 #define FLASH_OPTWRE (1 << 9)
64
65 /* FLASH_SR register bits */
66
67 #define FLASH_BSY (1 << 0)
68 #define FLASH_PGERR (1 << 2)
69 #define FLASH_WRPRTERR (1 << 4)
70 #define FLASH_EOP (1 << 5)
71
72 /* EM357_FLASH_OBR bit definitions (reading) */
73
74 #define OPT_ERROR 0
75 #define OPT_READOUT 1
76
77 /* register unlock keys */
78
79 #define KEY1 0x45670123
80 #define KEY2 0xCDEF89AB
81
82 struct em357_options
83 {
84 uint16_t RDP;
85 uint16_t user_options;
86 uint16_t protection[3];
87 };
88
89 struct em357_flash_bank
90 {
91 struct em357_options option_bytes;
92 struct working_area *write_algorithm;
93 int ppage_size;
94 int probed;
95 };
96
97 static int em357_mass_erase(struct flash_bank *bank);
98
99 /* flash bank em357 <base> <size> 0 0 <target#>
100 */
101 FLASH_BANK_COMMAND_HANDLER(em357_flash_bank_command)
102 {
103 struct em357_flash_bank *em357_info;
104
105 if (CMD_ARGC < 6)
106 {
107 return ERROR_COMMAND_SYNTAX_ERROR;
108 }
109
110 em357_info = malloc(sizeof(struct em357_flash_bank));
111 bank->driver_priv = em357_info;
112
113 em357_info->write_algorithm = NULL;
114 em357_info->probed = 0;
115
116 return ERROR_OK;
117 }
118
119 static inline int em357_get_flash_status(struct flash_bank *bank, uint32_t *status)
120 {
121 struct target *target = bank->target;
122 return target_read_u32(target, EM357_FLASH_SR, status);
123 }
124
125 static int em357_wait_status_busy(struct flash_bank *bank, int timeout)
126 {
127 struct target *target = bank->target;
128 uint32_t status;
129 int retval = ERROR_OK;
130
131 /* wait for busy to clear */
132 for (;;)
133 {
134 retval = em357_get_flash_status(bank, &status);
135 if (retval != ERROR_OK)
136 return retval;
137 LOG_DEBUG("status: 0x%" PRIx32 "", status);
138 if ((status & FLASH_BSY) == 0)
139 break;
140 if (timeout-- <= 0)
141 {
142 LOG_ERROR("timed out waiting for flash");
143 return ERROR_FAIL;
144 }
145 alive_sleep(1);
146 }
147
148 if (status & FLASH_WRPRTERR)
149 {
150 LOG_ERROR("em357 device protected");
151 retval = ERROR_FAIL;
152 }
153
154 if (status & FLASH_PGERR)
155 {
156 LOG_ERROR("em357 device programming failed");
157 retval = ERROR_FAIL;
158 }
159
160 /* Clear but report errors */
161 if (status & (FLASH_WRPRTERR | FLASH_PGERR))
162 {
163 /* If this operation fails, we ignore it and report the original
164 * retval
165 */
166 target_write_u32(target, EM357_FLASH_SR, FLASH_WRPRTERR | FLASH_PGERR);
167 }
168 return retval;
169 }
170
171 static int em357_read_options(struct flash_bank *bank)
172 {
173 uint32_t optiondata;
174 struct em357_flash_bank *em357_info = NULL;
175 struct target *target = bank->target;
176
177 em357_info = bank->driver_priv;
178
179 /* read current option bytes */
180 int retval = target_read_u32(target, EM357_FLASH_OBR, &optiondata);
181 if (retval != ERROR_OK)
182 return retval;
183
184 em357_info->option_bytes.user_options = (uint16_t)0xFFFC | ((optiondata >> 2) & 0x03);
185 em357_info->option_bytes.RDP = (optiondata & (1 << OPT_READOUT)) ? 0xFFFF : 0x5AA5;
186
187 if (optiondata & (1 << OPT_READOUT))
188 LOG_INFO("Device Security Bit Set");
189
190 /* each bit refers to a 4bank protection */
191 retval = target_read_u32(target, EM357_FLASH_WRPR, &optiondata);
192 if (retval != ERROR_OK)
193 return retval;
194
195 em357_info->option_bytes.protection[0] = (uint16_t)optiondata;
196 em357_info->option_bytes.protection[1] = (uint16_t)(optiondata >> 8);
197 em357_info->option_bytes.protection[2] = (uint16_t)(optiondata >> 16);
198
199 return ERROR_OK;
200 }
201
202 static int em357_erase_options(struct flash_bank *bank)
203 {
204 struct em357_flash_bank *em357_info = NULL;
205 struct target *target = bank->target;
206
207 em357_info = bank->driver_priv;
208
209 /* read current options */
210 em357_read_options(bank);
211
212 /* unlock flash registers */
213 int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
214 if (retval != ERROR_OK)
215 return retval;
216
217 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
218 if (retval != ERROR_OK)
219 return retval;
220
221 /* unlock option flash registers */
222 retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY1);
223 if (retval != ERROR_OK)
224 return retval;
225 retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY2);
226 if (retval != ERROR_OK)
227 return retval;
228
229 /* erase option bytes */
230 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_OPTER | FLASH_OPTWRE);
231 if (retval != ERROR_OK)
232 return retval;
233 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_OPTER | FLASH_STRT | FLASH_OPTWRE);
234 if (retval != ERROR_OK)
235 return retval;
236
237 retval = em357_wait_status_busy(bank, 10);
238 if (retval != ERROR_OK)
239 return retval;
240
241 /* clear readout protection and complementary option bytes
242 * this will also force a device unlock if set */
243 em357_info->option_bytes.RDP = 0x5AA5;
244
245 return ERROR_OK;
246 }
247
248 static int em357_write_options(struct flash_bank *bank)
249 {
250 struct em357_flash_bank *em357_info = NULL;
251 struct target *target = bank->target;
252
253 em357_info = bank->driver_priv;
254
255 /* unlock flash registers */
256 int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
257 if (retval != ERROR_OK)
258 return retval;
259 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
260 if (retval != ERROR_OK)
261 return retval;
262
263 /* unlock option flash registers */
264 retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY1);
265 if (retval != ERROR_OK)
266 return retval;
267 retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY2);
268 if (retval != ERROR_OK)
269 return retval;
270
271 /* program option bytes */
272 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_OPTPG | FLASH_OPTWRE);
273 if (retval != ERROR_OK)
274 return retval;
275
276 retval = em357_wait_status_busy(bank, 10);
277 if (retval != ERROR_OK)
278 return retval;
279
280 /* write protection byte 1 */
281 retval = target_write_u16(target, EM357_OB_WRP0, em357_info->option_bytes.protection[0]);
282 if (retval != ERROR_OK)
283 return retval;
284
285 retval = em357_wait_status_busy(bank, 10);
286 if (retval != ERROR_OK)
287 return retval;
288
289 /* write protection byte 2 */
290 retval = target_write_u16(target, EM357_OB_WRP1, em357_info->option_bytes.protection[1]);
291 if (retval != ERROR_OK)
292 return retval;
293
294 retval = em357_wait_status_busy(bank, 10);
295 if (retval != ERROR_OK)
296 return retval;
297
298 /* write protection byte 3 */
299 retval = target_write_u16(target, EM357_OB_WRP2, em357_info->option_bytes.protection[2]);
300 if (retval != ERROR_OK)
301 return retval;
302
303 retval = em357_wait_status_busy(bank, 10);
304 if (retval != ERROR_OK)
305 return retval;
306
307 /* write readout protection bit */
308 retval = target_write_u16(target, EM357_OB_RDP, em357_info->option_bytes.RDP);
309 if (retval != ERROR_OK)
310 return retval;
311
312 retval = em357_wait_status_busy(bank, 10);
313 if (retval != ERROR_OK)
314 return retval;
315
316 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
317 if (retval != ERROR_OK)
318 return retval;
319
320 return ERROR_OK;
321 }
322
323 static int em357_protect_check(struct flash_bank *bank)
324 {
325 struct target *target = bank->target;
326 struct em357_flash_bank *em357_info = bank->driver_priv;
327
328 uint32_t protection;
329 int i, s;
330 int num_bits;
331 int set;
332
333 if (target->state != TARGET_HALTED)
334 {
335 LOG_ERROR("Target not halted");
336 return ERROR_TARGET_NOT_HALTED;
337 }
338
339 /* each bit refers to a 4bank protection (bit 0-23) */
340 int retval = target_read_u32(target, EM357_FLASH_WRPR, &protection);
341 if (retval != ERROR_OK)
342 return retval;
343
344 /* each protection bit is for 4 * 2K pages */
345 num_bits = (bank->num_sectors / em357_info->ppage_size);
346
347 for (i = 0; i < num_bits; i++)
348 {
349 set = 1;
350 if (protection & (1 << i))
351 set = 0;
352
353 for (s = 0; s < em357_info->ppage_size; s++)
354 bank->sectors[(i * em357_info->ppage_size) + s].is_protected = set;
355 }
356
357 return ERROR_OK;
358 }
359
360 static int em357_erase(struct flash_bank *bank, int first, int last)
361 {
362 struct target *target = bank->target;
363 int i;
364
365 if (bank->target->state != TARGET_HALTED)
366 {
367 LOG_ERROR("Target not halted");
368 return ERROR_TARGET_NOT_HALTED;
369 }
370
371 if ((first == 0) && (last == (bank->num_sectors - 1)))
372 {
373 return em357_mass_erase(bank);
374 }
375
376 /* unlock flash registers */
377 int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
378 if (retval != ERROR_OK)
379 return retval;
380 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
381 if (retval != ERROR_OK)
382 return retval;
383
384 for (i = first; i <= last; i++)
385 {
386 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PER);
387 if (retval != ERROR_OK)
388 return retval;
389 retval = target_write_u32(target, EM357_FLASH_AR,
390 bank->base + bank->sectors[i].offset);
391 if (retval != ERROR_OK)
392 return retval;
393 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PER | FLASH_STRT);
394 if (retval != ERROR_OK)
395 return retval;
396
397 retval = em357_wait_status_busy(bank, 100);
398 if (retval != ERROR_OK)
399 return retval;
400
401 bank->sectors[i].is_erased = 1;
402 }
403
404 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
405 if (retval != ERROR_OK)
406 return retval;
407
408 return ERROR_OK;
409 }
410
411 static int em357_protect(struct flash_bank *bank, int set, int first, int last)
412 {
413 struct em357_flash_bank *em357_info = NULL;
414 struct target *target = bank->target;
415 uint16_t prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
416 int i, reg, bit;
417 int status;
418 uint32_t protection;
419
420 em357_info = bank->driver_priv;
421
422 if (target->state != TARGET_HALTED)
423 {
424 LOG_ERROR("Target not halted");
425 return ERROR_TARGET_NOT_HALTED;
426 }
427
428 if ((first % em357_info->ppage_size) != 0)
429 {
430 LOG_WARNING("aligned start protect sector to a %d sector boundary",
431 em357_info->ppage_size);
432 first = first - (first % em357_info->ppage_size);
433 }
434 if (((last + 1) % em357_info->ppage_size) != 0)
435 {
436 LOG_WARNING("aligned end protect sector to a %d sector boundary",
437 em357_info->ppage_size);
438 last++;
439 last = last - (last % em357_info->ppage_size);
440 last--;
441 }
442
443 /* each bit refers to a 4bank protection */
444 int retval = target_read_u32(target, EM357_FLASH_WRPR, &protection);
445 if (retval != ERROR_OK)
446 return retval;
447
448 prot_reg[0] = (uint16_t)protection;
449 prot_reg[1] = (uint16_t)(protection >> 8);
450 prot_reg[2] = (uint16_t)(protection >> 16);
451
452 for (i = first; i <= last; i++)
453 {
454 reg = (i / em357_info->ppage_size) / 8;
455 bit = (i / em357_info->ppage_size) - (reg * 8);
456
457 LOG_WARNING("reg, bit: %d, %d", reg, bit);
458 if (set)
459 prot_reg[reg] &= ~(1 << bit);
460 else
461 prot_reg[reg] |= (1 << bit);
462 }
463
464 if ((status = em357_erase_options(bank)) != ERROR_OK)
465 return status;
466
467 em357_info->option_bytes.protection[0] = prot_reg[0];
468 em357_info->option_bytes.protection[1] = prot_reg[1];
469 em357_info->option_bytes.protection[2] = prot_reg[2];
470
471 return em357_write_options(bank);
472 }
473
474 static int em357_write_block(struct flash_bank *bank, uint8_t *buffer,
475 uint32_t offset, uint32_t count)
476 {
477 struct em357_flash_bank *em357_info = bank->driver_priv;
478 struct target *target = bank->target;
479 uint32_t buffer_size = 16384;
480 struct working_area *source;
481 uint32_t address = bank->base + offset;
482 struct reg_param reg_params[4];
483 struct armv7m_algorithm armv7m_info;
484 int retval = ERROR_OK;
485
486 /* see contib/loaders/flash/stm32x.s for src, the same is used here except for
487 * a modified *_FLASH_BASE */
488
489 static const uint8_t em357_flash_write_code[] = {
490 /* #define EM357_FLASH_CR_OFFSET 0x10 */
491 /* #define EM357_FLASH_SR_OFFSET 0x0C */
492 /* write: */
493 0x08, 0x4c, /* ldr r4, EM357_FLASH_BASE */
494 0x1c, 0x44, /* add r4, r3 */
495 /* write_half_word: */
496 0x01, 0x23, /* movs r3, #0x01 */
497 0x23, 0x61, /* str r3, [r4, #EM357_FLASH_CR_OFFSET] */
498 0x30, 0xf8, 0x02, 0x3b, /* ldrh r3, [r0], #0x02 */
499 0x21, 0xf8, 0x02, 0x3b, /* strh r3, [r1], #0x02 */
500 /* busy: */
501 0xe3, 0x68, /* ldr r3, [r4, #EM357_FLASH_SR_OFFSET] */
502 0x13, 0xf0, 0x01, 0x0f, /* tst r3, #0x01 */
503 0xfb, 0xd0, /* beq busy */
504 0x13, 0xf0, 0x14, 0x0f, /* tst r3, #0x14 */
505 0x01, 0xd1, /* bne exit */
506 0x01, 0x3a, /* subs r2, r2, #0x01 */
507 0xf0, 0xd1, /* bne write_half_word */
508 /* exit: */
509 0x00, 0xbe, /* bkpt #0x00 */
510 0x00, 0x80, 0x00, 0x40, /* EM357_FLASH_BASE: .word 0x40008000 */
511 };
512
513 /* flash write code */
514 if (target_alloc_working_area(target, sizeof(em357_flash_write_code),
515 &em357_info->write_algorithm) != ERROR_OK)
516 {
517 LOG_WARNING("no working area available, can't do block memory writes");
518 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
519 };
520
521 if ((retval = target_write_buffer(target, em357_info->write_algorithm->address,
522 sizeof(em357_flash_write_code),
523 (uint8_t*)em357_flash_write_code)) != ERROR_OK)
524 return retval;
525
526 /* memory buffer */
527 while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK)
528 {
529 buffer_size /= 2;
530 if (buffer_size <= 256)
531 {
532 /* if we already allocated the writing code, but failed to get a
533 * buffer, free the algorithm */
534 if (em357_info->write_algorithm)
535 target_free_working_area(target, em357_info->write_algorithm);
536
537 LOG_WARNING("no large enough working area available, can't do block memory writes");
538 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
539 }
540 };
541
542 armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
543 armv7m_info.core_mode = ARMV7M_MODE_ANY;
544
545 init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
546 init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);
547 init_reg_param(&reg_params[2], "r2", 32, PARAM_OUT);
548 init_reg_param(&reg_params[3], "r3", 32, PARAM_IN_OUT);
549
550 while (count > 0)
551 {
552 uint32_t thisrun_count = (count > (buffer_size / 2)) ?
553 (buffer_size / 2) : count;
554
555 if ((retval = target_write_buffer(target, source->address,
556 thisrun_count * 2, buffer)) != ERROR_OK)
557 break;
558
559 buf_set_u32(reg_params[0].value, 0, 32, source->address);
560 buf_set_u32(reg_params[1].value, 0, 32, address);
561 buf_set_u32(reg_params[2].value, 0, 32, thisrun_count);
562 buf_set_u32(reg_params[3].value, 0, 32, 0);
563
564 if ((retval = target_run_algorithm(target, 0, NULL, 4, reg_params,
565 em357_info->write_algorithm->address,
566 0,
567 10000, &armv7m_info)) != ERROR_OK)
568 {
569 LOG_ERROR("error executing em357 flash write algorithm");
570 break;
571 }
572
573 if (buf_get_u32(reg_params[3].value, 0, 32) & FLASH_PGERR)
574 {
575 LOG_ERROR("flash memory not erased before writing");
576 /* Clear but report errors */
577 target_write_u32(target, EM357_FLASH_SR, FLASH_PGERR);
578 retval = ERROR_FAIL;
579 break;
580 }
581
582 if (buf_get_u32(reg_params[3].value, 0, 32) & FLASH_WRPRTERR)
583 {
584 LOG_ERROR("flash memory write protected");
585 /* Clear but report errors */
586 target_write_u32(target, EM357_FLASH_SR, FLASH_WRPRTERR);
587 retval = ERROR_FAIL;
588 break;
589 }
590
591 buffer += thisrun_count * 2;
592 address += thisrun_count * 2;
593 count -= thisrun_count;
594 }
595
596 target_free_working_area(target, source);
597 target_free_working_area(target, em357_info->write_algorithm);
598
599 destroy_reg_param(&reg_params[0]);
600 destroy_reg_param(&reg_params[1]);
601 destroy_reg_param(&reg_params[2]);
602 destroy_reg_param(&reg_params[3]);
603
604 return retval;
605 }
606
607 static int em357_write(struct flash_bank *bank, uint8_t *buffer,
608 uint32_t offset, uint32_t count)
609 {
610 struct target *target = bank->target;
611 uint32_t words_remaining = (count / 2);
612 uint32_t bytes_remaining = (count & 0x00000001);
613 uint32_t address = bank->base + offset;
614 uint32_t bytes_written = 0;
615 int retval;
616
617 if (bank->target->state != TARGET_HALTED)
618 {
619 LOG_ERROR("Target not halted");
620 return ERROR_TARGET_NOT_HALTED;
621 }
622
623 if (offset & 0x1)
624 {
625 LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
626 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
627 }
628
629 /* unlock flash registers */
630 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
631 if (retval != ERROR_OK)
632 return retval;
633 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
634 if (retval != ERROR_OK)
635 return retval;
636
637 /* multiple half words (2-byte) to be programmed? */
638 if (words_remaining > 0)
639 {
640 /* try using a block write */
641 if ((retval = em357_write_block(bank, buffer, offset, words_remaining)) != ERROR_OK)
642 {
643 if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE)
644 {
645 /* if block write failed (no sufficient working area),
646 * we use normal (slow) single dword accesses */
647 LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
648 }
649 }
650 else
651 {
652 buffer += words_remaining * 2;
653 address += words_remaining * 2;
654 words_remaining = 0;
655 }
656 }
657
658 if ((retval != ERROR_OK) && (retval != ERROR_TARGET_RESOURCE_NOT_AVAILABLE))
659 return retval;
660
661 while (words_remaining > 0)
662 {
663 uint16_t value;
664 memcpy(&value, buffer + bytes_written, sizeof(uint16_t));
665
666 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PG);
667 if (retval != ERROR_OK)
668 return retval;
669 retval = target_write_u16(target, address, value);
670 if (retval != ERROR_OK)
671 return retval;
672
673 retval = em357_wait_status_busy(bank, 5);
674 if (retval != ERROR_OK)
675 return retval;
676
677 bytes_written += 2;
678 words_remaining--;
679 address += 2;
680 }
681
682 if (bytes_remaining)
683 {
684 uint16_t value = 0xffff;
685 memcpy(&value, buffer + bytes_written, bytes_remaining);
686
687 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PG);
688 if (retval != ERROR_OK)
689 return retval;
690 retval = target_write_u16(target, address, value);
691 if (retval != ERROR_OK)
692 return retval;
693
694 retval = em357_wait_status_busy(bank, 5);
695 if (retval != ERROR_OK)
696 return retval;
697 }
698
699 return target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
700 }
701
702 static int em357_probe(struct flash_bank *bank)
703 {
704 struct target *target = bank->target;
705 struct em357_flash_bank *em357_info = bank->driver_priv;
706 int i;
707 uint16_t num_pages;
708 int page_size;
709 uint32_t base_address = 0x08000000;
710
711 em357_info->probed = 0;
712
713 /* Enable FPEC CLK */
714 int retval = target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
715 if (retval != ERROR_OK)
716 return retval;
717
718 page_size = 2048;
719 em357_info->ppage_size = 4;
720 num_pages = 96;
721
722 LOG_INFO("flash size = %dkbytes", num_pages*page_size/1024);
723
724 if (bank->sectors)
725 {
726 free(bank->sectors);
727 bank->sectors = NULL;
728 }
729
730 bank->base = base_address;
731 bank->size = (num_pages * page_size);
732 bank->num_sectors = num_pages;
733 bank->sectors = malloc(sizeof(struct flash_sector) * num_pages);
734
735 for (i = 0; i < num_pages; i++)
736 {
737 bank->sectors[i].offset = i * page_size;
738 bank->sectors[i].size = page_size;
739 bank->sectors[i].is_erased = -1;
740 bank->sectors[i].is_protected = 1;
741 }
742
743 em357_info->probed = 1;
744
745 return ERROR_OK;
746 }
747
748 static int em357_auto_probe(struct flash_bank *bank)
749 {
750 struct em357_flash_bank *em357_info = bank->driver_priv;
751 if (em357_info->probed)
752 return ERROR_OK;
753 return em357_probe(bank);
754 }
755
756
757 static int get_em357_info(struct flash_bank *bank, char *buf, int buf_size)
758 {
759 snprintf(buf, buf_size, "em357\n");
760 return ERROR_OK;
761 }
762
763 COMMAND_HANDLER(em357_handle_lock_command)
764 {
765 struct target *target = NULL;
766 struct em357_flash_bank *em357_info = NULL;
767
768 if (CMD_ARGC < 1)
769 {
770 return ERROR_COMMAND_SYNTAX_ERROR;
771 }
772
773 struct flash_bank *bank;
774 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
775 if (ERROR_OK != retval)
776 return retval;
777
778 em357_info = bank->driver_priv;
779
780 target = bank->target;
781
782 if (target->state != TARGET_HALTED)
783 {
784 LOG_ERROR("Target not halted");
785 return ERROR_TARGET_NOT_HALTED;
786 }
787
788 if (em357_erase_options(bank) != ERROR_OK)
789 {
790 command_print(CMD_CTX, "em357 failed to erase options");
791 return ERROR_OK;
792 }
793
794 /* set readout protection */
795 em357_info->option_bytes.RDP = 0;
796
797 if (em357_write_options(bank) != ERROR_OK)
798 {
799 command_print(CMD_CTX, "em357 failed to lock device");
800 return ERROR_OK;
801 }
802
803 command_print(CMD_CTX, "em357 locked");
804
805 return ERROR_OK;
806 }
807
808 COMMAND_HANDLER(em357_handle_unlock_command)
809 {
810 struct target *target = NULL;
811
812 if (CMD_ARGC < 1)
813 {
814 return ERROR_COMMAND_SYNTAX_ERROR;
815 }
816
817 struct flash_bank *bank;
818 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
819 if (ERROR_OK != retval)
820 return retval;
821
822 target = bank->target;
823
824 if (target->state != TARGET_HALTED)
825 {
826 LOG_ERROR("Target not halted");
827 return ERROR_TARGET_NOT_HALTED;
828 }
829
830 if (em357_erase_options(bank) != ERROR_OK)
831 {
832 command_print(CMD_CTX, "em357 failed to unlock device");
833 return ERROR_OK;
834 }
835
836 if (em357_write_options(bank) != ERROR_OK)
837 {
838 command_print(CMD_CTX, "em357 failed to lock device");
839 return ERROR_OK;
840 }
841
842 command_print(CMD_CTX, "em357 unlocked.\n"
843 "INFO: a reset or power cycle is required "
844 "for the new settings to take effect.");
845
846 return ERROR_OK;
847 }
848
849 static int em357_mass_erase(struct flash_bank *bank)
850 {
851 struct target *target = bank->target;
852
853 if (target->state != TARGET_HALTED)
854 {
855 LOG_ERROR("Target not halted");
856 return ERROR_TARGET_NOT_HALTED;
857 }
858
859 /* unlock option flash registers */
860 int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
861 if (retval != ERROR_OK)
862 return retval;
863 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
864 if (retval != ERROR_OK)
865 return retval;
866
867 /* mass erase flash memory */
868 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_MER);
869 if (retval != ERROR_OK)
870 return retval;
871 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_MER | FLASH_STRT);
872 if (retval != ERROR_OK)
873 return retval;
874
875 retval = em357_wait_status_busy(bank, 100);
876 if (retval != ERROR_OK)
877 return retval;
878
879 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
880 if (retval != ERROR_OK)
881 return retval;
882
883 return ERROR_OK;
884 }
885
886 COMMAND_HANDLER(em357_handle_mass_erase_command)
887 {
888 int i;
889
890 if (CMD_ARGC < 1)
891 {
892 return ERROR_COMMAND_SYNTAX_ERROR;
893 }
894
895 struct flash_bank *bank;
896 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
897 if (ERROR_OK != retval)
898 return retval;
899
900 retval = em357_mass_erase(bank);
901 if (retval == ERROR_OK)
902 {
903 /* set all sectors as erased */
904 for (i = 0; i < bank->num_sectors; i++)
905 {
906 bank->sectors[i].is_erased = 1;
907 }
908
909 command_print(CMD_CTX, "em357 mass erase complete");
910 }
911 else
912 {
913 command_print(CMD_CTX, "em357 mass erase failed");
914 }
915
916 return retval;
917 }
918
919 static const struct command_registration em357_exec_command_handlers[] = {
920 {
921 .name = "lock",
922 .usage = "<bank>",
923 .handler = em357_handle_lock_command,
924 .mode = COMMAND_EXEC,
925 .help = "Lock entire flash device.",
926 },
927 {
928 .name = "unlock",
929 .usage = "<bank>",
930 .handler = em357_handle_unlock_command,
931 .mode = COMMAND_EXEC,
932 .help = "Unlock entire protected flash device.",
933 },
934 {
935 .name = "mass_erase",
936 .usage = "<bank>",
937 .handler = em357_handle_mass_erase_command,
938 .mode = COMMAND_EXEC,
939 .help = "Erase entire flash device.",
940 },
941 COMMAND_REGISTRATION_DONE
942 };
943
944 static const struct command_registration em357_command_handlers[] = {
945 {
946 .name = "em357",
947 .mode = COMMAND_ANY,
948 .help = "em357 flash command group",
949 .usage = "",
950 .chain = em357_exec_command_handlers,
951 },
952 COMMAND_REGISTRATION_DONE
953 };
954
955 struct flash_driver em357_flash = {
956 .name = "em357",
957 .commands = em357_command_handlers,
958 .flash_bank_command = em357_flash_bank_command,
959 .erase = em357_erase,
960 .protect = em357_protect,
961 .write = em357_write,
962 .read = default_flash_read,
963 .probe = em357_probe,
964 .auto_probe = em357_auto_probe,
965 .erase_check = default_flash_mem_blank_check,
966 .protect_check = em357_protect_check,
967 .info = get_em357_info,
968 };
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