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jtag: linuxgpiod: drop extra parenthesis
[openocd.git] / src / flash / nor / em357.c
1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
4 * *
5 * Copyright (C) 2008 by Spencer Oliver *
6 * spen@spen-soft.co.uk *
7 *
8 * Copyright (C) 2011 by Erik Botö
9 * erik.boto@pelagicore.com
10 *
11 * This program is free software; you can redistribute it and/or modify *
12 * it under the terms of the GNU General Public License as published by *
13 * the Free Software Foundation; either version 2 of the License, or *
14 * (at your option) any later version. *
15 * *
16 * This program is distributed in the hope that it will be useful, *
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
19 * GNU General Public License for more details. *
20 * *
21 * You should have received a copy of the GNU General Public License *
22 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
23 ***************************************************************************/
24
25 #ifdef HAVE_CONFIG_H
26 #include "config.h"
27 #endif
28
29 #include "imp.h"
30 #include <helper/binarybuffer.h>
31 #include <target/algorithm.h>
32 #include <target/armv7m.h>
33
34 /* em357 register locations */
35
36 #define EM357_FLASH_ACR 0x40008000
37 #define EM357_FLASH_KEYR 0x40008004
38 #define EM357_FLASH_OPTKEYR 0x40008008
39 #define EM357_FLASH_SR 0x4000800C
40 #define EM357_FLASH_CR 0x40008010
41 #define EM357_FLASH_AR 0x40008014
42 #define EM357_FLASH_OBR 0x4000801C
43 #define EM357_FLASH_WRPR 0x40008020
44
45 #define EM357_FPEC_CLK 0x4000402c
46 /* option byte location */
47
48 #define EM357_OB_RDP 0x08040800
49 #define EM357_OB_WRP0 0x08040808
50 #define EM357_OB_WRP1 0x0804080A
51 #define EM357_OB_WRP2 0x0804080C
52
53 /* FLASH_CR register bits */
54
55 #define FLASH_PG (1 << 0)
56 #define FLASH_PER (1 << 1)
57 #define FLASH_MER (1 << 2)
58 #define FLASH_OPTPG (1 << 4)
59 #define FLASH_OPTER (1 << 5)
60 #define FLASH_STRT (1 << 6)
61 #define FLASH_LOCK (1 << 7)
62 #define FLASH_OPTWRE (1 << 9)
63
64 /* FLASH_SR register bits */
65
66 #define FLASH_BSY (1 << 0)
67 #define FLASH_PGERR (1 << 2)
68 #define FLASH_WRPRTERR (1 << 4)
69 #define FLASH_EOP (1 << 5)
70
71 /* EM357_FLASH_OBR bit definitions (reading) */
72
73 #define OPT_ERROR 0
74 #define OPT_READOUT 1
75
76 /* register unlock keys */
77
78 #define KEY1 0x45670123
79 #define KEY2 0xCDEF89AB
80
81 struct em357_options {
82 uint16_t RDP;
83 uint16_t user_options;
84 uint16_t protection[3];
85 };
86
87 struct em357_flash_bank {
88 struct em357_options option_bytes;
89 int ppage_size;
90 bool probed;
91 };
92
93 static int em357_mass_erase(struct flash_bank *bank);
94
95 /* flash bank em357 <base> <size> 0 0 <target#>
96 */
97 FLASH_BANK_COMMAND_HANDLER(em357_flash_bank_command)
98 {
99 struct em357_flash_bank *em357_info;
100
101 if (CMD_ARGC < 6)
102 return ERROR_COMMAND_SYNTAX_ERROR;
103
104 em357_info = malloc(sizeof(struct em357_flash_bank));
105 bank->driver_priv = em357_info;
106
107 em357_info->probed = false;
108
109 return ERROR_OK;
110 }
111
112 static inline int em357_get_flash_status(struct flash_bank *bank, uint32_t *status)
113 {
114 struct target *target = bank->target;
115 return target_read_u32(target, EM357_FLASH_SR, status);
116 }
117
118 static int em357_wait_status_busy(struct flash_bank *bank, int timeout)
119 {
120 struct target *target = bank->target;
121 uint32_t status;
122 int retval = ERROR_OK;
123
124 /* wait for busy to clear */
125 for (;; ) {
126 retval = em357_get_flash_status(bank, &status);
127 if (retval != ERROR_OK)
128 return retval;
129 LOG_DEBUG("status: 0x%" PRIx32 "", status);
130 if ((status & FLASH_BSY) == 0)
131 break;
132 if (timeout-- <= 0) {
133 LOG_ERROR("timed out waiting for flash");
134 return ERROR_FAIL;
135 }
136 alive_sleep(1);
137 }
138
139 if (status & FLASH_WRPRTERR) {
140 LOG_ERROR("em357 device protected");
141 retval = ERROR_FAIL;
142 }
143
144 if (status & FLASH_PGERR) {
145 LOG_ERROR("em357 device programming failed");
146 retval = ERROR_FAIL;
147 }
148
149 /* Clear but report errors */
150 if (status & (FLASH_WRPRTERR | FLASH_PGERR)) {
151 /* If this operation fails, we ignore it and report the original
152 * retval
153 */
154 target_write_u32(target, EM357_FLASH_SR, FLASH_WRPRTERR | FLASH_PGERR);
155 }
156 return retval;
157 }
158
159 static int em357_read_options(struct flash_bank *bank)
160 {
161 uint32_t optiondata;
162 struct em357_flash_bank *em357_info = NULL;
163 struct target *target = bank->target;
164
165 em357_info = bank->driver_priv;
166
167 /* read current option bytes */
168 int retval = target_read_u32(target, EM357_FLASH_OBR, &optiondata);
169 if (retval != ERROR_OK)
170 return retval;
171
172 em357_info->option_bytes.user_options = (uint16_t)0xFFFC | ((optiondata >> 2) & 0x03);
173 em357_info->option_bytes.RDP = (optiondata & (1 << OPT_READOUT)) ? 0xFFFF : 0x5AA5;
174
175 if (optiondata & (1 << OPT_READOUT))
176 LOG_INFO("Device Security Bit Set");
177
178 /* each bit refers to a 4bank protection */
179 retval = target_read_u32(target, EM357_FLASH_WRPR, &optiondata);
180 if (retval != ERROR_OK)
181 return retval;
182
183 em357_info->option_bytes.protection[0] = (uint16_t)optiondata;
184 em357_info->option_bytes.protection[1] = (uint16_t)(optiondata >> 8);
185 em357_info->option_bytes.protection[2] = (uint16_t)(optiondata >> 16);
186
187 return ERROR_OK;
188 }
189
190 static int em357_erase_options(struct flash_bank *bank)
191 {
192 struct em357_flash_bank *em357_info = NULL;
193 struct target *target = bank->target;
194
195 em357_info = bank->driver_priv;
196
197 /* read current options */
198 em357_read_options(bank);
199
200 /* unlock flash registers */
201 int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
202 if (retval != ERROR_OK)
203 return retval;
204
205 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
206 if (retval != ERROR_OK)
207 return retval;
208
209 /* unlock option flash registers */
210 retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY1);
211 if (retval != ERROR_OK)
212 return retval;
213 retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY2);
214 if (retval != ERROR_OK)
215 return retval;
216
217 /* erase option bytes */
218 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_OPTER | FLASH_OPTWRE);
219 if (retval != ERROR_OK)
220 return retval;
221 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_OPTER | FLASH_STRT | FLASH_OPTWRE);
222 if (retval != ERROR_OK)
223 return retval;
224
225 retval = em357_wait_status_busy(bank, 10);
226 if (retval != ERROR_OK)
227 return retval;
228
229 /* clear readout protection and complementary option bytes
230 * this will also force a device unlock if set */
231 em357_info->option_bytes.RDP = 0x5AA5;
232
233 return ERROR_OK;
234 }
235
236 static int em357_write_options(struct flash_bank *bank)
237 {
238 struct em357_flash_bank *em357_info = NULL;
239 struct target *target = bank->target;
240
241 em357_info = bank->driver_priv;
242
243 /* unlock flash registers */
244 int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
245 if (retval != ERROR_OK)
246 return retval;
247 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
248 if (retval != ERROR_OK)
249 return retval;
250
251 /* unlock option flash registers */
252 retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY1);
253 if (retval != ERROR_OK)
254 return retval;
255 retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY2);
256 if (retval != ERROR_OK)
257 return retval;
258
259 /* program option bytes */
260 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_OPTPG | FLASH_OPTWRE);
261 if (retval != ERROR_OK)
262 return retval;
263
264 retval = em357_wait_status_busy(bank, 10);
265 if (retval != ERROR_OK)
266 return retval;
267
268 /* write protection byte 1 */
269 retval = target_write_u16(target, EM357_OB_WRP0, em357_info->option_bytes.protection[0]);
270 if (retval != ERROR_OK)
271 return retval;
272
273 retval = em357_wait_status_busy(bank, 10);
274 if (retval != ERROR_OK)
275 return retval;
276
277 /* write protection byte 2 */
278 retval = target_write_u16(target, EM357_OB_WRP1, em357_info->option_bytes.protection[1]);
279 if (retval != ERROR_OK)
280 return retval;
281
282 retval = em357_wait_status_busy(bank, 10);
283 if (retval != ERROR_OK)
284 return retval;
285
286 /* write protection byte 3 */
287 retval = target_write_u16(target, EM357_OB_WRP2, em357_info->option_bytes.protection[2]);
288 if (retval != ERROR_OK)
289 return retval;
290
291 retval = em357_wait_status_busy(bank, 10);
292 if (retval != ERROR_OK)
293 return retval;
294
295 /* write readout protection bit */
296 retval = target_write_u16(target, EM357_OB_RDP, em357_info->option_bytes.RDP);
297 if (retval != ERROR_OK)
298 return retval;
299
300 retval = em357_wait_status_busy(bank, 10);
301 if (retval != ERROR_OK)
302 return retval;
303
304 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
305 if (retval != ERROR_OK)
306 return retval;
307
308 return ERROR_OK;
309 }
310
311 static int em357_protect_check(struct flash_bank *bank)
312 {
313 struct target *target = bank->target;
314 struct em357_flash_bank *em357_info = bank->driver_priv;
315
316 uint32_t protection;
317 int i, s;
318 int num_bits;
319 int set;
320
321 if (target->state != TARGET_HALTED) {
322 LOG_ERROR("Target not halted");
323 return ERROR_TARGET_NOT_HALTED;
324 }
325
326 /* each bit refers to a 4bank protection (bit 0-23) */
327 int retval = target_read_u32(target, EM357_FLASH_WRPR, &protection);
328 if (retval != ERROR_OK)
329 return retval;
330
331 /* each protection bit is for 4 * 2K pages */
332 num_bits = (bank->num_sectors / em357_info->ppage_size);
333
334 for (i = 0; i < num_bits; i++) {
335 set = 1;
336 if (protection & (1 << i))
337 set = 0;
338
339 for (s = 0; s < em357_info->ppage_size; s++)
340 bank->sectors[(i * em357_info->ppage_size) + s].is_protected = set;
341 }
342
343 return ERROR_OK;
344 }
345
346 static int em357_erase(struct flash_bank *bank, unsigned int first,
347 unsigned int last)
348 {
349 struct target *target = bank->target;
350
351 if (bank->target->state != TARGET_HALTED) {
352 LOG_ERROR("Target not halted");
353 return ERROR_TARGET_NOT_HALTED;
354 }
355
356 if ((first == 0) && (last == (bank->num_sectors - 1)))
357 return em357_mass_erase(bank);
358
359 /* Enable FPEC clock */
360 target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
361
362 /* unlock flash registers */
363 int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
364 if (retval != ERROR_OK)
365 return retval;
366 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
367 if (retval != ERROR_OK)
368 return retval;
369
370 for (unsigned int i = first; i <= last; i++) {
371 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PER);
372 if (retval != ERROR_OK)
373 return retval;
374 retval = target_write_u32(target, EM357_FLASH_AR,
375 bank->base + bank->sectors[i].offset);
376 if (retval != ERROR_OK)
377 return retval;
378 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PER | FLASH_STRT);
379 if (retval != ERROR_OK)
380 return retval;
381
382 retval = em357_wait_status_busy(bank, 100);
383 if (retval != ERROR_OK)
384 return retval;
385 }
386
387 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
388 if (retval != ERROR_OK)
389 return retval;
390
391 return ERROR_OK;
392 }
393
394 static int em357_protect(struct flash_bank *bank, int set, unsigned int first,
395 unsigned int last)
396 {
397 struct em357_flash_bank *em357_info = NULL;
398 struct target *target = bank->target;
399 uint16_t prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
400 int reg, bit;
401 int status;
402 uint32_t protection;
403
404 em357_info = bank->driver_priv;
405
406 if (target->state != TARGET_HALTED) {
407 LOG_ERROR("Target not halted");
408 return ERROR_TARGET_NOT_HALTED;
409 }
410
411 if ((first % em357_info->ppage_size) != 0) {
412 LOG_WARNING("aligned start protect sector to a %d sector boundary",
413 em357_info->ppage_size);
414 first = first - (first % em357_info->ppage_size);
415 }
416 if (((last + 1) % em357_info->ppage_size) != 0) {
417 LOG_WARNING("aligned end protect sector to a %d sector boundary",
418 em357_info->ppage_size);
419 last++;
420 last = last - (last % em357_info->ppage_size);
421 last--;
422 }
423
424 /* each bit refers to a 4bank protection */
425 int retval = target_read_u32(target, EM357_FLASH_WRPR, &protection);
426 if (retval != ERROR_OK)
427 return retval;
428
429 prot_reg[0] = (uint16_t)protection;
430 prot_reg[1] = (uint16_t)(protection >> 8);
431 prot_reg[2] = (uint16_t)(protection >> 16);
432
433 for (unsigned int i = first; i <= last; i++) {
434 reg = (i / em357_info->ppage_size) / 8;
435 bit = (i / em357_info->ppage_size) - (reg * 8);
436
437 LOG_WARNING("reg, bit: %d, %d", reg, bit);
438 if (set)
439 prot_reg[reg] &= ~(1 << bit);
440 else
441 prot_reg[reg] |= (1 << bit);
442 }
443
444 status = em357_erase_options(bank);
445 if (retval != ERROR_OK)
446 return status;
447
448 em357_info->option_bytes.protection[0] = prot_reg[0];
449 em357_info->option_bytes.protection[1] = prot_reg[1];
450 em357_info->option_bytes.protection[2] = prot_reg[2];
451
452 return em357_write_options(bank);
453 }
454
455 static int em357_write_block(struct flash_bank *bank, const uint8_t *buffer,
456 uint32_t offset, uint32_t count)
457 {
458 struct target *target = bank->target;
459 uint32_t buffer_size = 16384;
460 struct working_area *write_algorithm;
461 struct working_area *source;
462 uint32_t address = bank->base + offset;
463 struct reg_param reg_params[4];
464 struct armv7m_algorithm armv7m_info;
465 int retval = ERROR_OK;
466
467 /* see contrib/loaders/flash/stm32x.s for src, the same is used here except for
468 * a modified *_FLASH_BASE */
469
470 static const uint8_t em357_flash_write_code[] = {
471 /* #define EM357_FLASH_CR_OFFSET 0x10
472 * #define EM357_FLASH_SR_OFFSET 0x0C
473 * write: */
474 0x08, 0x4c, /* ldr r4, EM357_FLASH_BASE */
475 0x1c, 0x44, /* add r4, r3 */
476 /* write_half_word: */
477 0x01, 0x23, /* movs r3, #0x01 */
478 0x23, 0x61, /* str r3, [r4,
479 *#EM357_FLASH_CR_OFFSET] */
480 0x30, 0xf8, 0x02, 0x3b, /* ldrh r3, [r0], #0x02 */
481 0x21, 0xf8, 0x02, 0x3b, /* strh r3, [r1], #0x02 */
482 /* busy: */
483 0xe3, 0x68, /* ldr r3, [r4,
484 *#EM357_FLASH_SR_OFFSET] */
485 0x13, 0xf0, 0x01, 0x0f, /* tst r3, #0x01 */
486 0xfb, 0xd0, /* beq busy */
487 0x13, 0xf0, 0x14, 0x0f, /* tst r3, #0x14 */
488 0x01, 0xd1, /* bne exit */
489 0x01, 0x3a, /* subs r2, r2, #0x01 */
490 0xf0, 0xd1, /* bne write_half_word */
491 /* exit: */
492 0x00, 0xbe, /* bkpt #0x00 */
493 0x00, 0x80, 0x00, 0x40, /* EM357_FLASH_BASE: .word 0x40008000 */
494 };
495
496 /* flash write code */
497 if (target_alloc_working_area(target, sizeof(em357_flash_write_code),
498 &write_algorithm) != ERROR_OK) {
499 LOG_WARNING("no working area available, can't do block memory writes");
500 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
501 }
502
503 retval = target_write_buffer(target, write_algorithm->address,
504 sizeof(em357_flash_write_code), em357_flash_write_code);
505 if (retval != ERROR_OK)
506 return retval;
507
508 /* memory buffer */
509 while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
510 buffer_size /= 2;
511 if (buffer_size <= 256) {
512 /* we already allocated the writing code, but failed to get a
513 * buffer, free the algorithm */
514 target_free_working_area(target, write_algorithm);
515
516 LOG_WARNING(
517 "no large enough working area available, can't do block memory writes");
518 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
519 }
520 }
521
522 armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
523 armv7m_info.core_mode = ARM_MODE_THREAD;
524
525 init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
526 init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);
527 init_reg_param(&reg_params[2], "r2", 32, PARAM_OUT);
528 init_reg_param(&reg_params[3], "r3", 32, PARAM_IN_OUT);
529
530 while (count > 0) {
531 uint32_t thisrun_count = (count > (buffer_size / 2)) ?
532 (buffer_size / 2) : count;
533
534 retval = target_write_buffer(target, source->address, thisrun_count * 2, buffer);
535 if (retval != ERROR_OK)
536 break;
537
538 buf_set_u32(reg_params[0].value, 0, 32, source->address);
539 buf_set_u32(reg_params[1].value, 0, 32, address);
540 buf_set_u32(reg_params[2].value, 0, 32, thisrun_count);
541 buf_set_u32(reg_params[3].value, 0, 32, 0);
542
543 retval = target_run_algorithm(target, 0, NULL, 4, reg_params,
544 write_algorithm->address, 0, 10000, &armv7m_info);
545 if (retval != ERROR_OK) {
546 LOG_ERROR("error executing em357 flash write algorithm");
547 break;
548 }
549
550 if (buf_get_u32(reg_params[3].value, 0, 32) & FLASH_PGERR) {
551 LOG_ERROR("flash memory not erased before writing");
552 /* Clear but report errors */
553 target_write_u32(target, EM357_FLASH_SR, FLASH_PGERR);
554 retval = ERROR_FAIL;
555 break;
556 }
557
558 if (buf_get_u32(reg_params[3].value, 0, 32) & FLASH_WRPRTERR) {
559 LOG_ERROR("flash memory write protected");
560 /* Clear but report errors */
561 target_write_u32(target, EM357_FLASH_SR, FLASH_WRPRTERR);
562 retval = ERROR_FAIL;
563 break;
564 }
565
566 buffer += thisrun_count * 2;
567 address += thisrun_count * 2;
568 count -= thisrun_count;
569 }
570
571 target_free_working_area(target, source);
572 target_free_working_area(target, write_algorithm);
573
574 destroy_reg_param(&reg_params[0]);
575 destroy_reg_param(&reg_params[1]);
576 destroy_reg_param(&reg_params[2]);
577 destroy_reg_param(&reg_params[3]);
578
579 return retval;
580 }
581
582 static int em357_write(struct flash_bank *bank, const uint8_t *buffer,
583 uint32_t offset, uint32_t count)
584 {
585 struct target *target = bank->target;
586 uint32_t words_remaining = (count / 2);
587 uint32_t bytes_remaining = (count & 0x00000001);
588 uint32_t address = bank->base + offset;
589 uint32_t bytes_written = 0;
590 int retval;
591
592 if (bank->target->state != TARGET_HALTED) {
593 LOG_ERROR("Target not halted");
594 return ERROR_TARGET_NOT_HALTED;
595 }
596
597 if (offset & 0x1) {
598 LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
599 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
600 }
601
602 /* unlock flash registers */
603 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
604 if (retval != ERROR_OK)
605 return retval;
606 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
607 if (retval != ERROR_OK)
608 return retval;
609
610 target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
611
612 /* multiple half words (2-byte) to be programmed? */
613 if (words_remaining > 0) {
614 /* try using a block write */
615 retval = em357_write_block(bank, buffer, offset, words_remaining);
616 if (retval != ERROR_OK) {
617 if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
618 /* if block write failed (no sufficient working area),
619 * we use normal (slow) single dword accesses */
620 LOG_WARNING(
621 "couldn't use block writes, falling back to single memory accesses");
622 }
623 } else {
624 buffer += words_remaining * 2;
625 address += words_remaining * 2;
626 words_remaining = 0;
627 }
628 }
629
630 if ((retval != ERROR_OK) && (retval != ERROR_TARGET_RESOURCE_NOT_AVAILABLE))
631 return retval;
632
633 while (words_remaining > 0) {
634 uint16_t value;
635 memcpy(&value, buffer + bytes_written, sizeof(uint16_t));
636
637 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PG);
638 if (retval != ERROR_OK)
639 return retval;
640 retval = target_write_u16(target, address, value);
641 if (retval != ERROR_OK)
642 return retval;
643
644 retval = em357_wait_status_busy(bank, 5);
645 if (retval != ERROR_OK)
646 return retval;
647
648 bytes_written += 2;
649 words_remaining--;
650 address += 2;
651 }
652
653 if (bytes_remaining) {
654 uint16_t value = 0xffff;
655 memcpy(&value, buffer + bytes_written, bytes_remaining);
656
657 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PG);
658 if (retval != ERROR_OK)
659 return retval;
660 retval = target_write_u16(target, address, value);
661 if (retval != ERROR_OK)
662 return retval;
663
664 retval = em357_wait_status_busy(bank, 5);
665 if (retval != ERROR_OK)
666 return retval;
667 }
668
669 return target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
670 }
671
672 static int em357_probe(struct flash_bank *bank)
673 {
674 struct target *target = bank->target;
675 struct em357_flash_bank *em357_info = bank->driver_priv;
676 int i;
677 uint16_t num_pages;
678 int page_size;
679 uint32_t base_address = 0x08000000;
680
681 em357_info->probed = false;
682
683 switch (bank->size) {
684 case 0x10000:
685 /* 64k -- 64 1k pages */
686 num_pages = 64;
687 page_size = 1024;
688 break;
689 case 0x20000:
690 /* 128k -- 128 1k pages */
691 num_pages = 128;
692 page_size = 1024;
693 break;
694 case 0x30000:
695 /* 192k -- 96 2k pages */
696 num_pages = 96;
697 page_size = 2048;
698 break;
699 case 0x40000:
700 /* 256k -- 128 2k pages */
701 num_pages = 128;
702 page_size = 2048;
703 break;
704 case 0x80000:
705 /* 512k -- 256 2k pages */
706 num_pages = 256;
707 page_size = 2048;
708 break;
709 default:
710 LOG_WARNING("No size specified for em357 flash driver, assuming 192k!");
711 num_pages = 96;
712 page_size = 2048;
713 break;
714 }
715
716 /* Enable FPEC CLK */
717 int retval = target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
718 if (retval != ERROR_OK)
719 return retval;
720
721 em357_info->ppage_size = 4;
722
723 LOG_INFO("flash size = %dkbytes", num_pages*page_size/1024);
724
725 free(bank->sectors);
726
727 bank->base = base_address;
728 bank->size = (num_pages * page_size);
729 bank->num_sectors = num_pages;
730 bank->sectors = malloc(sizeof(struct flash_sector) * num_pages);
731
732 for (i = 0; i < num_pages; i++) {
733 bank->sectors[i].offset = i * page_size;
734 bank->sectors[i].size = page_size;
735 bank->sectors[i].is_erased = -1;
736 bank->sectors[i].is_protected = 1;
737 }
738
739 em357_info->probed = true;
740
741 return ERROR_OK;
742 }
743
744 static int em357_auto_probe(struct flash_bank *bank)
745 {
746 struct em357_flash_bank *em357_info = bank->driver_priv;
747 if (em357_info->probed)
748 return ERROR_OK;
749 return em357_probe(bank);
750 }
751
752 COMMAND_HANDLER(em357_handle_lock_command)
753 {
754 struct target *target = NULL;
755 struct em357_flash_bank *em357_info = NULL;
756
757 if (CMD_ARGC < 1)
758 return ERROR_COMMAND_SYNTAX_ERROR;
759
760 struct flash_bank *bank;
761 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
762 if (retval != ERROR_OK)
763 return retval;
764
765 em357_info = bank->driver_priv;
766
767 target = bank->target;
768
769 if (target->state != TARGET_HALTED) {
770 LOG_ERROR("Target not halted");
771 return ERROR_TARGET_NOT_HALTED;
772 }
773
774 if (em357_erase_options(bank) != ERROR_OK) {
775 command_print(CMD, "em357 failed to erase options");
776 return ERROR_OK;
777 }
778
779 /* set readout protection */
780 em357_info->option_bytes.RDP = 0;
781
782 if (em357_write_options(bank) != ERROR_OK) {
783 command_print(CMD, "em357 failed to lock device");
784 return ERROR_OK;
785 }
786
787 command_print(CMD, "em357 locked");
788
789 return ERROR_OK;
790 }
791
792 COMMAND_HANDLER(em357_handle_unlock_command)
793 {
794 struct target *target = NULL;
795
796 if (CMD_ARGC < 1)
797 return ERROR_COMMAND_SYNTAX_ERROR;
798
799 struct flash_bank *bank;
800 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
801 if (retval != ERROR_OK)
802 return retval;
803
804 target = bank->target;
805
806 if (target->state != TARGET_HALTED) {
807 LOG_ERROR("Target not halted");
808 return ERROR_TARGET_NOT_HALTED;
809 }
810
811 if (em357_erase_options(bank) != ERROR_OK) {
812 command_print(CMD, "em357 failed to unlock device");
813 return ERROR_OK;
814 }
815
816 if (em357_write_options(bank) != ERROR_OK) {
817 command_print(CMD, "em357 failed to lock device");
818 return ERROR_OK;
819 }
820
821 command_print(CMD, "em357 unlocked.\n"
822 "INFO: a reset or power cycle is required "
823 "for the new settings to take effect.");
824
825 return ERROR_OK;
826 }
827
828 static int em357_mass_erase(struct flash_bank *bank)
829 {
830 struct target *target = bank->target;
831
832 if (target->state != TARGET_HALTED) {
833 LOG_ERROR("Target not halted");
834 return ERROR_TARGET_NOT_HALTED;
835 }
836
837 /* Make sure the flash clock is on */
838 target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
839
840 /* unlock option flash registers */
841 int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
842 if (retval != ERROR_OK)
843 return retval;
844 retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
845 if (retval != ERROR_OK)
846 return retval;
847
848 /* mass erase flash memory */
849 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_MER);
850 if (retval != ERROR_OK)
851 return retval;
852 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_MER | FLASH_STRT);
853 if (retval != ERROR_OK)
854 return retval;
855
856 retval = em357_wait_status_busy(bank, 100);
857 if (retval != ERROR_OK)
858 return retval;
859
860 retval = target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
861 if (retval != ERROR_OK)
862 return retval;
863
864 return ERROR_OK;
865 }
866
867 COMMAND_HANDLER(em357_handle_mass_erase_command)
868 {
869 if (CMD_ARGC < 1)
870 return ERROR_COMMAND_SYNTAX_ERROR;
871
872 struct flash_bank *bank;
873 int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
874 if (retval != ERROR_OK)
875 return retval;
876
877 retval = em357_mass_erase(bank);
878 if (retval == ERROR_OK)
879 command_print(CMD, "em357 mass erase complete");
880 else
881 command_print(CMD, "em357 mass erase failed");
882
883 return retval;
884 }
885
886 static const struct command_registration em357_exec_command_handlers[] = {
887 {
888 .name = "lock",
889 .usage = "<bank>",
890 .handler = em357_handle_lock_command,
891 .mode = COMMAND_EXEC,
892 .help = "Lock entire flash device.",
893 },
894 {
895 .name = "unlock",
896 .usage = "<bank>",
897 .handler = em357_handle_unlock_command,
898 .mode = COMMAND_EXEC,
899 .help = "Unlock entire protected flash device.",
900 },
901 {
902 .name = "mass_erase",
903 .usage = "<bank>",
904 .handler = em357_handle_mass_erase_command,
905 .mode = COMMAND_EXEC,
906 .help = "Erase entire flash device.",
907 },
908 COMMAND_REGISTRATION_DONE
909 };
910
911 static const struct command_registration em357_command_handlers[] = {
912 {
913 .name = "em357",
914 .mode = COMMAND_ANY,
915 .help = "em357 flash command group",
916 .usage = "",
917 .chain = em357_exec_command_handlers,
918 },
919 COMMAND_REGISTRATION_DONE
920 };
921
922 const struct flash_driver em357_flash = {
923 .name = "em357",
924 .commands = em357_command_handlers,
925 .flash_bank_command = em357_flash_bank_command,
926 .erase = em357_erase,
927 .protect = em357_protect,
928 .write = em357_write,
929 .read = default_flash_read,
930 .probe = em357_probe,
931 .auto_probe = em357_auto_probe,
932 .erase_check = default_flash_blank_check,
933 .protect_check = em357_protect_check,
934 .free_driver_priv = default_flash_free_driver_priv,
935 };
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