kinetis flash: use longword write when writing into pflash
[openocd.git] / src / flash / nor / ocl.c
1 /***************************************************************************
2 * Copyright (C) 2007 by Pavel Chromy *
3 * chromy@asix.cz *
4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
20 #ifdef HAVE_CONFIG_H
21 #include "config.h"
22 #endif
23
24 #include "imp.h"
25 #include "ocl.h"
26 #include <target/embeddedice.h>
27
28
29 struct ocl_priv
30 {
31 struct arm_jtag *jtag_info;
32 unsigned int buflen;
33 unsigned int bufalign;
34 };
35
36 static int ocl_erase_check(struct flash_bank *bank)
37 {
38 return ERROR_OK;
39 }
40
41 static int ocl_protect_check(struct flash_bank *bank)
42 {
43 return ERROR_OK;
44 }
45
46 /* flash_bank ocl 0 0 0 0 <target#> */
47 FLASH_BANK_COMMAND_HANDLER(ocl_flash_bank_command)
48 {
49 struct arm7_9_common *arm7_9;
50 struct ocl_priv *ocl;
51
52 if (CMD_ARGC < 6)
53 {
54 LOG_WARNING("incomplete flash_bank ocl configuration");
55 return ERROR_FLASH_BANK_INVALID;
56 }
57
58 arm7_9 = target_to_arm7_9(bank->target);
59 if (!is_arm7_9(arm7_9))
60 return ERROR_TARGET_INVALID;
61
62 ocl = bank->driver_priv = malloc(sizeof(struct ocl_priv));
63 ocl->jtag_info = &arm7_9->jtag_info;
64 ocl->buflen = 0;
65 ocl->bufalign = 1;
66
67 return ERROR_OK;
68 }
69
70 static int ocl_erase(struct flash_bank *bank, int first, int last)
71 {
72 struct ocl_priv *ocl = bank->driver_priv;
73 int retval;
74 uint32_t dcc_buffer[3];
75
76 /* check preconditions */
77 if (bank->num_sectors == 0)
78 return ERROR_FLASH_BANK_NOT_PROBED;
79
80 if (bank->target->state != TARGET_RUNNING)
81 {
82 LOG_ERROR("target has to be running to communicate with the loader");
83 return ERROR_TARGET_NOT_RUNNING;
84 }
85
86 if ((first == 0) && (last == bank->num_sectors - 1))
87 {
88 dcc_buffer[0] = OCL_ERASE_ALL;
89 if ((retval = embeddedice_send(ocl->jtag_info, dcc_buffer, 1) != ERROR_OK))
90 return retval;
91 }
92 else
93 {
94 dcc_buffer[0] = OCL_ERASE_BLOCK;
95 dcc_buffer[1] = first;
96 dcc_buffer[2] = last;
97 if ((retval = embeddedice_send(ocl->jtag_info, dcc_buffer, 3) != ERROR_OK))
98 return retval;
99 }
100
101 /* wait for response, fixed timeout of 1 s */
102 if ((retval = embeddedice_handshake(ocl->jtag_info, EICE_COMM_CTRL_WBIT, 1000) != ERROR_OK))
103 {
104 return retval;
105 }
106
107 /* receive response */
108 if ((retval = embeddedice_receive(ocl->jtag_info, dcc_buffer + 1, 1) != ERROR_OK))
109 return retval;
110
111 if (dcc_buffer[1] != OCL_CMD_DONE)
112 {
113 if (dcc_buffer[0] == OCL_ERASE_ALL)
114 LOG_ERROR("loader response to OCL_ERASE_ALL 0x%08" PRIx32 "", dcc_buffer[1]);
115 else
116 LOG_ERROR("loader response to OCL_ERASE_BLOCK 0x%08" PRIx32 "", dcc_buffer[1]);
117 return ERROR_FLASH_OPERATION_FAILED;
118 }
119
120 return ERROR_OK;
121 }
122
123 static int ocl_protect(struct flash_bank *bank, int set, int first, int last)
124 {
125 return ERROR_OK;
126 }
127
128 static int ocl_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
129 {
130 struct ocl_priv *ocl = bank->driver_priv;
131 int retval;
132 uint32_t *dcc_buffer;
133 uint32_t *dcc_bufptr;
134 int byteofs;
135 int runlen;
136 uint32_t chksum;
137
138 int i;
139
140 /* check preconditions */
141 if (ocl->buflen == 0 || ocl->bufalign == 0)
142 return ERROR_FLASH_BANK_NOT_PROBED;
143
144 if (bank->target->state != TARGET_RUNNING)
145 {
146 LOG_ERROR("target has to be running to communicate with the loader");
147 return ERROR_TARGET_NOT_RUNNING;
148 }
149
150 /* allocate buffer for max. ocl buffer + overhead */
151 dcc_buffer = malloc(sizeof(uint32_t)*(ocl->buflen/4 + 3));
152
153 while (count)
154 {
155 if (count + (offset % ocl->bufalign) > ocl->buflen)
156 runlen = ocl->buflen - (offset % ocl->bufalign);
157 else
158 runlen = count;
159
160 dcc_buffer[0] = OCL_FLASH_BLOCK | runlen;
161 dcc_buffer[1] = offset;
162 dcc_bufptr = &dcc_buffer[2];
163
164 *dcc_bufptr = 0xffffffff;
165 byteofs = (offset % ocl->bufalign) % 4;
166 chksum = OCL_CHKS_INIT;
167
168 /* copy data to DCC buffer in proper byte order and properly aligned */
169 for (i = 0; i < runlen; i++)
170 {
171 switch (byteofs++)
172 {
173 case 0:
174 *dcc_bufptr &= *(buffer++) | 0xffffff00;
175 break;
176 case 1:
177 *dcc_bufptr &= ((*(buffer++)) << 8) | 0xffff00ff;
178 break;
179 case 2:
180 *dcc_bufptr &= ((*(buffer++)) << 16) | 0xff00ffff;
181 break;
182 case 3:
183 *dcc_bufptr &= ((*(buffer++)) << 24) | 0x00ffffff;
184 chksum ^= *(dcc_bufptr++);
185 *dcc_bufptr = 0xffffffff;
186 byteofs = 0;
187 break;
188 }
189 }
190
191 /* add the remaining word to checksum */
192 if (byteofs)
193 chksum ^= *(dcc_bufptr++);
194
195 *(dcc_bufptr++) = chksum;
196
197 /* send the data */
198 if ((retval = embeddedice_send(ocl->jtag_info, dcc_buffer, dcc_bufptr-dcc_buffer)) != ERROR_OK)
199 {
200 free(dcc_buffer);
201 return retval;
202 }
203
204 /* wait for response, fixed timeout of 1 s */
205 if ((retval = embeddedice_handshake(ocl->jtag_info, EICE_COMM_CTRL_WBIT, 1000) != ERROR_OK))
206 {
207 free(dcc_buffer);
208 return retval;
209 }
210
211 /* receive response */
212 if ((retval = embeddedice_receive(ocl->jtag_info, dcc_buffer, 1) != ERROR_OK))
213 {
214 free(dcc_buffer);
215 return retval;
216 }
217
218 if (dcc_buffer[0] != OCL_CMD_DONE)
219 {
220 LOG_ERROR("loader response to OCL_FLASH_BLOCK 0x%08" PRIx32 "", dcc_buffer[0]);
221 free(dcc_buffer);
222 return ERROR_FLASH_OPERATION_FAILED;
223 }
224
225 count -= runlen;
226 offset += runlen;
227 }
228
229 free(dcc_buffer);
230 return ERROR_OK;
231 }
232
233 static int ocl_probe(struct flash_bank *bank)
234 {
235 struct ocl_priv *ocl = bank->driver_priv;
236 int retval;
237 uint32_t dcc_buffer[1];
238 int sectsize;
239 int i;
240
241 /* purge pending data in DCC */
242 embeddedice_receive(ocl->jtag_info, dcc_buffer, 1);
243
244 dcc_buffer[0] = OCL_PROBE;
245 if ((retval = embeddedice_send(ocl->jtag_info, dcc_buffer, 1) != ERROR_OK))
246 return retval;
247
248 /* wait for response, fixed timeout of 1 s */
249 if ((retval = embeddedice_handshake(ocl->jtag_info, EICE_COMM_CTRL_WBIT, 1000) != ERROR_OK))
250 {
251 return retval;
252 }
253
254 /* receive response */
255 if ((retval = embeddedice_receive(ocl->jtag_info, dcc_buffer, 1) != ERROR_OK))
256 return retval;
257
258 if (dcc_buffer[0] != OCL_CMD_DONE)
259 {
260 LOG_ERROR("loader response to OCL_PROBE 0x%08" PRIx32 "", dcc_buffer[0]);
261 return ERROR_FLASH_OPERATION_FAILED;
262 }
263
264 /* receive and fill in parameters, detection of loader is important, receive it one by one */
265 if ((retval = embeddedice_handshake(ocl->jtag_info, EICE_COMM_CTRL_WBIT, 0) != ERROR_OK)
266 || (retval = embeddedice_receive(ocl->jtag_info, dcc_buffer, 1) != ERROR_OK))
267 return retval;
268 bank->base = dcc_buffer[0];
269
270 if ((retval = embeddedice_handshake(ocl->jtag_info, EICE_COMM_CTRL_WBIT, 0) != ERROR_OK)
271 || (retval = embeddedice_receive(ocl->jtag_info, dcc_buffer, 1) != ERROR_OK))
272 return retval;
273 bank->size = dcc_buffer[0];
274
275 if ((retval = embeddedice_handshake(ocl->jtag_info, EICE_COMM_CTRL_WBIT, 0) != ERROR_OK)
276 || (retval = embeddedice_receive(ocl->jtag_info, dcc_buffer, 1) != ERROR_OK))
277 return retval;
278 bank->num_sectors = dcc_buffer[0];
279
280 if ((retval = embeddedice_handshake(ocl->jtag_info, EICE_COMM_CTRL_WBIT, 0) != ERROR_OK)
281 || (retval = embeddedice_receive(ocl->jtag_info, dcc_buffer, 1) != ERROR_OK))
282 return retval;
283 ocl->buflen = dcc_buffer[0] & 0xffff;
284 ocl->bufalign = dcc_buffer[0] >> 16;
285
286 bank->sectors = realloc(bank->sectors, sizeof(struct flash_sector)*bank->num_sectors);
287 if (bank->num_sectors == 0)
288 {
289 LOG_ERROR("number of sectors shall be non zero value");
290 return ERROR_FLASH_BANK_INVALID;
291 }
292 if (bank->size % bank->num_sectors) {
293 LOG_ERROR("bank size not divisible by number of sectors");
294 return ERROR_FLASH_BANK_INVALID;
295 }
296 sectsize = bank->size / bank->num_sectors;
297 for (i = 0; i < bank->num_sectors; i++)
298 {
299 bank->sectors[i].offset = i * sectsize;
300 bank->sectors[i].size = sectsize;
301 bank->sectors[i].is_erased = -1;
302 bank->sectors[i].is_protected = -1;
303 }
304
305 if (ocl->bufalign == 0)
306 ocl->bufalign = 1;
307
308 if (ocl->buflen == 0)
309 {
310 LOG_ERROR("buflen shall be non zero value");
311 return ERROR_FLASH_BANK_INVALID;
312 }
313
314 if ((ocl->bufalign > ocl->buflen) || (ocl->buflen % ocl->bufalign))
315 {
316 LOG_ERROR("buflen is not multiple of bufalign");
317 return ERROR_FLASH_BANK_INVALID;
318 }
319
320 if (ocl->buflen % 4)
321 {
322 LOG_ERROR("buflen shall be divisible by 4");
323 return ERROR_FLASH_BANK_INVALID;
324 }
325
326 return ERROR_OK;
327 }
328
329 static int ocl_info(struct flash_bank *bank, char *buf, int buf_size)
330 {
331 return ERROR_OK;
332 }
333
334 static int ocl_auto_probe(struct flash_bank *bank)
335 {
336 struct ocl_priv *ocl = bank->driver_priv;
337
338 if (ocl->buflen == 0 || ocl->bufalign == 0)
339 return ERROR_FLASH_BANK_NOT_PROBED;
340
341 return ERROR_OK;
342 }
343
344 struct flash_driver ocl_flash = {
345 .name = "ocl",
346 .flash_bank_command = ocl_flash_bank_command,
347 .erase = ocl_erase,
348 .protect = ocl_protect,
349 .write = ocl_write,
350 .read = default_flash_read,
351 .probe = ocl_probe,
352 .erase_check = ocl_erase_check,
353 .protect_check = ocl_protect_check,
354 .info = ocl_info,
355 .auto_probe = ocl_auto_probe,
356 };

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