src/flash/s3c2440_nand.c

   1 /***************************************************************************
   2  *   Copyright (C) 2007, 2008 by Ben Dooks                                 *
   3  *   ben@fluff.org                                                         *
   4  *                                                                         *
   5  *   This program is free software; you can redistribute it and/or modify  *
   6  *   it under the terms of the GNU General Public License as published by  *
   7  *   the Free Software Foundation; either version 2 of the License, or     *
   8  *   (at your option) any later version.                                   *
   9  *                                                                         *
  10  *   This program is distributed in the hope that it will be useful,       *
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  13  *   GNU General Public License for more details.                          *
  14  *                                                                         *
  15  *   You should have received a copy of the GNU General Public License     *
  16  *   along with this program; if not, write to the                         *
  17  *   Free Software Foundation, Inc.,                                       *
  18  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  19  ***************************************************************************/
  20
  21 /*
  22  * S3C2440 OpenOCD NAND Flash controller support.
  23  *
  24  * Many thanks to Simtec Electronics for sponsoring this work.
  25  */
  26
  27 #ifdef HAVE_CONFIG_H
  28 #include "config.h"
  29 #endif
  30
  31 #include "s3c24xx_nand.h"
  32
  33
  34 static int s3c2440_nand_device_command(struct command_context_s *cmd_ctx, char *cmd,
  35                                 char **args, int argc,
  36                                 struct nand_device_s *device)
  37 {
  38         s3c24xx_nand_controller_t *info;
  39
  40         info = s3c24xx_nand_device_command(cmd_ctx, cmd, args, argc, device);
  41         if (info == NULL) {
  42                 return ERROR_NAND_DEVICE_INVALID;
  43         }
  44
  45         /* fill in the address fields for the core device */
  46         info->cmd = S3C2440_NFCMD;
  47         info->addr = S3C2440_NFADDR;
  48         info->data = S3C2440_NFDATA;
  49         info->nfstat = S3C2440_NFSTAT;
  50
  51         return ERROR_OK;
  52 }
  53
  54 static int s3c2440_init(struct nand_device_s *device)
  55 {
  56         s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
  57         target_t *target = s3c24xx_info->target;
  58
  59         target_write_u32(target, S3C2410_NFCONF,
  60                          S3C2440_NFCONF_TACLS(3) |
  61                          S3C2440_NFCONF_TWRPH0(7) |
  62                          S3C2440_NFCONF_TWRPH1(7));
  63
  64         target_write_u32(target, S3C2440_NFCONT,
  65                          S3C2440_NFCONT_INITECC | S3C2440_NFCONT_ENABLE);
  66
  67         return ERROR_OK;
  68 }
  69
  70 int s3c2440_nand_ready(struct nand_device_s *device, int timeout)
  71 {
  72         s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
  73         target_t *target = s3c24xx_info->target;
  74         uint8_t status;
  75
  76         if (target->state != TARGET_HALTED) {
  77                 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
  78                 return ERROR_NAND_OPERATION_FAILED;
  79         }
  80
  81         do {
  82                 target_read_u8(target, s3c24xx_info->nfstat, &status);
  83
  84                 if (status & S3C2440_NFSTAT_READY)
  85                         return 1;
  86
  87                 alive_sleep(1);
  88         } while (timeout-- > 0);
  89
  90
  91         return 0;
  92 }
  93
  94 /* use the fact we can read/write 4 bytes in one go via a single 32bit op */
  95
  96 int s3c2440_read_block_data(struct nand_device_s *device, uint8_t *data, int data_size)
  97 {
  98         s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
  99         target_t *target = s3c24xx_info->target;
 100         uint32_t nfdata = s3c24xx_info->data;
 101         uint32_t tmp;
 102
 103         LOG_INFO("%s: reading data: %p, %p, %d\n", __func__, device, data, data_size);
 104
 105         if (target->state != TARGET_HALTED) {
 106                 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
 107                 return ERROR_NAND_OPERATION_FAILED;
 108         }
 109
 110         while (data_size >= 4) {
 111                 target_read_u32(target, nfdata, &tmp);
 112
 113                 data[0] = tmp;
 114                 data[1] = tmp >> 8;
 115                 data[2] = tmp >> 16;
 116                 data[3] = tmp >> 24;
 117
 118                 data_size -= 4;
 119                 data += 4;
 120         }
 121
 122         while (data_size > 0) {
 123                 target_read_u8(target, nfdata, data);
 124
 125                 data_size -= 1;
 126                 data += 1;
 127         }
 128
 129         return ERROR_OK;
 130 }
 131
 132 int s3c2440_write_block_data(struct nand_device_s *device, uint8_t *data, int data_size)
 133 {
 134         s3c24xx_nand_controller_t *s3c24xx_info = device->controller_priv;
 135         target_t *target = s3c24xx_info->target;
 136         uint32_t nfdata = s3c24xx_info->data;
 137         uint32_t tmp;
 138
 139         if (target->state != TARGET_HALTED) {
 140                 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
 141                 return ERROR_NAND_OPERATION_FAILED;
 142         }
 143
 144         while (data_size >= 4) {
 145                 tmp = le_to_h_u32(data);
 146                 target_write_u32(target, nfdata, tmp);
 147
 148                 data_size -= 4;
 149                 data += 4;
 150         }
 151
 152         while (data_size > 0) {
 153                 target_write_u8(target, nfdata, *data);
 154
 155                 data_size -= 1;
 156                 data += 1;
 157         }
 158
 159         return ERROR_OK;
 160 }
 161
 162 nand_flash_controller_t s3c2440_nand_controller = {
 163                 .name = "s3c2440",
 164                 .nand_device_command = &s3c2440_nand_device_command,
 165                 .register_commands = &s3c24xx_register_commands,
 166                 .init = &s3c2440_init,
 167                 .reset = &s3c24xx_reset,
 168                 .command = &s3c24xx_command,
 169                 .address = &s3c24xx_address,
 170                 .write_data = &s3c24xx_write_data,
 171                 .read_data = &s3c24xx_read_data,
 172                 .write_page = s3c24xx_write_page,
 173                 .read_page = s3c24xx_read_page,
 174                 .write_block_data = &s3c2440_write_block_data,
 175                 .read_block_data = &s3c2440_read_block_data,
 176                 .controller_ready = &s3c24xx_controller_ready,
 177                 .nand_ready = &s3c2440_nand_ready,
 178         };