1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /***************************************************************************
4 * Copyright (C) 2005 by Dominic Rath *
5 * Dominic.Rath@gmx.de *
7 * Copyright (C) 2007,2008 Øyvind Harboe *
8 * oyvind.harboe@zylin.com *
9 ***************************************************************************/
11 /* 2014-12: Addition of the SWD protocol support is based on the initial work
12 * by Paul Fertser and modifications by Jean-Christian de Rivaz. */
18 #include <jtag/jtag.h> /* Added to avoid include loop in commands.h */
20 #include <jtag/interface.h>
21 #include <jtag/commands.h>
23 #include <helper/time_support.h>
25 /* Timeout for retrying on SWD WAIT in msec */
26 #define SWD_WAIT_TIMEOUT 500
29 * Function bitbang_stableclocks
30 * issues a number of clock cycles while staying in a stable state.
31 * Because the TMS value required to stay in the RESET state is a 1, whereas
32 * the TMS value required to stay in any of the other stable states is a 0,
33 * this function checks the current stable state to decide on the value of TMS
36 static int bitbang_stableclocks(int num_cycles
);
38 static void bitbang_swd_write_reg(uint8_t cmd
, uint32_t value
, uint32_t ap_delay_clk
);
40 struct bitbang_interface
*bitbang_interface
;
42 /* DANGER!!!! clock absolutely *MUST* be 0 in idle or reset won't work!
44 * Set this to 1 and str912 reset halt will fail.
46 * If someone can submit a patch with an explanation it will be greatly
47 * appreciated, but as far as I can tell (ØH) DCLK is generated upon
48 * clk = 0 in TAP_IDLE. Good luck deducing that from the ARM documentation!
49 * The ARM documentation uses the term "DCLK is asserted while in the TAP_IDLE
50 * state". With hardware there is no such thing as *while* in a state. There
51 * are only edges. So clk => 0 is in fact a very subtle state transition that
52 * happens *while* in the TAP_IDLE state. "#&¤"#¤&"#&"#&
54 * For "reset halt" the last thing that happens before srst is asserted
55 * is that the breakpoint is set up. If DCLK is not wiggled one last
56 * time before the reset, then the breakpoint is not set up and
57 * "reset halt" will fail to halt.
60 #define CLOCK_IDLE() 0
62 /* The bitbang driver leaves the TCK 0 when in idle */
63 static void bitbang_end_state(tap_state_t state
)
65 assert(tap_is_state_stable(state
));
66 tap_set_end_state(state
);
69 static int bitbang_state_move(int skip
)
72 uint8_t tms_scan
= tap_get_tms_path(tap_get_state(), tap_get_end_state());
73 int tms_count
= tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
75 for (i
= skip
; i
< tms_count
; i
++) {
76 tms
= (tms_scan
>> i
) & 1;
77 if (bitbang_interface
->write(0, tms
, 0) != ERROR_OK
)
79 if (bitbang_interface
->write(1, tms
, 0) != ERROR_OK
)
82 if (bitbang_interface
->write(CLOCK_IDLE(), tms
, 0) != ERROR_OK
)
85 tap_set_state(tap_get_end_state());
90 * Clock a bunch of TMS (or SWDIO) transitions, to change the JTAG
91 * (or SWD) state machine.
93 static int bitbang_execute_tms(struct jtag_command
*cmd
)
95 unsigned num_bits
= cmd
->cmd
.tms
->num_bits
;
96 const uint8_t *bits
= cmd
->cmd
.tms
->bits
;
98 LOG_DEBUG_IO("TMS: %d bits", num_bits
);
101 for (unsigned i
= 0; i
< num_bits
; i
++) {
102 tms
= ((bits
[i
/8] >> (i
% 8)) & 1);
103 if (bitbang_interface
->write(0, tms
, 0) != ERROR_OK
)
105 if (bitbang_interface
->write(1, tms
, 0) != ERROR_OK
)
108 if (bitbang_interface
->write(CLOCK_IDLE(), tms
, 0) != ERROR_OK
)
114 static int bitbang_path_move(struct pathmove_command
*cmd
)
116 int num_states
= cmd
->num_states
;
122 if (tap_state_transition(tap_get_state(), false) == cmd
->path
[state_count
])
124 else if (tap_state_transition(tap_get_state(), true) == cmd
->path
[state_count
])
127 LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition",
128 tap_state_name(tap_get_state()),
129 tap_state_name(cmd
->path
[state_count
]));
133 if (bitbang_interface
->write(0, tms
, 0) != ERROR_OK
)
135 if (bitbang_interface
->write(1, tms
, 0) != ERROR_OK
)
138 tap_set_state(cmd
->path
[state_count
]);
143 if (bitbang_interface
->write(CLOCK_IDLE(), tms
, 0) != ERROR_OK
)
146 tap_set_end_state(tap_get_state());
150 static int bitbang_runtest(int num_cycles
)
154 tap_state_t saved_end_state
= tap_get_end_state();
156 /* only do a state_move when we're not already in IDLE */
157 if (tap_get_state() != TAP_IDLE
) {
158 bitbang_end_state(TAP_IDLE
);
159 if (bitbang_state_move(0) != ERROR_OK
)
163 /* execute num_cycles */
164 for (i
= 0; i
< num_cycles
; i
++) {
165 if (bitbang_interface
->write(0, 0, 0) != ERROR_OK
)
167 if (bitbang_interface
->write(1, 0, 0) != ERROR_OK
)
170 if (bitbang_interface
->write(CLOCK_IDLE(), 0, 0) != ERROR_OK
)
173 /* finish in end_state */
174 bitbang_end_state(saved_end_state
);
175 if (tap_get_state() != tap_get_end_state())
176 if (bitbang_state_move(0) != ERROR_OK
)
182 static int bitbang_stableclocks(int num_cycles
)
184 int tms
= (tap_get_state() == TAP_RESET
? 1 : 0);
187 /* send num_cycles clocks onto the cable */
188 for (i
= 0; i
< num_cycles
; i
++) {
189 if (bitbang_interface
->write(1, tms
, 0) != ERROR_OK
)
191 if (bitbang_interface
->write(0, tms
, 0) != ERROR_OK
)
198 static int bitbang_scan(bool ir_scan
, enum scan_type type
, uint8_t *buffer
,
201 tap_state_t saved_end_state
= tap_get_end_state();
205 (tap_get_state() == TAP_DRSHIFT
)) ||
206 (ir_scan
&& (tap_get_state() == TAP_IRSHIFT
)))) {
208 bitbang_end_state(TAP_IRSHIFT
);
210 bitbang_end_state(TAP_DRSHIFT
);
212 if (bitbang_state_move(0) != ERROR_OK
)
214 bitbang_end_state(saved_end_state
);
218 for (bit_cnt
= 0; bit_cnt
< scan_size
; bit_cnt
++) {
219 int tms
= (bit_cnt
== scan_size
-1) ? 1 : 0;
221 int bytec
= bit_cnt
/8;
222 int bcval
= 1 << (bit_cnt
% 8);
224 /* if we're just reading the scan, but don't care about the output
225 * default to outputting 'low', this also makes valgrind traces more readable,
226 * as it removes the dependency on an uninitialised value
229 if ((type
!= SCAN_IN
) && (buffer
[bytec
] & bcval
))
232 if (bitbang_interface
->write(0, tms
, tdi
) != ERROR_OK
)
235 if (type
!= SCAN_OUT
) {
236 if (bitbang_interface
->buf_size
) {
237 if (bitbang_interface
->sample() != ERROR_OK
)
241 switch (bitbang_interface
->read()) {
243 buffer
[bytec
] &= ~bcval
;
246 buffer
[bytec
] |= bcval
;
254 if (bitbang_interface
->write(1, tms
, tdi
) != ERROR_OK
)
257 if (type
!= SCAN_OUT
&& bitbang_interface
->buf_size
&&
258 (buffered
== bitbang_interface
->buf_size
||
259 bit_cnt
== scan_size
- 1)) {
260 for (unsigned i
= bit_cnt
+ 1 - buffered
; i
<= bit_cnt
; i
++) {
261 switch (bitbang_interface
->read_sample()) {
263 buffer
[i
/8] &= ~(1 << (i
% 8));
266 buffer
[i
/8] |= 1 << (i
% 8);
276 if (tap_get_state() != tap_get_end_state()) {
277 /* we *KNOW* the above loop transitioned out of
278 * the shift state, so we skip the first state
279 * and move directly to the end state.
281 if (bitbang_state_move(1) != ERROR_OK
)
287 static void bitbang_sleep(unsigned int microseconds
)
289 if (bitbang_interface
->sleep
) {
290 bitbang_interface
->sleep(microseconds
);
292 jtag_sleep(microseconds
);
296 int bitbang_execute_queue(struct jtag_command
*cmd_queue
)
298 struct jtag_command
*cmd
= cmd_queue
; /* currently processed command */
304 if (!bitbang_interface
) {
305 LOG_ERROR("BUG: Bitbang interface called, but not yet initialized");
309 /* return ERROR_OK, unless a jtag_read_buffer returns a failed check
310 * that wasn't handled by a caller-provided error handler
314 if (bitbang_interface
->blink
) {
315 if (bitbang_interface
->blink(1) != ERROR_OK
)
322 LOG_DEBUG_IO("runtest %i cycles, end in %s",
323 cmd
->cmd
.runtest
->num_cycles
,
324 tap_state_name(cmd
->cmd
.runtest
->end_state
));
325 bitbang_end_state(cmd
->cmd
.runtest
->end_state
);
326 if (bitbang_runtest(cmd
->cmd
.runtest
->num_cycles
) != ERROR_OK
)
330 case JTAG_STABLECLOCKS
:
331 /* this is only allowed while in a stable state. A check for a stable
332 * state was done in jtag_add_clocks()
334 if (bitbang_stableclocks(cmd
->cmd
.stableclocks
->num_cycles
) != ERROR_OK
)
339 LOG_DEBUG_IO("statemove end in %s",
340 tap_state_name(cmd
->cmd
.statemove
->end_state
));
341 bitbang_end_state(cmd
->cmd
.statemove
->end_state
);
342 if (bitbang_state_move(0) != ERROR_OK
)
346 LOG_DEBUG_IO("pathmove: %i states, end in %s",
347 cmd
->cmd
.pathmove
->num_states
,
348 tap_state_name(cmd
->cmd
.pathmove
->path
[cmd
->cmd
.pathmove
->num_states
- 1]));
349 if (bitbang_path_move(cmd
->cmd
.pathmove
) != ERROR_OK
)
353 bitbang_end_state(cmd
->cmd
.scan
->end_state
);
354 scan_size
= jtag_build_buffer(cmd
->cmd
.scan
, &buffer
);
355 LOG_DEBUG_IO("%s scan %d bits; end in %s",
356 (cmd
->cmd
.scan
->ir_scan
) ? "IR" : "DR",
358 tap_state_name(cmd
->cmd
.scan
->end_state
));
359 type
= jtag_scan_type(cmd
->cmd
.scan
);
360 if (bitbang_scan(cmd
->cmd
.scan
->ir_scan
, type
, buffer
,
361 scan_size
) != ERROR_OK
)
363 if (jtag_read_buffer(buffer
, cmd
->cmd
.scan
) != ERROR_OK
)
364 retval
= ERROR_JTAG_QUEUE_FAILED
;
368 LOG_DEBUG_IO("sleep %" PRIu32
, cmd
->cmd
.sleep
->us
);
369 if (bitbang_interface
->flush
&& (bitbang_interface
->flush() != ERROR_OK
))
371 bitbang_sleep(cmd
->cmd
.sleep
->us
);
374 retval
= bitbang_execute_tms(cmd
);
377 LOG_ERROR("BUG: unknown JTAG command type encountered");
382 if (bitbang_interface
->blink
) {
383 if (bitbang_interface
->blink(0) != ERROR_OK
)
390 static int queued_retval
;
392 static int bitbang_swd_init(void)
394 LOG_DEBUG("bitbang_swd_init");
398 static void bitbang_swd_exchange(bool rnw
, uint8_t buf
[], unsigned int offset
, unsigned int bit_cnt
)
400 if (bitbang_interface
->blink
) {
401 /* FIXME: we should manage errors */
402 bitbang_interface
->blink(1);
405 for (unsigned int i
= offset
; i
< bit_cnt
+ offset
; i
++) {
407 int bcval
= 1 << (i
% 8);
408 int swdio
= !rnw
&& (buf
[bytec
] & bcval
);
410 bitbang_interface
->swd_write(0, swdio
);
413 if (bitbang_interface
->swdio_read())
416 buf
[bytec
] &= ~bcval
;
419 bitbang_interface
->swd_write(1, swdio
);
422 if (bitbang_interface
->blink
) {
423 /* FIXME: we should manage errors */
424 bitbang_interface
->blink(0);
428 static int bitbang_swd_switch_seq(enum swd_special_seq seq
)
432 LOG_DEBUG_IO("SWD line reset");
433 bitbang_swd_exchange(false, (uint8_t *)swd_seq_line_reset
, 0, swd_seq_line_reset_len
);
436 LOG_DEBUG("JTAG-to-SWD");
437 bitbang_swd_exchange(false, (uint8_t *)swd_seq_jtag_to_swd
, 0, swd_seq_jtag_to_swd_len
);
439 case JTAG_TO_DORMANT
:
440 LOG_DEBUG("JTAG-to-DORMANT");
441 bitbang_swd_exchange(false, (uint8_t *)swd_seq_jtag_to_dormant
, 0, swd_seq_jtag_to_dormant_len
);
444 LOG_DEBUG("SWD-to-JTAG");
445 bitbang_swd_exchange(false, (uint8_t *)swd_seq_swd_to_jtag
, 0, swd_seq_swd_to_jtag_len
);
448 LOG_DEBUG("SWD-to-DORMANT");
449 bitbang_swd_exchange(false, (uint8_t *)swd_seq_swd_to_dormant
, 0, swd_seq_swd_to_dormant_len
);
452 LOG_DEBUG("DORMANT-to-SWD");
453 bitbang_swd_exchange(false, (uint8_t *)swd_seq_dormant_to_swd
, 0, swd_seq_dormant_to_swd_len
);
455 case DORMANT_TO_JTAG
:
456 LOG_DEBUG("DORMANT-to-JTAG");
457 bitbang_swd_exchange(false, (uint8_t *)swd_seq_dormant_to_jtag
, 0, swd_seq_dormant_to_jtag_len
);
460 LOG_ERROR("Sequence %d not supported", seq
);
467 static void swd_clear_sticky_errors(void)
469 bitbang_swd_write_reg(swd_cmd(false, false, DP_ABORT
),
470 STKCMPCLR
| STKERRCLR
| WDERRCLR
| ORUNERRCLR
, 0);
473 static void bitbang_swd_read_reg(uint8_t cmd
, uint32_t *value
, uint32_t ap_delay_clk
)
475 assert(cmd
& SWD_CMD_RNW
);
477 if (queued_retval
!= ERROR_OK
) {
478 LOG_DEBUG("Skip bitbang_swd_read_reg because queued_retval=%d", queued_retval
);
482 int64_t timeout
= timeval_ms() + SWD_WAIT_TIMEOUT
;
483 for (unsigned int retry
= 0;; retry
++) {
484 uint8_t trn_ack_data_parity_trn
[DIV_ROUND_UP(4 + 3 + 32 + 1 + 4, 8)];
486 cmd
|= SWD_CMD_START
| SWD_CMD_PARK
;
487 bitbang_swd_exchange(false, &cmd
, 0, 8);
489 bitbang_interface
->swdio_drive(false);
490 bitbang_swd_exchange(true, trn_ack_data_parity_trn
, 0, 1 + 3 + 32 + 1 + 1);
491 bitbang_interface
->swdio_drive(true);
493 int ack
= buf_get_u32(trn_ack_data_parity_trn
, 1, 3);
494 uint32_t data
= buf_get_u32(trn_ack_data_parity_trn
, 1 + 3, 32);
495 int parity
= buf_get_u32(trn_ack_data_parity_trn
, 1 + 3 + 32, 1);
497 LOG_CUSTOM_LEVEL((ack
!= SWD_ACK_OK
&& (retry
== 0 || ack
!= SWD_ACK_WAIT
))
498 ? LOG_LVL_DEBUG
: LOG_LVL_DEBUG_IO
,
499 "%s %s read reg %X = %08" PRIx32
,
500 ack
== SWD_ACK_OK
? "OK" : ack
== SWD_ACK_WAIT
? "WAIT" : ack
== SWD_ACK_FAULT
? "FAULT" : "JUNK",
501 cmd
& SWD_CMD_APNDP
? "AP" : "DP",
502 (cmd
& SWD_CMD_A32
) >> 1,
505 if (ack
== SWD_ACK_WAIT
&& timeval_ms() <= timeout
) {
506 swd_clear_sticky_errors();
513 LOG_DEBUG("SWD WAIT: retried %u times", retry
);
515 if (ack
!= SWD_ACK_OK
) {
516 queued_retval
= swd_ack_to_error_code(ack
);
520 if (parity
!= parity_u32(data
)) {
521 LOG_ERROR("Wrong parity detected");
522 queued_retval
= ERROR_FAIL
;
527 if (cmd
& SWD_CMD_APNDP
)
528 bitbang_swd_exchange(true, NULL
, 0, ap_delay_clk
);
533 static void bitbang_swd_write_reg(uint8_t cmd
, uint32_t value
, uint32_t ap_delay_clk
)
535 assert(!(cmd
& SWD_CMD_RNW
));
537 if (queued_retval
!= ERROR_OK
) {
538 LOG_DEBUG("Skip bitbang_swd_write_reg because queued_retval=%d", queued_retval
);
542 int64_t timeout
= timeval_ms() + SWD_WAIT_TIMEOUT
;
544 /* Devices do not reply to DP_TARGETSEL write cmd, ignore received ack */
545 bool check_ack
= swd_cmd_returns_ack(cmd
);
547 /* init the array to silence scan-build */
548 uint8_t trn_ack_data_parity_trn
[DIV_ROUND_UP(4 + 3 + 32 + 1 + 4, 8)] = {0};
549 for (unsigned int retry
= 0;; retry
++) {
550 buf_set_u32(trn_ack_data_parity_trn
, 1 + 3 + 1, 32, value
);
551 buf_set_u32(trn_ack_data_parity_trn
, 1 + 3 + 1 + 32, 1, parity_u32(value
));
553 cmd
|= SWD_CMD_START
| SWD_CMD_PARK
;
554 bitbang_swd_exchange(false, &cmd
, 0, 8);
556 bitbang_interface
->swdio_drive(false);
557 bitbang_swd_exchange(true, trn_ack_data_parity_trn
, 0, 1 + 3);
559 /* Avoid a glitch on SWDIO when changing the direction to output.
560 * To keep performance penalty minimal, pre-write the first data
561 * bit to SWDIO GPIO output buffer while clocking the turnaround bit.
562 * Following swdio_drive(true) outputs the pre-written value
563 * and the same value is rewritten by the next swd_write()
564 * instead of glitching SWDIO
565 * HiZ/pull-up --------------> 0 -------------> 1
566 * swdio_drive(true) swd_write(0,1)
567 * in case of data bit 0 = 1
569 bitbang_swd_exchange(false, trn_ack_data_parity_trn
, 1 + 3 + 1, 1);
570 bitbang_interface
->swdio_drive(true);
571 bitbang_swd_exchange(false, trn_ack_data_parity_trn
, 1 + 3 + 1, 32 + 1);
573 int ack
= buf_get_u32(trn_ack_data_parity_trn
, 1, 3);
574 LOG_CUSTOM_LEVEL((check_ack
&& ack
!= SWD_ACK_OK
&& (retry
== 0 || ack
!= SWD_ACK_WAIT
))
575 ? LOG_LVL_DEBUG
: LOG_LVL_DEBUG_IO
,
576 "%s%s %s write reg %X = %08" PRIx32
,
577 check_ack
? "" : "ack ignored ",
578 ack
== SWD_ACK_OK
? "OK" : ack
== SWD_ACK_WAIT
? "WAIT" : ack
== SWD_ACK_FAULT
? "FAULT" : "JUNK",
579 cmd
& SWD_CMD_APNDP
? "AP" : "DP",
580 (cmd
& SWD_CMD_A32
) >> 1,
581 buf_get_u32(trn_ack_data_parity_trn
, 1 + 3 + 1, 32));
583 if (check_ack
&& ack
== SWD_ACK_WAIT
&& timeval_ms() <= timeout
) {
584 swd_clear_sticky_errors();
592 LOG_DEBUG("SWD WAIT: retried %u times", retry
);
594 if (check_ack
&& ack
!= SWD_ACK_OK
) {
595 queued_retval
= swd_ack_to_error_code(ack
);
599 if (cmd
& SWD_CMD_APNDP
)
600 bitbang_swd_exchange(true, NULL
, 0, ap_delay_clk
);
605 static int bitbang_swd_run_queue(void)
607 /* A transaction must be followed by another transaction or at least 8 idle cycles to
608 * ensure that data is clocked through the AP. */
609 bitbang_swd_exchange(true, NULL
, 0, 8);
611 int retval
= queued_retval
;
612 queued_retval
= ERROR_OK
;
613 LOG_DEBUG_IO("SWD queue return value: %02x", retval
);
617 const struct swd_driver bitbang_swd
= {
618 .init
= bitbang_swd_init
,
619 .switch_seq
= bitbang_swd_switch_seq
,
620 .read_reg
= bitbang_swd_read_reg
,
621 .write_reg
= bitbang_swd_write_reg
,
622 .run
= bitbang_swd_run_queue
,
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