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jtag/libusb_helper: permit adapters to compute their custom serials
[openocd.git] / src / jtag / drivers / stlink_usb.c
1 /***************************************************************************
2 * SWIM contributions by Ake Rehnman *
3 * Copyright (C) 2017 Ake Rehnman *
4 * ake.rehnman(at)gmail.com *
5 * *
6 * Copyright (C) 2011-2012 by Mathias Kuester *
7 * Mathias Kuester <kesmtp@freenet.de> *
8 * *
9 * Copyright (C) 2012 by Spencer Oliver *
10 * spen@spen-soft.co.uk *
11 * *
12 * This code is based on https://github.com/texane/stlink *
13 * *
14 * This program is free software; you can redistribute it and/or modify *
15 * it under the terms of the GNU General Public License as published by *
16 * the Free Software Foundation; either version 2 of the License, or *
17 * (at your option) any later version. *
18 * *
19 * This program is distributed in the hope that it will be useful, *
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
22 * GNU General Public License for more details. *
23 * *
24 * You should have received a copy of the GNU General Public License *
25 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
26 ***************************************************************************/
27
28 #ifdef HAVE_CONFIG_H
29 #include "config.h"
30 #endif
31
32 /* project specific includes */
33 #include <helper/binarybuffer.h>
34 #include <helper/bits.h>
35 #include <jtag/interface.h>
36 #include <jtag/hla/hla_layout.h>
37 #include <jtag/hla/hla_transport.h>
38 #include <jtag/hla/hla_interface.h>
39 #include <target/target.h>
40 #include <transport/transport.h>
41
42 #include <target/cortex_m.h>
43
44 #include "libusb_helper.h"
45
46 #ifdef HAVE_LIBUSB1
47 #define USE_LIBUSB_ASYNCIO
48 #endif
49
50 #define ENDPOINT_IN 0x80
51 #define ENDPOINT_OUT 0x00
52
53 #define STLINK_WRITE_TIMEOUT 1000
54 #define STLINK_READ_TIMEOUT 1000
55
56 #define STLINK_NULL_EP 0
57 #define STLINK_RX_EP (1|ENDPOINT_IN)
58 #define STLINK_TX_EP (2|ENDPOINT_OUT)
59 #define STLINK_TRACE_EP (3|ENDPOINT_IN)
60
61 #define STLINK_V2_1_TX_EP (1|ENDPOINT_OUT)
62 #define STLINK_V2_1_TRACE_EP (2|ENDPOINT_IN)
63
64 #define STLINK_SG_SIZE (31)
65 #define STLINK_DATA_SIZE (4096)
66 #define STLINK_CMD_SIZE_V2 (16)
67 #define STLINK_CMD_SIZE_V1 (10)
68
69 #define STLINK_V1_PID (0x3744)
70 #define STLINK_V2_PID (0x3748)
71 #define STLINK_V2_1_PID (0x374B)
72 #define STLINK_V2_1_NO_MSD_PID (0x3752)
73 #define STLINK_V3_USBLOADER_PID (0x374D)
74 #define STLINK_V3E_PID (0x374E)
75 #define STLINK_V3S_PID (0x374F)
76 #define STLINK_V3_2VCP_PID (0x3753)
77
78 /*
79 * ST-Link/V1, ST-Link/V2 and ST-Link/V2.1 are full-speed USB devices and
80 * this limits the bulk packet size and the 8bit read/writes to max 64 bytes.
81 * STLINK-V3 is a high speed USB 2.0 and the limit is 512 bytes from FW V3J6.
82 */
83 #define STLINK_MAX_RW8 (64)
84 #define STLINKV3_MAX_RW8 (512)
85
86 /* "WAIT" responses will be retried (with exponential backoff) at
87 * most this many times before failing to caller.
88 */
89 #define MAX_WAIT_RETRIES 8
90
91 enum stlink_jtag_api_version {
92 STLINK_JTAG_API_V1 = 1,
93 STLINK_JTAG_API_V2,
94 STLINK_JTAG_API_V3,
95 };
96
97 /** */
98 struct stlink_usb_version {
99 /** */
100 int stlink;
101 /** */
102 int jtag;
103 /** */
104 int swim;
105 /** jtag api version supported */
106 enum stlink_jtag_api_version jtag_api;
107 /** one bit for each feature supported. See macros STLINK_F_* */
108 uint32_t flags;
109 };
110
111 /** */
112 struct stlink_usb_handle_s {
113 /** */
114 struct libusb_device_handle *fd;
115 /** */
116 struct libusb_transfer *trans;
117 /** */
118 uint8_t rx_ep;
119 /** */
120 uint8_t tx_ep;
121 /** */
122 uint8_t trace_ep;
123 /** */
124 uint8_t cmdbuf[STLINK_SG_SIZE];
125 /** */
126 uint8_t cmdidx;
127 /** */
128 uint8_t direction;
129 /** */
130 uint8_t databuf[STLINK_DATA_SIZE];
131 /** */
132 uint32_t max_mem_packet;
133 /** */
134 enum hl_transports transport;
135 /** */
136 struct stlink_usb_version version;
137 /** */
138 uint16_t vid;
139 /** */
140 uint16_t pid;
141 /** */
142 struct {
143 /** whether SWO tracing is enabled or not */
144 bool enabled;
145 /** trace module source clock */
146 uint32_t source_hz;
147 } trace;
148 /** reconnect is needed next time we try to query the
149 * status */
150 bool reconnect_pending;
151 };
152
153 #define STLINK_SWIM_ERR_OK 0x00
154 #define STLINK_SWIM_BUSY 0x01
155 #define STLINK_DEBUG_ERR_OK 0x80
156 #define STLINK_DEBUG_ERR_FAULT 0x81
157 #define STLINK_SWD_AP_WAIT 0x10
158 #define STLINK_SWD_AP_FAULT 0x11
159 #define STLINK_SWD_AP_ERROR 0x12
160 #define STLINK_SWD_AP_PARITY_ERROR 0x13
161 #define STLINK_JTAG_GET_IDCODE_ERROR 0x09
162 #define STLINK_JTAG_WRITE_ERROR 0x0c
163 #define STLINK_JTAG_WRITE_VERIF_ERROR 0x0d
164 #define STLINK_SWD_DP_WAIT 0x14
165 #define STLINK_SWD_DP_FAULT 0x15
166 #define STLINK_SWD_DP_ERROR 0x16
167 #define STLINK_SWD_DP_PARITY_ERROR 0x17
168
169 #define STLINK_SWD_AP_WDATA_ERROR 0x18
170 #define STLINK_SWD_AP_STICKY_ERROR 0x19
171 #define STLINK_SWD_AP_STICKYORUN_ERROR 0x1a
172
173 #define STLINK_BAD_AP_ERROR 0x1d
174
175 #define STLINK_CORE_RUNNING 0x80
176 #define STLINK_CORE_HALTED 0x81
177 #define STLINK_CORE_STAT_UNKNOWN -1
178
179 #define STLINK_GET_VERSION 0xF1
180 #define STLINK_DEBUG_COMMAND 0xF2
181 #define STLINK_DFU_COMMAND 0xF3
182 #define STLINK_SWIM_COMMAND 0xF4
183 #define STLINK_GET_CURRENT_MODE 0xF5
184 #define STLINK_GET_TARGET_VOLTAGE 0xF7
185
186 #define STLINK_DEV_DFU_MODE 0x00
187 #define STLINK_DEV_MASS_MODE 0x01
188 #define STLINK_DEV_DEBUG_MODE 0x02
189 #define STLINK_DEV_SWIM_MODE 0x03
190 #define STLINK_DEV_BOOTLOADER_MODE 0x04
191 #define STLINK_DEV_UNKNOWN_MODE -1
192
193 #define STLINK_DFU_EXIT 0x07
194
195 /*
196 STLINK_SWIM_ENTER_SEQ
197 1.3ms low then 750Hz then 1.5kHz
198
199 STLINK_SWIM_GEN_RST
200 STM8 DM pulls reset pin low 50us
201
202 STLINK_SWIM_SPEED
203 uint8_t (0=low|1=high)
204
205 STLINK_SWIM_WRITEMEM
206 uint16_t length
207 uint32_t address
208
209 STLINK_SWIM_RESET
210 send syncronization seq (16us low, response 64 clocks low)
211 */
212 #define STLINK_SWIM_ENTER 0x00
213 #define STLINK_SWIM_EXIT 0x01
214 #define STLINK_SWIM_READ_CAP 0x02
215 #define STLINK_SWIM_SPEED 0x03
216 #define STLINK_SWIM_ENTER_SEQ 0x04
217 #define STLINK_SWIM_GEN_RST 0x05
218 #define STLINK_SWIM_RESET 0x06
219 #define STLINK_SWIM_ASSERT_RESET 0x07
220 #define STLINK_SWIM_DEASSERT_RESET 0x08
221 #define STLINK_SWIM_READSTATUS 0x09
222 #define STLINK_SWIM_WRITEMEM 0x0a
223 #define STLINK_SWIM_READMEM 0x0b
224 #define STLINK_SWIM_READBUF 0x0c
225
226 #define STLINK_DEBUG_GETSTATUS 0x01
227 #define STLINK_DEBUG_FORCEDEBUG 0x02
228 #define STLINK_DEBUG_APIV1_RESETSYS 0x03
229 #define STLINK_DEBUG_APIV1_READALLREGS 0x04
230 #define STLINK_DEBUG_APIV1_READREG 0x05
231 #define STLINK_DEBUG_APIV1_WRITEREG 0x06
232 #define STLINK_DEBUG_READMEM_32BIT 0x07
233 #define STLINK_DEBUG_WRITEMEM_32BIT 0x08
234 #define STLINK_DEBUG_RUNCORE 0x09
235 #define STLINK_DEBUG_STEPCORE 0x0a
236 #define STLINK_DEBUG_APIV1_SETFP 0x0b
237 #define STLINK_DEBUG_READMEM_8BIT 0x0c
238 #define STLINK_DEBUG_WRITEMEM_8BIT 0x0d
239 #define STLINK_DEBUG_APIV1_CLEARFP 0x0e
240 #define STLINK_DEBUG_APIV1_WRITEDEBUGREG 0x0f
241 #define STLINK_DEBUG_APIV1_SETWATCHPOINT 0x10
242
243 #define STLINK_DEBUG_ENTER_JTAG_RESET 0x00
244 #define STLINK_DEBUG_ENTER_SWD_NO_RESET 0xa3
245 #define STLINK_DEBUG_ENTER_JTAG_NO_RESET 0xa4
246
247 #define STLINK_DEBUG_APIV1_ENTER 0x20
248 #define STLINK_DEBUG_EXIT 0x21
249 #define STLINK_DEBUG_READCOREID 0x22
250
251 #define STLINK_DEBUG_APIV2_ENTER 0x30
252 #define STLINK_DEBUG_APIV2_READ_IDCODES 0x31
253 #define STLINK_DEBUG_APIV2_RESETSYS 0x32
254 #define STLINK_DEBUG_APIV2_READREG 0x33
255 #define STLINK_DEBUG_APIV2_WRITEREG 0x34
256 #define STLINK_DEBUG_APIV2_WRITEDEBUGREG 0x35
257 #define STLINK_DEBUG_APIV2_READDEBUGREG 0x36
258
259 #define STLINK_DEBUG_APIV2_READALLREGS 0x3A
260 #define STLINK_DEBUG_APIV2_GETLASTRWSTATUS 0x3B
261 #define STLINK_DEBUG_APIV2_DRIVE_NRST 0x3C
262
263 #define STLINK_DEBUG_APIV2_GETLASTRWSTATUS2 0x3E
264
265 #define STLINK_DEBUG_APIV2_START_TRACE_RX 0x40
266 #define STLINK_DEBUG_APIV2_STOP_TRACE_RX 0x41
267 #define STLINK_DEBUG_APIV2_GET_TRACE_NB 0x42
268 #define STLINK_DEBUG_APIV2_SWD_SET_FREQ 0x43
269 #define STLINK_DEBUG_APIV2_JTAG_SET_FREQ 0x44
270 #define STLINK_DEBUG_APIV2_READ_DAP_REG 0x45
271 #define STLINK_DEBUG_APIV2_WRITE_DAP_REG 0x46
272 #define STLINK_DEBUG_APIV2_READMEM_16BIT 0x47
273 #define STLINK_DEBUG_APIV2_WRITEMEM_16BIT 0x48
274
275 #define STLINK_DEBUG_APIV2_INIT_AP 0x4B
276 #define STLINK_DEBUG_APIV2_CLOSE_AP_DBG 0x4C
277
278 #define STLINK_APIV3_SET_COM_FREQ 0x61
279 #define STLINK_APIV3_GET_COM_FREQ 0x62
280
281 #define STLINK_APIV3_GET_VERSION_EX 0xFB
282
283 #define STLINK_DEBUG_APIV2_DRIVE_NRST_LOW 0x00
284 #define STLINK_DEBUG_APIV2_DRIVE_NRST_HIGH 0x01
285 #define STLINK_DEBUG_APIV2_DRIVE_NRST_PULSE 0x02
286
287 #define STLINK_DEBUG_PORT_ACCESS 0xffff
288
289 #define STLINK_TRACE_SIZE 4096
290 #define STLINK_TRACE_MAX_HZ 2000000
291
292 #define STLINK_V3_MAX_FREQ_NB 10
293
294 /** */
295 enum stlink_mode {
296 STLINK_MODE_UNKNOWN = 0,
297 STLINK_MODE_DFU,
298 STLINK_MODE_MASS,
299 STLINK_MODE_DEBUG_JTAG,
300 STLINK_MODE_DEBUG_SWD,
301 STLINK_MODE_DEBUG_SWIM
302 };
303
304 #define REQUEST_SENSE 0x03
305 #define REQUEST_SENSE_LENGTH 18
306
307 /*
308 * Map the relevant features, quirks and workaround for specific firmware
309 * version of stlink
310 */
311 #define STLINK_F_HAS_TRACE BIT(0)
312 #define STLINK_F_HAS_SWD_SET_FREQ BIT(1)
313 #define STLINK_F_HAS_JTAG_SET_FREQ BIT(2)
314 #define STLINK_F_HAS_MEM_16BIT BIT(3)
315 #define STLINK_F_HAS_GETLASTRWSTATUS2 BIT(4)
316 #define STLINK_F_HAS_DAP_REG BIT(5)
317 #define STLINK_F_QUIRK_JTAG_DP_READ BIT(6)
318 #define STLINK_F_HAS_AP_INIT BIT(7)
319 #define STLINK_F_HAS_DPBANKSEL BIT(8)
320 #define STLINK_F_HAS_RW8_512BYTES BIT(9)
321
322 /* aliases */
323 #define STLINK_F_HAS_TARGET_VOLT STLINK_F_HAS_TRACE
324
325 struct speed_map {
326 int speed;
327 int speed_divisor;
328 };
329
330 /* SWD clock speed */
331 static const struct speed_map stlink_khz_to_speed_map_swd[] = {
332 {4000, 0},
333 {1800, 1}, /* default */
334 {1200, 2},
335 {950, 3},
336 {480, 7},
337 {240, 15},
338 {125, 31},
339 {100, 40},
340 {50, 79},
341 {25, 158},
342 {15, 265},
343 {5, 798}
344 };
345
346 /* JTAG clock speed */
347 static const struct speed_map stlink_khz_to_speed_map_jtag[] = {
348 {18000, 2},
349 {9000, 4},
350 {4500, 8},
351 {2250, 16},
352 {1125, 32}, /* default */
353 {562, 64},
354 {281, 128},
355 {140, 256}
356 };
357
358 static void stlink_usb_init_buffer(void *handle, uint8_t direction, uint32_t size);
359 static int stlink_swim_status(void *handle);
360 void stlink_dump_speed_map(const struct speed_map *map, unsigned int map_size);
361 static int stlink_get_com_freq(void *handle, bool is_jtag, struct speed_map *map);
362 static int stlink_speed(void *handle, int khz, bool query);
363
364 /** */
365 static unsigned int stlink_usb_block(void *handle)
366 {
367 struct stlink_usb_handle_s *h = handle;
368
369 assert(handle != NULL);
370
371 if (h->version.flags & STLINK_F_HAS_RW8_512BYTES)
372 return STLINKV3_MAX_RW8;
373 else
374 return STLINK_MAX_RW8;
375 }
376
377
378
379 #ifdef USE_LIBUSB_ASYNCIO
380
381 static LIBUSB_CALL void sync_transfer_cb(struct libusb_transfer *transfer)
382 {
383 int *completed = transfer->user_data;
384 *completed = 1;
385 /* caller interprets result and frees transfer */
386 }
387
388
389 static void sync_transfer_wait_for_completion(struct libusb_transfer *transfer)
390 {
391 int r, *completed = transfer->user_data;
392
393 /* Assuming a single libusb context exists. There no existing interface into this
394 * module to pass a libusb context.
395 */
396 struct libusb_context *ctx = NULL;
397
398 while (!*completed) {
399 r = libusb_handle_events_completed(ctx, completed);
400 if (r < 0) {
401 if (r == LIBUSB_ERROR_INTERRUPTED)
402 continue;
403 libusb_cancel_transfer(transfer);
404 continue;
405 }
406 }
407 }
408
409
410 static int transfer_error_status(const struct libusb_transfer *transfer)
411 {
412 int r = 0;
413
414 switch (transfer->status) {
415 case LIBUSB_TRANSFER_COMPLETED:
416 r = 0;
417 break;
418 case LIBUSB_TRANSFER_TIMED_OUT:
419 r = LIBUSB_ERROR_TIMEOUT;
420 break;
421 case LIBUSB_TRANSFER_STALL:
422 r = LIBUSB_ERROR_PIPE;
423 break;
424 case LIBUSB_TRANSFER_OVERFLOW:
425 r = LIBUSB_ERROR_OVERFLOW;
426 break;
427 case LIBUSB_TRANSFER_NO_DEVICE:
428 r = LIBUSB_ERROR_NO_DEVICE;
429 break;
430 case LIBUSB_TRANSFER_ERROR:
431 case LIBUSB_TRANSFER_CANCELLED:
432 r = LIBUSB_ERROR_IO;
433 break;
434 default:
435 r = LIBUSB_ERROR_OTHER;
436 break;
437 }
438
439 return r;
440 }
441
442 struct jtag_xfer {
443 int ep;
444 uint8_t *buf;
445 size_t size;
446 /* Internal */
447 int retval;
448 int completed;
449 size_t transfer_size;
450 struct libusb_transfer *transfer;
451 };
452
453 static int jtag_libusb_bulk_transfer_n(
454 struct libusb_device_handle *dev_handle,
455 struct jtag_xfer *transfers,
456 size_t n_transfers,
457 int timeout)
458 {
459 int retval = 0;
460 int returnval = ERROR_OK;
461
462
463 for (size_t i = 0; i < n_transfers; ++i) {
464 transfers[i].retval = 0;
465 transfers[i].completed = 0;
466 transfers[i].transfer_size = 0;
467 transfers[i].transfer = libusb_alloc_transfer(0);
468
469 if (transfers[i].transfer == NULL) {
470 for (size_t j = 0; j < i; ++j)
471 libusb_free_transfer(transfers[j].transfer);
472
473 LOG_DEBUG("ERROR, failed to alloc usb transfers");
474 for (size_t k = 0; k < n_transfers; ++k)
475 transfers[k].retval = LIBUSB_ERROR_NO_MEM;
476 return ERROR_FAIL;
477 }
478 }
479
480 for (size_t i = 0; i < n_transfers; ++i) {
481 libusb_fill_bulk_transfer(
482 transfers[i].transfer,
483 dev_handle,
484 transfers[i].ep, transfers[i].buf, transfers[i].size,
485 sync_transfer_cb, &transfers[i].completed, timeout);
486 transfers[i].transfer->type = LIBUSB_TRANSFER_TYPE_BULK;
487
488 retval = libusb_submit_transfer(transfers[i].transfer);
489 if (retval < 0) {
490 LOG_DEBUG("ERROR, failed to submit transfer %zu, error %d", i, retval);
491
492 /* Probably no point continuing to submit transfers once a submission fails.
493 * As a result, tag all remaining transfers as errors.
494 */
495 for (size_t j = i; j < n_transfers; ++j)
496 transfers[j].retval = retval;
497
498 returnval = ERROR_FAIL;
499 break;
500 }
501 }
502
503 /* Wait for every submitted USB transfer to complete.
504 */
505 for (size_t i = 0; i < n_transfers; ++i) {
506 if (transfers[i].retval == 0) {
507 sync_transfer_wait_for_completion(transfers[i].transfer);
508
509 retval = transfer_error_status(transfers[i].transfer);
510 if (retval) {
511 returnval = ERROR_FAIL;
512 transfers[i].retval = retval;
513 LOG_DEBUG("ERROR, transfer %zu failed, error %d", i, retval);
514 } else {
515 /* Assuming actual_length is only valid if there is no transfer error.
516 */
517 transfers[i].transfer_size = transfers[i].transfer->actual_length;
518 }
519 }
520
521 libusb_free_transfer(transfers[i].transfer);
522 transfers[i].transfer = NULL;
523 }
524
525 return returnval;
526 }
527
528 #endif
529
530
531 /** */
532 static int stlink_usb_xfer_v1_get_status(void *handle)
533 {
534 struct stlink_usb_handle_s *h = handle;
535 int tr, ret;
536
537 assert(handle != NULL);
538
539 /* read status */
540 memset(h->cmdbuf, 0, STLINK_SG_SIZE);
541
542 ret = jtag_libusb_bulk_read(h->fd, h->rx_ep, (char *)h->cmdbuf, 13,
543 STLINK_READ_TIMEOUT, &tr);
544 if (ret || tr != 13)
545 return ERROR_FAIL;
546
547 uint32_t t1;
548
549 t1 = buf_get_u32(h->cmdbuf, 0, 32);
550
551 /* check for USBS */
552 if (t1 != 0x53425355)
553 return ERROR_FAIL;
554 /*
555 * CSW status:
556 * 0 success
557 * 1 command failure
558 * 2 phase error
559 */
560 if (h->cmdbuf[12] != 0)
561 return ERROR_FAIL;
562
563 return ERROR_OK;
564 }
565
566 #ifdef USE_LIBUSB_ASYNCIO
567 static int stlink_usb_xfer_rw(void *handle, int cmdsize, const uint8_t *buf, int size)
568 {
569 struct stlink_usb_handle_s *h = handle;
570
571 assert(handle != NULL);
572
573 size_t n_transfers = 0;
574 struct jtag_xfer transfers[2];
575
576 memset(transfers, 0, sizeof(transfers));
577
578 transfers[0].ep = h->tx_ep;
579 transfers[0].buf = h->cmdbuf;
580 transfers[0].size = cmdsize;
581
582 ++n_transfers;
583
584 if (h->direction == h->tx_ep && size) {
585 transfers[1].ep = h->tx_ep;
586 transfers[1].buf = (uint8_t *)buf;
587 transfers[1].size = size;
588
589 ++n_transfers;
590 } else if (h->direction == h->rx_ep && size) {
591 transfers[1].ep = h->rx_ep;
592 transfers[1].buf = (uint8_t *)buf;
593 transfers[1].size = size;
594
595 ++n_transfers;
596 }
597
598 return jtag_libusb_bulk_transfer_n(
599 h->fd,
600 transfers,
601 n_transfers,
602 STLINK_WRITE_TIMEOUT);
603 }
604 #else
605 static int stlink_usb_xfer_rw(void *handle, int cmdsize, const uint8_t *buf, int size)
606 {
607 struct stlink_usb_handle_s *h = handle;
608 int tr, ret;
609
610 assert(handle != NULL);
611
612 ret = jtag_libusb_bulk_write(h->fd, h->tx_ep, (char *)h->cmdbuf,
613 cmdsize, STLINK_WRITE_TIMEOUT, &tr);
614 if (ret || tr != cmdsize)
615 return ERROR_FAIL;
616
617 if (h->direction == h->tx_ep && size) {
618 ret = jtag_libusb_bulk_write(h->fd, h->tx_ep, (char *)buf,
619 size, STLINK_WRITE_TIMEOUT, &tr);
620 if (ret || tr != size) {
621 LOG_DEBUG("bulk write failed");
622 return ERROR_FAIL;
623 }
624 } else if (h->direction == h->rx_ep && size) {
625 ret = jtag_libusb_bulk_read(h->fd, h->rx_ep, (char *)buf,
626 size, STLINK_READ_TIMEOUT, &tr);
627 if (ret || tr != size) {
628 LOG_DEBUG("bulk read failed");
629 return ERROR_FAIL;
630 }
631 }
632
633 return ERROR_OK;
634 }
635 #endif
636
637 /** */
638 static int stlink_usb_xfer_v1_get_sense(void *handle)
639 {
640 int res;
641 struct stlink_usb_handle_s *h = handle;
642
643 assert(handle != NULL);
644
645 stlink_usb_init_buffer(handle, h->rx_ep, 16);
646
647 h->cmdbuf[h->cmdidx++] = REQUEST_SENSE;
648 h->cmdbuf[h->cmdidx++] = 0;
649 h->cmdbuf[h->cmdidx++] = 0;
650 h->cmdbuf[h->cmdidx++] = 0;
651 h->cmdbuf[h->cmdidx++] = REQUEST_SENSE_LENGTH;
652
653 res = stlink_usb_xfer_rw(handle, REQUEST_SENSE_LENGTH, h->databuf, 16);
654
655 if (res != ERROR_OK)
656 return res;
657
658 if (stlink_usb_xfer_v1_get_status(handle) != ERROR_OK)
659 return ERROR_FAIL;
660
661 return ERROR_OK;
662 }
663
664 /*
665 transfers block in cmdbuf
666 <size> indicates number of bytes in the following
667 data phase.
668 Ignore the (eventual) error code in the received packet.
669 */
670 static int stlink_usb_xfer_noerrcheck(void *handle, const uint8_t *buf, int size)
671 {
672 int err, cmdsize = STLINK_CMD_SIZE_V2;
673 struct stlink_usb_handle_s *h = handle;
674
675 assert(handle != NULL);
676
677 if (h->version.stlink == 1) {
678 cmdsize = STLINK_SG_SIZE;
679 /* put length in bCBWCBLength */
680 h->cmdbuf[14] = h->cmdidx-15;
681 }
682
683 err = stlink_usb_xfer_rw(handle, cmdsize, buf, size);
684
685 if (err != ERROR_OK)
686 return err;
687
688 if (h->version.stlink == 1) {
689 if (stlink_usb_xfer_v1_get_status(handle) != ERROR_OK) {
690 /* check csw status */
691 if (h->cmdbuf[12] == 1) {
692 LOG_DEBUG("get sense");
693 if (stlink_usb_xfer_v1_get_sense(handle) != ERROR_OK)
694 return ERROR_FAIL;
695 }
696 return ERROR_FAIL;
697 }
698 }
699
700 return ERROR_OK;
701 }
702
703 /**
704 Converts an STLINK status code held in the first byte of a response
705 to an openocd error, logs any error/wait status as debug output.
706 */
707 static int stlink_usb_error_check(void *handle)
708 {
709 struct stlink_usb_handle_s *h = handle;
710
711 assert(handle != NULL);
712
713 if (h->transport == HL_TRANSPORT_SWIM) {
714 switch (h->databuf[0]) {
715 case STLINK_SWIM_ERR_OK:
716 return ERROR_OK;
717 case STLINK_SWIM_BUSY:
718 return ERROR_WAIT;
719 default:
720 LOG_DEBUG("unknown/unexpected STLINK status code 0x%x", h->databuf[0]);
721 return ERROR_FAIL;
722 }
723 }
724
725 /* TODO: no error checking yet on api V1 */
726 if (h->version.jtag_api == STLINK_JTAG_API_V1)
727 h->databuf[0] = STLINK_DEBUG_ERR_OK;
728
729 switch (h->databuf[0]) {
730 case STLINK_DEBUG_ERR_OK:
731 return ERROR_OK;
732 case STLINK_DEBUG_ERR_FAULT:
733 LOG_DEBUG("SWD fault response (0x%x)", STLINK_DEBUG_ERR_FAULT);
734 return ERROR_FAIL;
735 case STLINK_SWD_AP_WAIT:
736 LOG_DEBUG("wait status SWD_AP_WAIT (0x%x)", STLINK_SWD_AP_WAIT);
737 return ERROR_WAIT;
738 case STLINK_SWD_DP_WAIT:
739 LOG_DEBUG("wait status SWD_DP_WAIT (0x%x)", STLINK_SWD_DP_WAIT);
740 return ERROR_WAIT;
741 case STLINK_JTAG_GET_IDCODE_ERROR:
742 LOG_DEBUG("STLINK_JTAG_GET_IDCODE_ERROR");
743 return ERROR_FAIL;
744 case STLINK_JTAG_WRITE_ERROR:
745 LOG_DEBUG("Write error");
746 return ERROR_FAIL;
747 case STLINK_JTAG_WRITE_VERIF_ERROR:
748 LOG_DEBUG("Write verify error, ignoring");
749 return ERROR_OK;
750 case STLINK_SWD_AP_FAULT:
751 /* git://git.ac6.fr/openocd commit 657e3e885b9ee10
752 * returns ERROR_OK with the comment:
753 * Change in error status when reading outside RAM.
754 * This fix allows CDT plugin to visualize memory.
755 */
756 LOG_DEBUG("STLINK_SWD_AP_FAULT");
757 return ERROR_FAIL;
758 case STLINK_SWD_AP_ERROR:
759 LOG_DEBUG("STLINK_SWD_AP_ERROR");
760 return ERROR_FAIL;
761 case STLINK_SWD_AP_PARITY_ERROR:
762 LOG_DEBUG("STLINK_SWD_AP_PARITY_ERROR");
763 return ERROR_FAIL;
764 case STLINK_SWD_DP_FAULT:
765 LOG_DEBUG("STLINK_SWD_DP_FAULT");
766 return ERROR_FAIL;
767 case STLINK_SWD_DP_ERROR:
768 LOG_DEBUG("STLINK_SWD_DP_ERROR");
769 return ERROR_FAIL;
770 case STLINK_SWD_DP_PARITY_ERROR:
771 LOG_DEBUG("STLINK_SWD_DP_PARITY_ERROR");
772 return ERROR_FAIL;
773 case STLINK_SWD_AP_WDATA_ERROR:
774 LOG_DEBUG("STLINK_SWD_AP_WDATA_ERROR");
775 return ERROR_FAIL;
776 case STLINK_SWD_AP_STICKY_ERROR:
777 LOG_DEBUG("STLINK_SWD_AP_STICKY_ERROR");
778 return ERROR_FAIL;
779 case STLINK_SWD_AP_STICKYORUN_ERROR:
780 LOG_DEBUG("STLINK_SWD_AP_STICKYORUN_ERROR");
781 return ERROR_FAIL;
782 case STLINK_BAD_AP_ERROR:
783 LOG_DEBUG("STLINK_BAD_AP_ERROR");
784 return ERROR_FAIL;
785 default:
786 LOG_DEBUG("unknown/unexpected STLINK status code 0x%x", h->databuf[0]);
787 return ERROR_FAIL;
788 }
789 }
790
791 /*
792 * Wrapper around stlink_usb_xfer_noerrcheck()
793 * to check the error code in the received packet
794 */
795 static int stlink_usb_xfer_errcheck(void *handle, const uint8_t *buf, int size)
796 {
797 int retval;
798
799 assert(size > 0);
800
801 retval = stlink_usb_xfer_noerrcheck(handle, buf, size);
802 if (retval != ERROR_OK)
803 return retval;
804
805 return stlink_usb_error_check(handle);
806 }
807
808 /** Issue an STLINK command via USB transfer, with retries on any wait status responses.
809
810 Works for commands where the STLINK_DEBUG status is returned in the first
811 byte of the response packet. For SWIM a SWIM_READSTATUS is requested instead.
812
813 Returns an openocd result code.
814 */
815 static int stlink_cmd_allow_retry(void *handle, const uint8_t *buf, int size)
816 {
817 int retries = 0;
818 int res;
819 struct stlink_usb_handle_s *h = handle;
820
821 while (1) {
822 if ((h->transport != HL_TRANSPORT_SWIM) || !retries) {
823 res = stlink_usb_xfer_noerrcheck(handle, buf, size);
824 if (res != ERROR_OK)
825 return res;
826 }
827
828 if (h->transport == HL_TRANSPORT_SWIM) {
829 res = stlink_swim_status(handle);
830 if (res != ERROR_OK)
831 return res;
832 }
833
834 res = stlink_usb_error_check(handle);
835 if (res == ERROR_WAIT && retries < MAX_WAIT_RETRIES) {
836 useconds_t delay_us = (1<<retries++) * 1000;
837 LOG_DEBUG("stlink_cmd_allow_retry ERROR_WAIT, retry %d, delaying %u microseconds", retries, delay_us);
838 usleep(delay_us);
839 continue;
840 }
841 return res;
842 }
843 }
844
845 /** */
846 static int stlink_usb_read_trace(void *handle, const uint8_t *buf, int size)
847 {
848 struct stlink_usb_handle_s *h = handle;
849 int tr, ret;
850
851 assert(handle != NULL);
852
853 assert(h->version.flags & STLINK_F_HAS_TRACE);
854
855 ret = jtag_libusb_bulk_read(h->fd, h->trace_ep, (char *)buf, size,
856 STLINK_READ_TIMEOUT, &tr);
857 if (ret || tr != size) {
858 LOG_ERROR("bulk trace read failed");
859 return ERROR_FAIL;
860 }
861
862 return ERROR_OK;
863 }
864
865 /*
866 this function writes transfer length in
867 the right place in the cb
868 */
869 static void stlink_usb_set_cbw_transfer_datalength(void *handle, uint32_t size)
870 {
871 struct stlink_usb_handle_s *h = handle;
872
873 buf_set_u32(h->cmdbuf+8, 0, 32, size);
874 }
875
876 static void stlink_usb_xfer_v1_create_cmd(void *handle, uint8_t direction, uint32_t size)
877 {
878 struct stlink_usb_handle_s *h = handle;
879
880 /* fill the send buffer */
881 strcpy((char *)h->cmdbuf, "USBC");
882 h->cmdidx += 4;
883 /* csw tag not used */
884 buf_set_u32(h->cmdbuf+h->cmdidx, 0, 32, 0);
885 h->cmdidx += 4;
886 /* cbw data transfer length (in the following data phase in or out) */
887 buf_set_u32(h->cmdbuf+h->cmdidx, 0, 32, size);
888 h->cmdidx += 4;
889 /* cbw flags */
890 h->cmdbuf[h->cmdidx++] = (direction == h->rx_ep ? ENDPOINT_IN : ENDPOINT_OUT);
891 h->cmdbuf[h->cmdidx++] = 0; /* lun */
892 /* cdb clength (is filled in at xfer) */
893 h->cmdbuf[h->cmdidx++] = 0;
894 }
895
896 /** */
897 static void stlink_usb_init_buffer(void *handle, uint8_t direction, uint32_t size)
898 {
899 struct stlink_usb_handle_s *h = handle;
900
901 h->direction = direction;
902
903 h->cmdidx = 0;
904
905 memset(h->cmdbuf, 0, STLINK_SG_SIZE);
906 memset(h->databuf, 0, STLINK_DATA_SIZE);
907
908 if (h->version.stlink == 1)
909 stlink_usb_xfer_v1_create_cmd(handle, direction, size);
910 }
911
912 /** */
913 static int stlink_usb_version(void *handle)
914 {
915 int res;
916 uint32_t flags;
917 uint16_t version;
918 uint8_t v, x, y, jtag, swim, msd, bridge = 0;
919 char v_str[5 * (1 + 3) + 1]; /* VvJjMmBbSs */
920 char *p;
921 struct stlink_usb_handle_s *h = handle;
922
923 assert(handle != NULL);
924
925 stlink_usb_init_buffer(handle, h->rx_ep, 6);
926
927 h->cmdbuf[h->cmdidx++] = STLINK_GET_VERSION;
928
929 res = stlink_usb_xfer_noerrcheck(handle, h->databuf, 6);
930
931 if (res != ERROR_OK)
932 return res;
933
934 version = be_to_h_u16(h->databuf);
935 v = (version >> 12) & 0x0f;
936 x = (version >> 6) & 0x3f;
937 y = version & 0x3f;
938
939 h->vid = le_to_h_u16(h->databuf + 2);
940 h->pid = le_to_h_u16(h->databuf + 4);
941
942 switch (h->pid) {
943 case STLINK_V2_1_PID:
944 case STLINK_V2_1_NO_MSD_PID:
945 if ((x <= 22 && y == 7) || (x >= 25 && y >= 7 && y <= 12)) {
946 /* MxSy : STM8 V2.1 - SWIM only */
947 msd = x;
948 swim = y;
949 jtag = 0;
950 } else {
951 /* JxMy : STM32 V2.1 - JTAG/SWD only */
952 jtag = x;
953 msd = y;
954 swim = 0;
955 }
956 break;
957 default:
958 jtag = x;
959 swim = y;
960 msd = 0;
961 break;
962 }
963
964 /* STLINK-V3 requires a specific command */
965 if (v == 3 && x == 0 && y == 0) {
966 stlink_usb_init_buffer(handle, h->rx_ep, 16);
967
968 h->cmdbuf[h->cmdidx++] = STLINK_APIV3_GET_VERSION_EX;
969
970 res = stlink_usb_xfer_noerrcheck(handle, h->databuf, 12);
971 if (res != ERROR_OK)
972 return res;
973
974 v = h->databuf[0];
975 swim = h->databuf[1];
976 jtag = h->databuf[2];
977 msd = h->databuf[3];
978 bridge = h->databuf[4];
979 h->vid = le_to_h_u16(h->databuf + 8);
980 h->pid = le_to_h_u16(h->databuf + 10);
981 }
982
983 h->version.stlink = v;
984 h->version.jtag = jtag;
985 h->version.swim = swim;
986
987 flags = 0;
988 switch (h->version.stlink) {
989 case 1:
990 /* ST-LINK/V1 from J11 switch to api-v2 (and support SWD) */
991 if (h->version.jtag >= 11)
992 h->version.jtag_api = STLINK_JTAG_API_V2;
993 else
994 h->version.jtag_api = STLINK_JTAG_API_V1;
995
996 break;
997 case 2:
998 /* all ST-LINK/V2 and ST-Link/V2.1 use api-v2 */
999 h->version.jtag_api = STLINK_JTAG_API_V2;
1000
1001 /* API for trace from J13 */
1002 /* API for target voltage from J13 */
1003 if (h->version.jtag >= 13)
1004 flags |= STLINK_F_HAS_TRACE;
1005
1006 /* preferred API to get last R/W status from J15 */
1007 if (h->version.jtag >= 15)
1008 flags |= STLINK_F_HAS_GETLASTRWSTATUS2;
1009
1010 /* API to set SWD frequency from J22 */
1011 if (h->version.jtag >= 22)
1012 flags |= STLINK_F_HAS_SWD_SET_FREQ;
1013
1014 /* API to set JTAG frequency from J24 */
1015 /* API to access DAP registers from J24 */
1016 if (h->version.jtag >= 24) {
1017 flags |= STLINK_F_HAS_JTAG_SET_FREQ;
1018 flags |= STLINK_F_HAS_DAP_REG;
1019 }
1020
1021 /* Quirk for read DP in JTAG mode (V2 only) from J24, fixed in J32 */
1022 if (h->version.jtag >= 24 && h->version.jtag < 32)
1023 flags |= STLINK_F_QUIRK_JTAG_DP_READ;
1024
1025 /* API to read/write memory at 16 bit from J26 */
1026 if (h->version.jtag >= 26)
1027 flags |= STLINK_F_HAS_MEM_16BIT;
1028
1029 /* API required to init AP before any AP access from J28 */
1030 if (h->version.jtag >= 28)
1031 flags |= STLINK_F_HAS_AP_INIT;
1032
1033 /* Banked regs (DPv1 & DPv2) support from V2J32 */
1034 if (h->version.jtag >= 32)
1035 flags |= STLINK_F_HAS_DPBANKSEL;
1036
1037 break;
1038 case 3:
1039 /* all STLINK-V3 use api-v3 */
1040 h->version.jtag_api = STLINK_JTAG_API_V3;
1041
1042 /* STLINK-V3 is a superset of ST-LINK/V2 */
1043
1044 /* API for trace */
1045 /* API for target voltage */
1046 flags |= STLINK_F_HAS_TRACE;
1047
1048 /* preferred API to get last R/W status */
1049 flags |= STLINK_F_HAS_GETLASTRWSTATUS2;
1050
1051 /* API to access DAP registers */
1052 flags |= STLINK_F_HAS_DAP_REG;
1053
1054 /* API to read/write memory at 16 bit */
1055 flags |= STLINK_F_HAS_MEM_16BIT;
1056
1057 /* API required to init AP before any AP access */
1058 flags |= STLINK_F_HAS_AP_INIT;
1059
1060 /* Banked regs (DPv1 & DPv2) support from V3J2 */
1061 if (h->version.jtag >= 2)
1062 flags |= STLINK_F_HAS_DPBANKSEL;
1063
1064 /* 8bit read/write max packet size 512 bytes from V3J6 */
1065 if (h->version.jtag >= 6)
1066 flags |= STLINK_F_HAS_RW8_512BYTES;
1067
1068 break;
1069 default:
1070 break;
1071 }
1072 h->version.flags = flags;
1073
1074 p = v_str;
1075 p += sprintf(p, "V%d", v);
1076 if (jtag || !msd)
1077 p += sprintf(p, "J%d", jtag);
1078 if (msd)
1079 p += sprintf(p, "M%d", msd);
1080 if (bridge)
1081 p += sprintf(p, "B%d", bridge);
1082 if (swim || !msd)
1083 sprintf(p, "S%d", swim);
1084
1085 LOG_INFO("STLINK %s (API v%d) VID:PID %04X:%04X",
1086 v_str,
1087 h->version.jtag_api,
1088 h->vid,
1089 h->pid);
1090
1091 return ERROR_OK;
1092 }
1093
1094 static int stlink_usb_check_voltage(void *handle, float *target_voltage)
1095 {
1096 struct stlink_usb_handle_s *h = handle;
1097 uint32_t adc_results[2];
1098
1099 /* no error message, simply quit with error */
1100 if (!(h->version.flags & STLINK_F_HAS_TARGET_VOLT))
1101 return ERROR_COMMAND_NOTFOUND;
1102
1103 stlink_usb_init_buffer(handle, h->rx_ep, 8);
1104
1105 h->cmdbuf[h->cmdidx++] = STLINK_GET_TARGET_VOLTAGE;
1106
1107 int result = stlink_usb_xfer_noerrcheck(handle, h->databuf, 8);
1108
1109 if (result != ERROR_OK)
1110 return result;
1111
1112 /* convert result */
1113 adc_results[0] = le_to_h_u32(h->databuf);
1114 adc_results[1] = le_to_h_u32(h->databuf + 4);
1115
1116 *target_voltage = 0;
1117
1118 if (adc_results[0])
1119 *target_voltage = 2 * ((float)adc_results[1]) * (float)(1.2 / adc_results[0]);
1120
1121 LOG_INFO("Target voltage: %f", (double)*target_voltage);
1122
1123 return ERROR_OK;
1124 }
1125
1126 static int stlink_usb_set_swdclk(void *handle, uint16_t clk_divisor)
1127 {
1128 struct stlink_usb_handle_s *h = handle;
1129
1130 assert(handle != NULL);
1131
1132 if (!(h->version.flags & STLINK_F_HAS_SWD_SET_FREQ))
1133 return ERROR_COMMAND_NOTFOUND;
1134
1135 stlink_usb_init_buffer(handle, h->rx_ep, 2);
1136
1137 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1138 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_SWD_SET_FREQ;
1139 h_u16_to_le(h->cmdbuf+h->cmdidx, clk_divisor);
1140 h->cmdidx += 2;
1141
1142 int result = stlink_cmd_allow_retry(handle, h->databuf, 2);
1143
1144 if (result != ERROR_OK)
1145 return result;
1146
1147 return ERROR_OK;
1148 }
1149
1150 static int stlink_usb_set_jtagclk(void *handle, uint16_t clk_divisor)
1151 {
1152 struct stlink_usb_handle_s *h = handle;
1153
1154 assert(handle != NULL);
1155
1156 if (!(h->version.flags & STLINK_F_HAS_JTAG_SET_FREQ))
1157 return ERROR_COMMAND_NOTFOUND;
1158
1159 stlink_usb_init_buffer(handle, h->rx_ep, 2);
1160
1161 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1162 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_JTAG_SET_FREQ;
1163 h_u16_to_le(h->cmdbuf+h->cmdidx, clk_divisor);
1164 h->cmdidx += 2;
1165
1166 int result = stlink_cmd_allow_retry(handle, h->databuf, 2);
1167
1168 if (result != ERROR_OK)
1169 return result;
1170
1171 return ERROR_OK;
1172 }
1173
1174 /** */
1175 static int stlink_usb_current_mode(void *handle, uint8_t *mode)
1176 {
1177 int res;
1178 struct stlink_usb_handle_s *h = handle;
1179
1180 assert(handle != NULL);
1181
1182 stlink_usb_init_buffer(handle, h->rx_ep, 2);
1183
1184 h->cmdbuf[h->cmdidx++] = STLINK_GET_CURRENT_MODE;
1185
1186 res = stlink_usb_xfer_noerrcheck(handle, h->databuf, 2);
1187
1188 if (res != ERROR_OK)
1189 return res;
1190
1191 *mode = h->databuf[0];
1192
1193 return ERROR_OK;
1194 }
1195
1196 /** */
1197 static int stlink_usb_mode_enter(void *handle, enum stlink_mode type)
1198 {
1199 int rx_size = 0;
1200 struct stlink_usb_handle_s *h = handle;
1201
1202 assert(handle != NULL);
1203
1204 /* on api V2 we are able the read the latest command
1205 * status
1206 * TODO: we need the test on api V1 too
1207 */
1208 if (h->version.jtag_api != STLINK_JTAG_API_V1)
1209 rx_size = 2;
1210
1211 stlink_usb_init_buffer(handle, h->rx_ep, rx_size);
1212
1213 switch (type) {
1214 case STLINK_MODE_DEBUG_JTAG:
1215 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1216 if (h->version.jtag_api == STLINK_JTAG_API_V1)
1217 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV1_ENTER;
1218 else
1219 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_ENTER;
1220 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_ENTER_JTAG_NO_RESET;
1221 break;
1222 case STLINK_MODE_DEBUG_SWD:
1223 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1224 if (h->version.jtag_api == STLINK_JTAG_API_V1)
1225 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV1_ENTER;
1226 else
1227 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_ENTER;
1228 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_ENTER_SWD_NO_RESET;
1229 break;
1230 case STLINK_MODE_DEBUG_SWIM:
1231 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_COMMAND;
1232 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_ENTER;
1233 /* no answer for this function... */
1234 rx_size = 0;
1235 break;
1236 case STLINK_MODE_DFU:
1237 case STLINK_MODE_MASS:
1238 default:
1239 return ERROR_FAIL;
1240 }
1241
1242 return stlink_cmd_allow_retry(handle, h->databuf, rx_size);
1243 }
1244
1245 /** */
1246 static int stlink_usb_mode_leave(void *handle, enum stlink_mode type)
1247 {
1248 int res;
1249 struct stlink_usb_handle_s *h = handle;
1250
1251 assert(handle != NULL);
1252
1253 stlink_usb_init_buffer(handle, STLINK_NULL_EP, 0);
1254
1255 switch (type) {
1256 case STLINK_MODE_DEBUG_JTAG:
1257 case STLINK_MODE_DEBUG_SWD:
1258 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1259 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_EXIT;
1260 break;
1261 case STLINK_MODE_DEBUG_SWIM:
1262 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_COMMAND;
1263 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_EXIT;
1264 break;
1265 case STLINK_MODE_DFU:
1266 h->cmdbuf[h->cmdidx++] = STLINK_DFU_COMMAND;
1267 h->cmdbuf[h->cmdidx++] = STLINK_DFU_EXIT;
1268 break;
1269 case STLINK_MODE_MASS:
1270 default:
1271 return ERROR_FAIL;
1272 }
1273
1274 res = stlink_usb_xfer_noerrcheck(handle, 0, 0);
1275
1276 if (res != ERROR_OK)
1277 return res;
1278
1279 return ERROR_OK;
1280 }
1281
1282 static int stlink_usb_assert_srst(void *handle, int srst);
1283
1284 static enum stlink_mode stlink_get_mode(enum hl_transports t)
1285 {
1286 switch (t) {
1287 case HL_TRANSPORT_SWD:
1288 return STLINK_MODE_DEBUG_SWD;
1289 case HL_TRANSPORT_JTAG:
1290 return STLINK_MODE_DEBUG_JTAG;
1291 case HL_TRANSPORT_SWIM:
1292 return STLINK_MODE_DEBUG_SWIM;
1293 default:
1294 return STLINK_MODE_UNKNOWN;
1295 }
1296 }
1297
1298 /** */
1299 static int stlink_usb_init_mode(void *handle, bool connect_under_reset, int initial_interface_speed)
1300 {
1301 int res;
1302 uint8_t mode;
1303 enum stlink_mode emode;
1304 struct stlink_usb_handle_s *h = handle;
1305
1306 assert(handle != NULL);
1307
1308 res = stlink_usb_current_mode(handle, &mode);
1309
1310 if (res != ERROR_OK)
1311 return res;
1312
1313 LOG_DEBUG("MODE: 0x%02X", mode);
1314
1315 /* try to exit current mode */
1316 switch (mode) {
1317 case STLINK_DEV_DFU_MODE:
1318 emode = STLINK_MODE_DFU;
1319 break;
1320 case STLINK_DEV_DEBUG_MODE:
1321 emode = STLINK_MODE_DEBUG_SWD;
1322 break;
1323 case STLINK_DEV_SWIM_MODE:
1324 emode = STLINK_MODE_DEBUG_SWIM;
1325 break;
1326 case STLINK_DEV_BOOTLOADER_MODE:
1327 case STLINK_DEV_MASS_MODE:
1328 default:
1329 emode = STLINK_MODE_UNKNOWN;
1330 break;
1331 }
1332
1333 if (emode != STLINK_MODE_UNKNOWN) {
1334 res = stlink_usb_mode_leave(handle, emode);
1335
1336 if (res != ERROR_OK)
1337 return res;
1338 }
1339
1340 res = stlink_usb_current_mode(handle, &mode);
1341
1342 if (res != ERROR_OK)
1343 return res;
1344
1345 /* we check the target voltage here as an aid to debugging connection problems.
1346 * the stlink requires the target Vdd to be connected for reliable debugging.
1347 * this cmd is supported in all modes except DFU
1348 */
1349 if (mode != STLINK_DEV_DFU_MODE) {
1350
1351 float target_voltage;
1352
1353 /* check target voltage (if supported) */
1354 res = stlink_usb_check_voltage(h, &target_voltage);
1355
1356 if (res != ERROR_OK) {
1357 if (res != ERROR_COMMAND_NOTFOUND)
1358 LOG_ERROR("voltage check failed");
1359 /* attempt to continue as it is not a catastrophic failure */
1360 } else {
1361 /* check for a sensible target voltage, operating range is 1.65-5.5v
1362 * according to datasheet */
1363 if (target_voltage < 1.5)
1364 LOG_ERROR("target voltage may be too low for reliable debugging");
1365 }
1366 }
1367
1368 LOG_DEBUG("MODE: 0x%02X", mode);
1369
1370 /* set selected mode */
1371 emode = stlink_get_mode(h->transport);
1372
1373 if (emode == STLINK_MODE_UNKNOWN) {
1374 LOG_ERROR("selected mode (transport) not supported");
1375 return ERROR_FAIL;
1376 }
1377
1378 /* set the speed before entering the mode, as the chip discovery phase should be done at this speed too */
1379 if (h->transport == HL_TRANSPORT_JTAG) {
1380 if (h->version.flags & STLINK_F_HAS_JTAG_SET_FREQ) {
1381 stlink_dump_speed_map(stlink_khz_to_speed_map_jtag, ARRAY_SIZE(stlink_khz_to_speed_map_jtag));
1382 stlink_speed(h, initial_interface_speed, false);
1383 }
1384 } else if (h->transport == HL_TRANSPORT_SWD) {
1385 if (h->version.flags & STLINK_F_HAS_SWD_SET_FREQ) {
1386 stlink_dump_speed_map(stlink_khz_to_speed_map_swd, ARRAY_SIZE(stlink_khz_to_speed_map_swd));
1387 stlink_speed(h, initial_interface_speed, false);
1388 }
1389 }
1390
1391 if (h->version.jtag_api == STLINK_JTAG_API_V3) {
1392 struct speed_map map[STLINK_V3_MAX_FREQ_NB];
1393
1394 stlink_get_com_freq(h, (h->transport == HL_TRANSPORT_JTAG), map);
1395 stlink_dump_speed_map(map, ARRAY_SIZE(map));
1396 stlink_speed(h, initial_interface_speed, false);
1397 }
1398
1399 /* preliminary SRST assert:
1400 * We want SRST is asserted before activating debug signals (mode_enter).
1401 * As the required mode has not been set, the adapter may not know what pin to use.
1402 * Tested firmware STLINK v2 JTAG v29 API v2 SWIM v0 uses T_NRST pin by default
1403 * Tested firmware STLINK v2 JTAG v27 API v2 SWIM v6 uses T_NRST pin by default
1404 * after power on, SWIM_RST stays unchanged */
1405 if (connect_under_reset && emode != STLINK_MODE_DEBUG_SWIM)
1406 stlink_usb_assert_srst(handle, 0);
1407 /* do not check the return status here, we will
1408 proceed and enter the desired mode below
1409 and try asserting srst again. */
1410
1411 res = stlink_usb_mode_enter(handle, emode);
1412 if (res != ERROR_OK)
1413 return res;
1414
1415 /* assert SRST again: a little bit late but now the adapter knows for sure what pin to use */
1416 if (connect_under_reset) {
1417 res = stlink_usb_assert_srst(handle, 0);
1418 if (res != ERROR_OK)
1419 return res;
1420 }
1421
1422 res = stlink_usb_current_mode(handle, &mode);
1423
1424 if (res != ERROR_OK)
1425 return res;
1426
1427 LOG_DEBUG("MODE: 0x%02X", mode);
1428
1429 return ERROR_OK;
1430 }
1431
1432 /* request status from last swim request */
1433 static int stlink_swim_status(void *handle)
1434 {
1435 struct stlink_usb_handle_s *h = handle;
1436 int res;
1437
1438 stlink_usb_init_buffer(handle, h->rx_ep, 4);
1439 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_COMMAND;
1440 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_READSTATUS;
1441 /* error is checked by the caller */
1442 res = stlink_usb_xfer_noerrcheck(handle, h->databuf, 4);
1443 if (res != ERROR_OK)
1444 return res;
1445 return ERROR_OK;
1446 }
1447 /*
1448 the purpose of this function is unknown...
1449 capabilites? anyway for swim v6 it returns
1450 0001020600000000
1451 */
1452 __attribute__((unused))
1453 static int stlink_swim_cap(void *handle, uint8_t *cap)
1454 {
1455 struct stlink_usb_handle_s *h = handle;
1456 int res;
1457
1458 stlink_usb_init_buffer(handle, h->rx_ep, 8);
1459 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_COMMAND;
1460 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_READ_CAP;
1461 h->cmdbuf[h->cmdidx++] = 0x01;
1462 res = stlink_usb_xfer_noerrcheck(handle, h->databuf, 8);
1463 if (res != ERROR_OK)
1464 return res;
1465 memcpy(cap, h->databuf, 8);
1466 return ERROR_OK;
1467 }
1468
1469 /* debug dongle assert/deassert sreset line */
1470 static int stlink_swim_assert_reset(void *handle, int reset)
1471 {
1472 struct stlink_usb_handle_s *h = handle;
1473 int res;
1474
1475 stlink_usb_init_buffer(handle, h->rx_ep, 0);
1476 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_COMMAND;
1477 if (!reset)
1478 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_ASSERT_RESET;
1479 else
1480 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_DEASSERT_RESET;
1481 res = stlink_cmd_allow_retry(handle, h->databuf, 0);
1482 if (res != ERROR_OK)
1483 return res;
1484 return ERROR_OK;
1485 }
1486
1487 /*
1488 send swim enter seq
1489 1.3ms low then 750Hz then 1.5kHz
1490 */
1491 static int stlink_swim_enter(void *handle)
1492 {
1493 struct stlink_usb_handle_s *h = handle;
1494 int res;
1495
1496 stlink_usb_init_buffer(handle, h->rx_ep, 0);
1497 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_COMMAND;
1498 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_ENTER_SEQ;
1499 res = stlink_cmd_allow_retry(handle, h->databuf, 0);
1500 if (res != ERROR_OK)
1501 return res;
1502 return ERROR_OK;
1503 }
1504
1505 /* switch high/low speed swim */
1506 static int stlink_swim_speed(void *handle, int speed)
1507 {
1508 struct stlink_usb_handle_s *h = handle;
1509 int res;
1510
1511 stlink_usb_init_buffer(handle, h->rx_ep, 0);
1512 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_COMMAND;
1513 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_SPEED;
1514 if (speed)
1515 h->cmdbuf[h->cmdidx++] = 1;
1516 else
1517 h->cmdbuf[h->cmdidx++] = 0;
1518 res = stlink_cmd_allow_retry(handle, h->databuf, 0);
1519 if (res != ERROR_OK)
1520 return res;
1521 return ERROR_OK;
1522 }
1523
1524 /*
1525 initiate srst from swim.
1526 nrst is pulled low for 50us.
1527 */
1528 static int stlink_swim_generate_rst(void *handle)
1529 {
1530 struct stlink_usb_handle_s *h = handle;
1531 int res;
1532
1533 stlink_usb_init_buffer(handle, h->rx_ep, 0);
1534 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_COMMAND;
1535 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_GEN_RST;
1536 res = stlink_cmd_allow_retry(handle, h->databuf, 0);
1537 if (res != ERROR_OK)
1538 return res;
1539 return ERROR_OK;
1540 }
1541
1542 /*
1543 send resyncronize sequence
1544 swim is pulled low for 16us
1545 reply is 64 clks low
1546 */
1547 static int stlink_swim_resync(void *handle)
1548 {
1549 struct stlink_usb_handle_s *h = handle;
1550 int res;
1551
1552 stlink_usb_init_buffer(handle, h->rx_ep, 0);
1553 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_COMMAND;
1554 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_RESET;
1555 res = stlink_cmd_allow_retry(handle, h->databuf, 0);
1556 if (res != ERROR_OK)
1557 return res;
1558 return ERROR_OK;
1559 }
1560
1561 static int stlink_swim_writebytes(void *handle, uint32_t addr, uint32_t len, const uint8_t *data)
1562 {
1563 struct stlink_usb_handle_s *h = handle;
1564 int res;
1565 unsigned int i;
1566 unsigned int datalen = 0;
1567 int cmdsize = STLINK_CMD_SIZE_V2;
1568
1569 if (len > STLINK_DATA_SIZE)
1570 return ERROR_FAIL;
1571
1572 if (h->version.stlink == 1)
1573 cmdsize = STLINK_SG_SIZE;
1574
1575 stlink_usb_init_buffer(handle, h->tx_ep, 0);
1576 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_COMMAND;
1577 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_WRITEMEM;
1578 h_u16_to_be(h->cmdbuf+h->cmdidx, len);
1579 h->cmdidx += 2;
1580 h_u32_to_be(h->cmdbuf+h->cmdidx, addr);
1581 h->cmdidx += 4;
1582 for (i = 0; i < len; i++) {
1583 if (h->cmdidx == cmdsize)
1584 h->databuf[datalen++] = *(data++);
1585 else
1586 h->cmdbuf[h->cmdidx++] = *(data++);
1587 }
1588 if (h->version.stlink == 1)
1589 stlink_usb_set_cbw_transfer_datalength(handle, datalen);
1590
1591 res = stlink_cmd_allow_retry(handle, h->databuf, datalen);
1592 if (res != ERROR_OK)
1593 return res;
1594 return ERROR_OK;
1595 }
1596
1597 static int stlink_swim_readbytes(void *handle, uint32_t addr, uint32_t len, uint8_t *data)
1598 {
1599 struct stlink_usb_handle_s *h = handle;
1600 int res;
1601
1602 if (len > STLINK_DATA_SIZE)
1603 return ERROR_FAIL;
1604
1605 stlink_usb_init_buffer(handle, h->rx_ep, 0);
1606 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_COMMAND;
1607 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_READMEM;
1608 h_u16_to_be(h->cmdbuf+h->cmdidx, len);
1609 h->cmdidx += 2;
1610 h_u32_to_be(h->cmdbuf+h->cmdidx, addr);
1611 h->cmdidx += 4;
1612 res = stlink_cmd_allow_retry(handle, h->databuf, 0);
1613 if (res != ERROR_OK)
1614 return res;
1615
1616 stlink_usb_init_buffer(handle, h->rx_ep, len);
1617 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_COMMAND;
1618 h->cmdbuf[h->cmdidx++] = STLINK_SWIM_READBUF;
1619 res = stlink_usb_xfer_noerrcheck(handle, data, len);
1620 if (res != ERROR_OK)
1621 return res;
1622
1623 return ERROR_OK;
1624 }
1625
1626 /** */
1627 static int stlink_usb_idcode(void *handle, uint32_t *idcode)
1628 {
1629 int res, offset;
1630 struct stlink_usb_handle_s *h = handle;
1631
1632 assert(handle != NULL);
1633
1634 /* there is no swim read core id cmd */
1635 if (h->transport == HL_TRANSPORT_SWIM) {
1636 *idcode = 0;
1637 return ERROR_OK;
1638 }
1639
1640 stlink_usb_init_buffer(handle, h->rx_ep, 12);
1641
1642 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1643 if (h->version.jtag_api == STLINK_JTAG_API_V1) {
1644 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_READCOREID;
1645
1646 res = stlink_usb_xfer_noerrcheck(handle, h->databuf, 4);
1647 offset = 0;
1648 } else {
1649 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_READ_IDCODES;
1650
1651 res = stlink_usb_xfer_errcheck(handle, h->databuf, 12);
1652 offset = 4;
1653 }
1654
1655 if (res != ERROR_OK)
1656 return res;
1657
1658 *idcode = le_to_h_u32(h->databuf + offset);
1659
1660 LOG_DEBUG("IDCODE: 0x%08" PRIX32, *idcode);
1661
1662 return ERROR_OK;
1663 }
1664
1665 static int stlink_usb_v2_read_debug_reg(void *handle, uint32_t addr, uint32_t *val)
1666 {
1667 struct stlink_usb_handle_s *h = handle;
1668 int res;
1669
1670 assert(handle != NULL);
1671
1672 stlink_usb_init_buffer(handle, h->rx_ep, 8);
1673
1674 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1675 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_READDEBUGREG;
1676 h_u32_to_le(h->cmdbuf+h->cmdidx, addr);
1677 h->cmdidx += 4;
1678
1679 res = stlink_cmd_allow_retry(handle, h->databuf, 8);
1680 if (res != ERROR_OK)
1681 return res;
1682
1683 *val = le_to_h_u32(h->databuf + 4);
1684 return ERROR_OK;
1685 }
1686
1687 static int stlink_usb_write_debug_reg(void *handle, uint32_t addr, uint32_t val)
1688 {
1689 struct stlink_usb_handle_s *h = handle;
1690
1691 assert(handle != NULL);
1692
1693 stlink_usb_init_buffer(handle, h->rx_ep, 2);
1694
1695 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1696 if (h->version.jtag_api == STLINK_JTAG_API_V1)
1697 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV1_WRITEDEBUGREG;
1698 else
1699 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_WRITEDEBUGREG;
1700 h_u32_to_le(h->cmdbuf+h->cmdidx, addr);
1701 h->cmdidx += 4;
1702 h_u32_to_le(h->cmdbuf+h->cmdidx, val);
1703 h->cmdidx += 4;
1704
1705 return stlink_cmd_allow_retry(handle, h->databuf, 2);
1706 }
1707
1708 /** */
1709 static int stlink_usb_trace_read(void *handle, uint8_t *buf, size_t *size)
1710 {
1711 struct stlink_usb_handle_s *h = handle;
1712
1713 assert(handle != NULL);
1714
1715 if (h->trace.enabled && (h->version.flags & STLINK_F_HAS_TRACE)) {
1716 int res;
1717
1718 stlink_usb_init_buffer(handle, h->rx_ep, 10);
1719
1720 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1721 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_GET_TRACE_NB;
1722
1723 res = stlink_usb_xfer_noerrcheck(handle, h->databuf, 2);
1724 if (res != ERROR_OK)
1725 return res;
1726
1727 size_t bytes_avail = le_to_h_u16(h->databuf);
1728 *size = bytes_avail < *size ? bytes_avail : *size - 1;
1729
1730 if (*size > 0) {
1731 res = stlink_usb_read_trace(handle, buf, *size);
1732 if (res != ERROR_OK)
1733 return res;
1734 return ERROR_OK;
1735 }
1736 }
1737 *size = 0;
1738 return ERROR_OK;
1739 }
1740
1741 static enum target_state stlink_usb_v2_get_status(void *handle)
1742 {
1743 int result;
1744 uint32_t status;
1745
1746 result = stlink_usb_v2_read_debug_reg(handle, DCB_DHCSR, &status);
1747 if (result != ERROR_OK)
1748 return TARGET_UNKNOWN;
1749
1750 if (status & S_HALT)
1751 return TARGET_HALTED;
1752 else if (status & S_RESET_ST)
1753 return TARGET_RESET;
1754
1755 return TARGET_RUNNING;
1756 }
1757
1758 /** */
1759 static enum target_state stlink_usb_state(void *handle)
1760 {
1761 int res;
1762 struct stlink_usb_handle_s *h = handle;
1763
1764 assert(handle != NULL);
1765
1766 if (h->transport == HL_TRANSPORT_SWIM) {
1767 res = stlink_usb_mode_enter(handle, stlink_get_mode(h->transport));
1768 if (res != ERROR_OK)
1769 return TARGET_UNKNOWN;
1770
1771 res = stlink_swim_resync(handle);
1772 if (res != ERROR_OK)
1773 return TARGET_UNKNOWN;
1774
1775 return ERROR_OK;
1776 }
1777
1778 if (h->reconnect_pending) {
1779 LOG_INFO("Previous state query failed, trying to reconnect");
1780 res = stlink_usb_mode_enter(handle, stlink_get_mode(h->transport));
1781
1782 if (res != ERROR_OK)
1783 return TARGET_UNKNOWN;
1784
1785 h->reconnect_pending = false;
1786 }
1787
1788 if (h->version.jtag_api != STLINK_JTAG_API_V1) {
1789 res = stlink_usb_v2_get_status(handle);
1790 if (res == TARGET_UNKNOWN)
1791 h->reconnect_pending = true;
1792 return res;
1793 }
1794
1795 stlink_usb_init_buffer(handle, h->rx_ep, 2);
1796
1797 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1798 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_GETSTATUS;
1799
1800 res = stlink_usb_xfer_noerrcheck(handle, h->databuf, 2);
1801
1802 if (res != ERROR_OK)
1803 return TARGET_UNKNOWN;
1804
1805 if (h->databuf[0] == STLINK_CORE_RUNNING)
1806 return TARGET_RUNNING;
1807 if (h->databuf[0] == STLINK_CORE_HALTED)
1808 return TARGET_HALTED;
1809
1810 h->reconnect_pending = true;
1811
1812 return TARGET_UNKNOWN;
1813 }
1814
1815 static int stlink_usb_assert_srst(void *handle, int srst)
1816 {
1817 struct stlink_usb_handle_s *h = handle;
1818
1819 assert(handle != NULL);
1820
1821 if (h->transport == HL_TRANSPORT_SWIM)
1822 return stlink_swim_assert_reset(handle, srst);
1823
1824 if (h->version.stlink == 1)
1825 return ERROR_COMMAND_NOTFOUND;
1826
1827 stlink_usb_init_buffer(handle, h->rx_ep, 2);
1828
1829 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1830 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_DRIVE_NRST;
1831 h->cmdbuf[h->cmdidx++] = srst;
1832
1833 return stlink_cmd_allow_retry(handle, h->databuf, 2);
1834 }
1835
1836 /** */
1837 static void stlink_usb_trace_disable(void *handle)
1838 {
1839 int res = ERROR_OK;
1840 struct stlink_usb_handle_s *h = handle;
1841
1842 assert(handle != NULL);
1843
1844 assert(h->version.flags & STLINK_F_HAS_TRACE);
1845
1846 LOG_DEBUG("Tracing: disable");
1847
1848 stlink_usb_init_buffer(handle, h->rx_ep, 2);
1849 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1850 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_STOP_TRACE_RX;
1851 res = stlink_usb_xfer_errcheck(handle, h->databuf, 2);
1852
1853 if (res == ERROR_OK)
1854 h->trace.enabled = false;
1855 }
1856
1857
1858 /** */
1859 static int stlink_usb_trace_enable(void *handle)
1860 {
1861 int res;
1862 struct stlink_usb_handle_s *h = handle;
1863
1864 assert(handle != NULL);
1865
1866 if (h->version.flags & STLINK_F_HAS_TRACE) {
1867 stlink_usb_init_buffer(handle, h->rx_ep, 10);
1868
1869 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1870 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_START_TRACE_RX;
1871 h_u16_to_le(h->cmdbuf+h->cmdidx, (uint16_t)STLINK_TRACE_SIZE);
1872 h->cmdidx += 2;
1873 h_u32_to_le(h->cmdbuf+h->cmdidx, h->trace.source_hz);
1874 h->cmdidx += 4;
1875
1876 res = stlink_usb_xfer_errcheck(handle, h->databuf, 2);
1877
1878 if (res == ERROR_OK) {
1879 h->trace.enabled = true;
1880 LOG_DEBUG("Tracing: recording at %" PRIu32 "Hz", h->trace.source_hz);
1881 }
1882 } else {
1883 LOG_ERROR("Tracing is not supported by this version.");
1884 res = ERROR_FAIL;
1885 }
1886
1887 return res;
1888 }
1889
1890 /** */
1891 static int stlink_usb_reset(void *handle)
1892 {
1893 struct stlink_usb_handle_s *h = handle;
1894 int retval;
1895
1896 assert(handle != NULL);
1897
1898 if (h->transport == HL_TRANSPORT_SWIM)
1899 return stlink_swim_generate_rst(handle);
1900
1901 stlink_usb_init_buffer(handle, h->rx_ep, 2);
1902
1903 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1904
1905 if (h->version.jtag_api == STLINK_JTAG_API_V1)
1906 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV1_RESETSYS;
1907 else
1908 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_RESETSYS;
1909
1910 retval = stlink_cmd_allow_retry(handle, h->databuf, 2);
1911 if (retval != ERROR_OK)
1912 return retval;
1913
1914 if (h->trace.enabled) {
1915 stlink_usb_trace_disable(h);
1916 return stlink_usb_trace_enable(h);
1917 }
1918
1919 return ERROR_OK;
1920 }
1921
1922 /** */
1923 static int stlink_usb_run(void *handle)
1924 {
1925 int res;
1926 struct stlink_usb_handle_s *h = handle;
1927
1928 assert(handle != NULL);
1929
1930 if (h->version.jtag_api != STLINK_JTAG_API_V1) {
1931 res = stlink_usb_write_debug_reg(handle, DCB_DHCSR, DBGKEY|C_DEBUGEN);
1932
1933 return res;
1934 }
1935
1936 stlink_usb_init_buffer(handle, h->rx_ep, 2);
1937
1938 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1939 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_RUNCORE;
1940
1941 return stlink_cmd_allow_retry(handle, h->databuf, 2);
1942 }
1943
1944 /** */
1945 static int stlink_usb_halt(void *handle)
1946 {
1947 int res;
1948 struct stlink_usb_handle_s *h = handle;
1949
1950 assert(handle != NULL);
1951
1952 if (h->version.jtag_api != STLINK_JTAG_API_V1) {
1953 res = stlink_usb_write_debug_reg(handle, DCB_DHCSR, DBGKEY|C_HALT|C_DEBUGEN);
1954
1955 return res;
1956 }
1957
1958 stlink_usb_init_buffer(handle, h->rx_ep, 2);
1959
1960 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1961 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_FORCEDEBUG;
1962
1963 return stlink_cmd_allow_retry(handle, h->databuf, 2);
1964 }
1965
1966 /** */
1967 static int stlink_usb_step(void *handle)
1968 {
1969 struct stlink_usb_handle_s *h = handle;
1970
1971 assert(handle != NULL);
1972
1973 if (h->version.jtag_api != STLINK_JTAG_API_V1) {
1974 /* TODO: this emulates the v1 api, it should really use a similar auto mask isr
1975 * that the Cortex-M3 currently does. */
1976 stlink_usb_write_debug_reg(handle, DCB_DHCSR, DBGKEY|C_HALT|C_MASKINTS|C_DEBUGEN);
1977 stlink_usb_write_debug_reg(handle, DCB_DHCSR, DBGKEY|C_STEP|C_MASKINTS|C_DEBUGEN);
1978 return stlink_usb_write_debug_reg(handle, DCB_DHCSR, DBGKEY|C_HALT|C_DEBUGEN);
1979 }
1980
1981 stlink_usb_init_buffer(handle, h->rx_ep, 2);
1982
1983 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
1984 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_STEPCORE;
1985
1986 return stlink_cmd_allow_retry(handle, h->databuf, 2);
1987 }
1988
1989 /** */
1990 static int stlink_usb_read_regs(void *handle)
1991 {
1992 int res;
1993 struct stlink_usb_handle_s *h = handle;
1994
1995 assert(handle != NULL);
1996
1997 stlink_usb_init_buffer(handle, h->rx_ep, 88);
1998
1999 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
2000 if (h->version.jtag_api == STLINK_JTAG_API_V1) {
2001
2002 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV1_READALLREGS;
2003 res = stlink_usb_xfer_noerrcheck(handle, h->databuf, 84);
2004 /* regs data from offset 0 */
2005 } else {
2006 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_READALLREGS;
2007 res = stlink_usb_xfer_errcheck(handle, h->databuf, 88);
2008 /* status at offset 0, regs data from offset 4 */
2009 }
2010
2011 return res;
2012 }
2013
2014 /** */
2015 static int stlink_usb_read_reg(void *handle, int num, uint32_t *val)
2016 {
2017 int res;
2018 struct stlink_usb_handle_s *h = handle;
2019
2020 assert(handle != NULL);
2021
2022 stlink_usb_init_buffer(handle, h->rx_ep, h->version.jtag_api == STLINK_JTAG_API_V1 ? 4 : 8);
2023
2024 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
2025 if (h->version.jtag_api == STLINK_JTAG_API_V1)
2026 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV1_READREG;
2027 else
2028 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_READREG;
2029 h->cmdbuf[h->cmdidx++] = num;
2030
2031 if (h->version.jtag_api == STLINK_JTAG_API_V1) {
2032 res = stlink_usb_xfer_noerrcheck(handle, h->databuf, 4);
2033 if (res != ERROR_OK)
2034 return res;
2035 *val = le_to_h_u32(h->databuf);
2036 return ERROR_OK;
2037 } else {
2038 res = stlink_cmd_allow_retry(handle, h->databuf, 8);
2039 if (res != ERROR_OK)
2040 return res;
2041 *val = le_to_h_u32(h->databuf + 4);
2042 return ERROR_OK;
2043 }
2044 }
2045
2046 /** */
2047 static int stlink_usb_write_reg(void *handle, int num, uint32_t val)
2048 {
2049 struct stlink_usb_handle_s *h = handle;
2050
2051 assert(handle != NULL);
2052
2053 stlink_usb_init_buffer(handle, h->rx_ep, 2);
2054
2055 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
2056 if (h->version.jtag_api == STLINK_JTAG_API_V1)
2057 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV1_WRITEREG;
2058 else
2059 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_WRITEREG;
2060 h->cmdbuf[h->cmdidx++] = num;
2061 h_u32_to_le(h->cmdbuf+h->cmdidx, val);
2062 h->cmdidx += 4;
2063
2064 return stlink_cmd_allow_retry(handle, h->databuf, 2);
2065 }
2066
2067 static int stlink_usb_get_rw_status(void *handle)
2068 {
2069 struct stlink_usb_handle_s *h = handle;
2070
2071 assert(handle != NULL);
2072
2073 if (h->version.jtag_api == STLINK_JTAG_API_V1)
2074 return ERROR_OK;
2075
2076 stlink_usb_init_buffer(handle, h->rx_ep, 2);
2077
2078 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
2079 if (h->version.flags & STLINK_F_HAS_GETLASTRWSTATUS2) {
2080 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_GETLASTRWSTATUS2;
2081 return stlink_usb_xfer_errcheck(handle, h->databuf, 12);
2082 } else {
2083 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_GETLASTRWSTATUS;
2084 return stlink_usb_xfer_errcheck(handle, h->databuf, 2);
2085 }
2086 }
2087
2088 /** */
2089 static int stlink_usb_read_mem8(void *handle, uint32_t addr, uint16_t len,
2090 uint8_t *buffer)
2091 {
2092 int res;
2093 uint16_t read_len = len;
2094 struct stlink_usb_handle_s *h = handle;
2095
2096 assert(handle != NULL);
2097
2098 /* max 8 bit read/write is 64 bytes or 512 bytes for v3 */
2099 if (len > stlink_usb_block(h)) {
2100 LOG_DEBUG("max buffer (%d) length exceeded", stlink_usb_block(h));
2101 return ERROR_FAIL;
2102 }
2103
2104 stlink_usb_init_buffer(handle, h->rx_ep, read_len);
2105
2106 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
2107 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_READMEM_8BIT;
2108 h_u32_to_le(h->cmdbuf+h->cmdidx, addr);
2109 h->cmdidx += 4;
2110 h_u16_to_le(h->cmdbuf+h->cmdidx, len);
2111 h->cmdidx += 2;
2112
2113 /* we need to fix read length for single bytes */
2114 if (read_len == 1)
2115 read_len++;
2116
2117 res = stlink_usb_xfer_noerrcheck(handle, h->databuf, read_len);
2118
2119 if (res != ERROR_OK)
2120 return res;
2121
2122 memcpy(buffer, h->databuf, len);
2123
2124 return stlink_usb_get_rw_status(handle);
2125 }
2126
2127 /** */
2128 static int stlink_usb_write_mem8(void *handle, uint32_t addr, uint16_t len,
2129 const uint8_t *buffer)
2130 {
2131 int res;
2132 struct stlink_usb_handle_s *h = handle;
2133
2134 assert(handle != NULL);
2135
2136 /* max 8 bit read/write is 64 bytes or 512 bytes for v3 */
2137 if (len > stlink_usb_block(h)) {
2138 LOG_DEBUG("max buffer length (%d) exceeded", stlink_usb_block(h));
2139 return ERROR_FAIL;
2140 }
2141
2142 stlink_usb_init_buffer(handle, h->tx_ep, len);
2143
2144 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
2145 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_WRITEMEM_8BIT;
2146 h_u32_to_le(h->cmdbuf+h->cmdidx, addr);
2147 h->cmdidx += 4;
2148 h_u16_to_le(h->cmdbuf+h->cmdidx, len);
2149 h->cmdidx += 2;
2150
2151 res = stlink_usb_xfer_noerrcheck(handle, buffer, len);
2152
2153 if (res != ERROR_OK)
2154 return res;
2155
2156 return stlink_usb_get_rw_status(handle);
2157 }
2158
2159 /** */
2160 static int stlink_usb_read_mem16(void *handle, uint32_t addr, uint16_t len,
2161 uint8_t *buffer)
2162 {
2163 int res;
2164 struct stlink_usb_handle_s *h = handle;
2165
2166 assert(handle != NULL);
2167
2168 if (!(h->version.flags & STLINK_F_HAS_MEM_16BIT))
2169 return ERROR_COMMAND_NOTFOUND;
2170
2171 /* data must be a multiple of 2 and half-word aligned */
2172 if (len % 2 || addr % 2) {
2173 LOG_DEBUG("Invalid data alignment");
2174 return ERROR_TARGET_UNALIGNED_ACCESS;
2175 }
2176
2177 stlink_usb_init_buffer(handle, h->rx_ep, len);
2178
2179 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
2180 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_READMEM_16BIT;
2181 h_u32_to_le(h->cmdbuf+h->cmdidx, addr);
2182 h->cmdidx += 4;
2183 h_u16_to_le(h->cmdbuf+h->cmdidx, len);
2184 h->cmdidx += 2;
2185
2186 res = stlink_usb_xfer_noerrcheck(handle, h->databuf, len);
2187
2188 if (res != ERROR_OK)
2189 return res;
2190
2191 memcpy(buffer, h->databuf, len);
2192
2193 return stlink_usb_get_rw_status(handle);
2194 }
2195
2196 /** */
2197 static int stlink_usb_write_mem16(void *handle, uint32_t addr, uint16_t len,
2198 const uint8_t *buffer)
2199 {
2200 int res;
2201 struct stlink_usb_handle_s *h = handle;
2202
2203 assert(handle != NULL);
2204
2205 if (!(h->version.flags & STLINK_F_HAS_MEM_16BIT))
2206 return ERROR_COMMAND_NOTFOUND;
2207
2208 /* data must be a multiple of 2 and half-word aligned */
2209 if (len % 2 || addr % 2) {
2210 LOG_DEBUG("Invalid data alignment");
2211 return ERROR_TARGET_UNALIGNED_ACCESS;
2212 }
2213
2214 stlink_usb_init_buffer(handle, h->tx_ep, len);
2215
2216 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
2217 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_WRITEMEM_16BIT;
2218 h_u32_to_le(h->cmdbuf+h->cmdidx, addr);
2219 h->cmdidx += 4;
2220 h_u16_to_le(h->cmdbuf+h->cmdidx, len);
2221 h->cmdidx += 2;
2222
2223 res = stlink_usb_xfer_noerrcheck(handle, buffer, len);
2224
2225 if (res != ERROR_OK)
2226 return res;
2227
2228 return stlink_usb_get_rw_status(handle);
2229 }
2230
2231 /** */
2232 static int stlink_usb_read_mem32(void *handle, uint32_t addr, uint16_t len,
2233 uint8_t *buffer)
2234 {
2235 int res;
2236 struct stlink_usb_handle_s *h = handle;
2237
2238 assert(handle != NULL);
2239
2240 /* data must be a multiple of 4 and word aligned */
2241 if (len % 4 || addr % 4) {
2242 LOG_DEBUG("Invalid data alignment");
2243 return ERROR_TARGET_UNALIGNED_ACCESS;
2244 }
2245
2246 stlink_usb_init_buffer(handle, h->rx_ep, len);
2247
2248 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
2249 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_READMEM_32BIT;
2250 h_u32_to_le(h->cmdbuf+h->cmdidx, addr);
2251 h->cmdidx += 4;
2252 h_u16_to_le(h->cmdbuf+h->cmdidx, len);
2253 h->cmdidx += 2;
2254
2255 res = stlink_usb_xfer_noerrcheck(handle, h->databuf, len);
2256
2257 if (res != ERROR_OK)
2258 return res;
2259
2260 memcpy(buffer, h->databuf, len);
2261
2262 return stlink_usb_get_rw_status(handle);
2263 }
2264
2265 /** */
2266 static int stlink_usb_write_mem32(void *handle, uint32_t addr, uint16_t len,
2267 const uint8_t *buffer)
2268 {
2269 int res;
2270 struct stlink_usb_handle_s *h = handle;
2271
2272 assert(handle != NULL);
2273
2274 /* data must be a multiple of 4 and word aligned */
2275 if (len % 4 || addr % 4) {
2276 LOG_DEBUG("Invalid data alignment");
2277 return ERROR_TARGET_UNALIGNED_ACCESS;
2278 }
2279
2280 stlink_usb_init_buffer(handle, h->tx_ep, len);
2281
2282 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
2283 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_WRITEMEM_32BIT;
2284 h_u32_to_le(h->cmdbuf+h->cmdidx, addr);
2285 h->cmdidx += 4;
2286 h_u16_to_le(h->cmdbuf+h->cmdidx, len);
2287 h->cmdidx += 2;
2288
2289 res = stlink_usb_xfer_noerrcheck(handle, buffer, len);
2290
2291 if (res != ERROR_OK)
2292 return res;
2293
2294 return stlink_usb_get_rw_status(handle);
2295 }
2296
2297 static uint32_t stlink_max_block_size(uint32_t tar_autoincr_block, uint32_t address)
2298 {
2299 uint32_t max_tar_block = (tar_autoincr_block - ((tar_autoincr_block - 1) & address));
2300 if (max_tar_block == 0)
2301 max_tar_block = 4;
2302 return max_tar_block;
2303 }
2304
2305 static int stlink_usb_read_mem(void *handle, uint32_t addr, uint32_t size,
2306 uint32_t count, uint8_t *buffer)
2307 {
2308 int retval = ERROR_OK;
2309 uint32_t bytes_remaining;
2310 int retries = 0;
2311 struct stlink_usb_handle_s *h = handle;
2312
2313 /* calculate byte count */
2314 count *= size;
2315
2316 /* switch to 8 bit if stlink does not support 16 bit memory read */
2317 if (size == 2 && !(h->version.flags & STLINK_F_HAS_MEM_16BIT))
2318 size = 1;
2319
2320 while (count) {
2321
2322 bytes_remaining = (size != 1) ? \
2323 stlink_max_block_size(h->max_mem_packet, addr) : stlink_usb_block(h);
2324
2325 if (count < bytes_remaining)
2326 bytes_remaining = count;
2327
2328 if (h->transport == HL_TRANSPORT_SWIM) {
2329 retval = stlink_swim_readbytes(handle, addr, bytes_remaining, buffer);
2330 if (retval != ERROR_OK)
2331 return retval;
2332 } else
2333 /*
2334 * all stlink support 8/32bit memory read/writes and only from
2335 * stlink V2J26 there is support for 16 bit memory read/write.
2336 * Honour 32 bit and, if possible, 16 bit too. Otherwise, handle
2337 * as 8bit access.
2338 */
2339 if (size != 1) {
2340
2341 /* When in jtag mode the stlink uses the auto-increment functionality.
2342 * However it expects us to pass the data correctly, this includes
2343 * alignment and any page boundaries. We already do this as part of the
2344 * adi_v5 implementation, but the stlink is a hla adapter and so this
2345 * needs implementing manually.
2346 * currently this only affects jtag mode, according to ST they do single
2347 * access in SWD mode - but this may change and so we do it for both modes */
2348
2349 /* we first need to check for any unaligned bytes */
2350 if (addr & (size - 1)) {
2351
2352 uint32_t head_bytes = size - (addr & (size - 1));
2353 retval = stlink_usb_read_mem8(handle, addr, head_bytes, buffer);
2354 if (retval == ERROR_WAIT && retries < MAX_WAIT_RETRIES) {
2355 usleep((1<<retries++) * 1000);
2356 continue;
2357 }
2358 if (retval != ERROR_OK)
2359 return retval;
2360 buffer += head_bytes;
2361 addr += head_bytes;
2362 count -= head_bytes;
2363 bytes_remaining -= head_bytes;
2364 }
2365
2366 if (bytes_remaining & (size - 1))
2367 retval = stlink_usb_read_mem(handle, addr, 1, bytes_remaining, buffer);
2368 else if (size == 2)
2369 retval = stlink_usb_read_mem16(handle, addr, bytes_remaining, buffer);
2370 else
2371 retval = stlink_usb_read_mem32(handle, addr, bytes_remaining, buffer);
2372 } else
2373 retval = stlink_usb_read_mem8(handle, addr, bytes_remaining, buffer);
2374
2375 if (retval == ERROR_WAIT && retries < MAX_WAIT_RETRIES) {
2376 usleep((1<<retries++) * 1000);
2377 continue;
2378 }
2379 if (retval != ERROR_OK)
2380 return retval;
2381
2382 buffer += bytes_remaining;
2383 addr += bytes_remaining;
2384 count -= bytes_remaining;
2385 }
2386
2387 return retval;
2388 }
2389
2390 static int stlink_usb_write_mem(void *handle, uint32_t addr, uint32_t size,
2391 uint32_t count, const uint8_t *buffer)
2392 {
2393 int retval = ERROR_OK;
2394 uint32_t bytes_remaining;
2395 int retries = 0;
2396 struct stlink_usb_handle_s *h = handle;
2397
2398 /* calculate byte count */
2399 count *= size;
2400
2401 /* switch to 8 bit if stlink does not support 16 bit memory read */
2402 if (size == 2 && !(h->version.flags & STLINK_F_HAS_MEM_16BIT))
2403 size = 1;
2404
2405 while (count) {
2406
2407 bytes_remaining = (size != 1) ? \
2408 stlink_max_block_size(h->max_mem_packet, addr) : stlink_usb_block(h);
2409
2410 if (count < bytes_remaining)
2411 bytes_remaining = count;
2412
2413 if (h->transport == HL_TRANSPORT_SWIM) {
2414 retval = stlink_swim_writebytes(handle, addr, bytes_remaining, buffer);
2415 if (retval != ERROR_OK)
2416 return retval;
2417 } else
2418 /*
2419 * all stlink support 8/32bit memory read/writes and only from
2420 * stlink V2J26 there is support for 16 bit memory read/write.
2421 * Honour 32 bit and, if possible, 16 bit too. Otherwise, handle
2422 * as 8bit access.
2423 */
2424 if (size != 1) {
2425
2426 /* When in jtag mode the stlink uses the auto-increment functionality.
2427 * However it expects us to pass the data correctly, this includes
2428 * alignment and any page boundaries. We already do this as part of the
2429 * adi_v5 implementation, but the stlink is a hla adapter and so this
2430 * needs implementing manually.
2431 * currently this only affects jtag mode, according to ST they do single
2432 * access in SWD mode - but this may change and so we do it for both modes */
2433
2434 /* we first need to check for any unaligned bytes */
2435 if (addr & (size - 1)) {
2436
2437 uint32_t head_bytes = size - (addr & (size - 1));
2438 retval = stlink_usb_write_mem8(handle, addr, head_bytes, buffer);
2439 if (retval == ERROR_WAIT && retries < MAX_WAIT_RETRIES) {
2440 usleep((1<<retries++) * 1000);
2441 continue;
2442 }
2443 if (retval != ERROR_OK)
2444 return retval;
2445 buffer += head_bytes;
2446 addr += head_bytes;
2447 count -= head_bytes;
2448 bytes_remaining -= head_bytes;
2449 }
2450
2451 if (bytes_remaining & (size - 1))
2452 retval = stlink_usb_write_mem(handle, addr, 1, bytes_remaining, buffer);
2453 else if (size == 2)
2454 retval = stlink_usb_write_mem16(handle, addr, bytes_remaining, buffer);
2455 else
2456 retval = stlink_usb_write_mem32(handle, addr, bytes_remaining, buffer);
2457
2458 } else
2459 retval = stlink_usb_write_mem8(handle, addr, bytes_remaining, buffer);
2460 if (retval == ERROR_WAIT && retries < MAX_WAIT_RETRIES) {
2461 usleep((1<<retries++) * 1000);
2462 continue;
2463 }
2464 if (retval != ERROR_OK)
2465 return retval;
2466
2467 buffer += bytes_remaining;
2468 addr += bytes_remaining;
2469 count -= bytes_remaining;
2470 }
2471
2472 return retval;
2473 }
2474
2475 /** */
2476 static int stlink_usb_override_target(const char *targetname)
2477 {
2478 return !strcmp(targetname, "cortex_m");
2479 }
2480
2481 static int stlink_speed_swim(void *handle, int khz, bool query)
2482 {
2483 /*
2484 we dont care what the khz rate is
2485 we only have low and high speed...
2486 before changing speed the SWIM_CSR HS bit
2487 must be updated
2488 */
2489 if (khz == 0)
2490 stlink_swim_speed(handle, 0);
2491 else
2492 stlink_swim_speed(handle, 1);
2493 return khz;
2494 }
2495
2496 static int stlink_match_speed_map(const struct speed_map *map, unsigned int map_size, int khz, bool query)
2497 {
2498 unsigned int i;
2499 int speed_index = -1;
2500 int speed_diff = INT_MAX;
2501 int last_valid_speed = -1;
2502 bool match = true;
2503
2504 for (i = 0; i < map_size; i++) {
2505 if (!map[i].speed)
2506 continue;
2507 last_valid_speed = i;
2508 if (khz == map[i].speed) {
2509 speed_index = i;
2510 break;
2511 } else {
2512 int current_diff = khz - map[i].speed;
2513 /* get abs value for comparison */
2514 current_diff = (current_diff > 0) ? current_diff : -current_diff;
2515 if ((current_diff < speed_diff) && khz >= map[i].speed) {
2516 speed_diff = current_diff;
2517 speed_index = i;
2518 }
2519 }
2520 }
2521
2522 if (speed_index == -1) {
2523 /* this will only be here if we cannot match the slow speed.
2524 * use the slowest speed we support.*/
2525 speed_index = last_valid_speed;
2526 match = false;
2527 } else if (i == map_size)
2528 match = false;
2529
2530 if (!match && query) {
2531 LOG_INFO("Unable to match requested speed %d kHz, using %d kHz", \
2532 khz, map[speed_index].speed);
2533 }
2534
2535 return speed_index;
2536 }
2537
2538 static int stlink_speed_swd(void *handle, int khz, bool query)
2539 {
2540 int speed_index;
2541 struct stlink_usb_handle_s *h = handle;
2542
2543 /* old firmware cannot change it */
2544 if (!(h->version.flags & STLINK_F_HAS_SWD_SET_FREQ))
2545 return khz;
2546
2547 speed_index = stlink_match_speed_map(stlink_khz_to_speed_map_swd,
2548 ARRAY_SIZE(stlink_khz_to_speed_map_swd), khz, query);
2549
2550 if (!query) {
2551 int result = stlink_usb_set_swdclk(h, stlink_khz_to_speed_map_swd[speed_index].speed_divisor);
2552 if (result != ERROR_OK) {
2553 LOG_ERROR("Unable to set adapter speed");
2554 return khz;
2555 }
2556 }
2557
2558 return stlink_khz_to_speed_map_swd[speed_index].speed;
2559 }
2560
2561 static int stlink_speed_jtag(void *handle, int khz, bool query)
2562 {
2563 int speed_index;
2564 struct stlink_usb_handle_s *h = handle;
2565
2566 /* old firmware cannot change it */
2567 if (!(h->version.flags & STLINK_F_HAS_JTAG_SET_FREQ))
2568 return khz;
2569
2570 speed_index = stlink_match_speed_map(stlink_khz_to_speed_map_jtag,
2571 ARRAY_SIZE(stlink_khz_to_speed_map_jtag), khz, query);
2572
2573 if (!query) {
2574 int result = stlink_usb_set_jtagclk(h, stlink_khz_to_speed_map_jtag[speed_index].speed_divisor);
2575 if (result != ERROR_OK) {
2576 LOG_ERROR("Unable to set adapter speed");
2577 return khz;
2578 }
2579 }
2580
2581 return stlink_khz_to_speed_map_jtag[speed_index].speed;
2582 }
2583
2584 void stlink_dump_speed_map(const struct speed_map *map, unsigned int map_size)
2585 {
2586 unsigned int i;
2587
2588 LOG_DEBUG("Supported clock speeds are:");
2589 for (i = 0; i < map_size; i++)
2590 if (map[i].speed)
2591 LOG_DEBUG("%d kHz", map[i].speed);
2592 }
2593
2594 static int stlink_get_com_freq(void *handle, bool is_jtag, struct speed_map *map)
2595 {
2596 struct stlink_usb_handle_s *h = handle;
2597 int i;
2598
2599 if (h->version.jtag_api != STLINK_JTAG_API_V3) {
2600 LOG_ERROR("Unknown command");
2601 return 0;
2602 }
2603
2604 stlink_usb_init_buffer(handle, h->rx_ep, 16);
2605
2606 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
2607 h->cmdbuf[h->cmdidx++] = STLINK_APIV3_GET_COM_FREQ;
2608 h->cmdbuf[h->cmdidx++] = is_jtag ? 1 : 0;
2609
2610 int res = stlink_usb_xfer_errcheck(handle, h->databuf, 52);
2611
2612 int size = h->databuf[8];
2613
2614 if (size > STLINK_V3_MAX_FREQ_NB)
2615 size = STLINK_V3_MAX_FREQ_NB;
2616
2617 for (i = 0; i < size; i++) {
2618 map[i].speed = le_to_h_u32(&h->databuf[12 + 4 * i]);
2619 map[i].speed_divisor = i;
2620 }
2621
2622 /* set to zero all the next entries */
2623 for (i = size; i < STLINK_V3_MAX_FREQ_NB; i++)
2624 map[i].speed = 0;
2625
2626 return res;
2627 }
2628
2629 static int stlink_set_com_freq(void *handle, bool is_jtag, unsigned int frequency)
2630 {
2631 struct stlink_usb_handle_s *h = handle;
2632
2633 if (h->version.jtag_api != STLINK_JTAG_API_V3) {
2634 LOG_ERROR("Unknown command");
2635 return 0;
2636 }
2637
2638 stlink_usb_init_buffer(handle, h->rx_ep, 16);
2639
2640 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
2641 h->cmdbuf[h->cmdidx++] = STLINK_APIV3_SET_COM_FREQ;
2642 h->cmdbuf[h->cmdidx++] = is_jtag ? 1 : 0;
2643 h->cmdbuf[h->cmdidx++] = 0;
2644
2645 h_u32_to_le(&h->cmdbuf[4], frequency);
2646
2647 return stlink_usb_xfer_errcheck(handle, h->databuf, 8);
2648 }
2649
2650 static int stlink_speed_v3(void *handle, bool is_jtag, int khz, bool query)
2651 {
2652 struct stlink_usb_handle_s *h = handle;
2653 int speed_index;
2654 struct speed_map map[STLINK_V3_MAX_FREQ_NB];
2655
2656 stlink_get_com_freq(h, is_jtag, map);
2657
2658 speed_index = stlink_match_speed_map(map, ARRAY_SIZE(map), khz, query);
2659
2660 if (!query) {
2661 int result = stlink_set_com_freq(h, is_jtag, map[speed_index].speed);
2662 if (result != ERROR_OK) {
2663 LOG_ERROR("Unable to set adapter speed");
2664 return khz;
2665 }
2666 }
2667 return map[speed_index].speed;
2668 }
2669
2670 static int stlink_speed(void *handle, int khz, bool query)
2671 {
2672 struct stlink_usb_handle_s *h = handle;
2673
2674 if (!handle)
2675 return khz;
2676
2677 switch (h->transport) {
2678 case HL_TRANSPORT_SWIM:
2679 return stlink_speed_swim(handle, khz, query);
2680 break;
2681 case HL_TRANSPORT_SWD:
2682 if (h->version.jtag_api == STLINK_JTAG_API_V3)
2683 return stlink_speed_v3(handle, false, khz, query);
2684 else
2685 return stlink_speed_swd(handle, khz, query);
2686 break;
2687 case HL_TRANSPORT_JTAG:
2688 if (h->version.jtag_api == STLINK_JTAG_API_V3)
2689 return stlink_speed_v3(handle, true, khz, query);
2690 else
2691 return stlink_speed_jtag(handle, khz, query);
2692 break;
2693 default:
2694 break;
2695 }
2696
2697 return khz;
2698 }
2699
2700 /** */
2701 static int stlink_usb_close(void *handle)
2702 {
2703 int res;
2704 uint8_t mode;
2705 enum stlink_mode emode;
2706 struct stlink_usb_handle_s *h = handle;
2707
2708 if (h && h->fd)
2709 res = stlink_usb_current_mode(handle, &mode);
2710 else
2711 res = ERROR_FAIL;
2712 /* do not exit if return code != ERROR_OK,
2713 it prevents us from closing jtag_libusb */
2714
2715 if (res == ERROR_OK) {
2716 /* try to exit current mode */
2717 switch (mode) {
2718 case STLINK_DEV_DFU_MODE:
2719 emode = STLINK_MODE_DFU;
2720 break;
2721 case STLINK_DEV_DEBUG_MODE:
2722 emode = STLINK_MODE_DEBUG_SWD;
2723 break;
2724 case STLINK_DEV_SWIM_MODE:
2725 emode = STLINK_MODE_DEBUG_SWIM;
2726 break;
2727 case STLINK_DEV_BOOTLOADER_MODE:
2728 case STLINK_DEV_MASS_MODE:
2729 default:
2730 emode = STLINK_MODE_UNKNOWN;
2731 break;
2732 }
2733
2734 if (emode != STLINK_MODE_UNKNOWN)
2735 stlink_usb_mode_leave(handle, emode);
2736 /* do not check return code, it prevent
2737 us from closing jtag_libusb */
2738 }
2739
2740 if (h && h->fd)
2741 jtag_libusb_close(h->fd);
2742
2743 free(h);
2744
2745 return ERROR_OK;
2746 }
2747
2748 /** */
2749 static int stlink_usb_open(struct hl_interface_param_s *param, void **fd)
2750 {
2751 int err, retry_count = 1;
2752 struct stlink_usb_handle_s *h;
2753
2754 LOG_DEBUG("stlink_usb_open");
2755
2756 h = calloc(1, sizeof(struct stlink_usb_handle_s));
2757
2758 if (h == 0) {
2759 LOG_DEBUG("malloc failed");
2760 return ERROR_FAIL;
2761 }
2762
2763 h->transport = param->transport;
2764
2765 for (unsigned i = 0; param->vid[i]; i++) {
2766 LOG_DEBUG("transport: %d vid: 0x%04x pid: 0x%04x serial: %s",
2767 param->transport, param->vid[i], param->pid[i],
2768 param->serial ? param->serial : "");
2769 }
2770
2771 /*
2772 On certain host USB configurations(e.g. MacBook Air)
2773 STLINKv2 dongle seems to have its FW in a funky state if,
2774 after plugging it in, you try to use openocd with it more
2775 then once (by launching and closing openocd). In cases like
2776 that initial attempt to read the FW info via
2777 stlink_usb_version will fail and the device has to be reset
2778 in order to become operational.
2779 */
2780 do {
2781 if (jtag_libusb_open(param->vid, param->pid, param->serial,
2782 &h->fd, NULL) != ERROR_OK) {
2783 LOG_ERROR("open failed");
2784 goto error_open;
2785 }
2786
2787 jtag_libusb_set_configuration(h->fd, 0);
2788
2789 if (libusb_claim_interface(h->fd, 0) != ERROR_OK) {
2790 LOG_DEBUG("claim interface failed");
2791 goto error_open;
2792 }
2793
2794 /* RX EP is common for all versions */
2795 h->rx_ep = STLINK_RX_EP;
2796
2797 uint16_t pid;
2798 if (jtag_libusb_get_pid(libusb_get_device(h->fd), &pid) != ERROR_OK) {
2799 LOG_DEBUG("libusb_get_pid failed");
2800 goto error_open;
2801 }
2802
2803 /* wrap version for first read */
2804 switch (pid) {
2805 case STLINK_V1_PID:
2806 h->version.stlink = 1;
2807 h->tx_ep = STLINK_TX_EP;
2808 break;
2809 case STLINK_V3_USBLOADER_PID:
2810 case STLINK_V3E_PID:
2811 case STLINK_V3S_PID:
2812 case STLINK_V3_2VCP_PID:
2813 h->version.stlink = 3;
2814 h->tx_ep = STLINK_V2_1_TX_EP;
2815 h->trace_ep = STLINK_V2_1_TRACE_EP;
2816 break;
2817 case STLINK_V2_1_PID:
2818 case STLINK_V2_1_NO_MSD_PID:
2819 h->version.stlink = 2;
2820 h->tx_ep = STLINK_V2_1_TX_EP;
2821 h->trace_ep = STLINK_V2_1_TRACE_EP;
2822 break;
2823 default:
2824 /* fall through - we assume V2 to be the default version*/
2825 case STLINK_V2_PID:
2826 h->version.stlink = 2;
2827 h->tx_ep = STLINK_TX_EP;
2828 h->trace_ep = STLINK_TRACE_EP;
2829 break;
2830 }
2831
2832 /* get the device version */
2833 err = stlink_usb_version(h);
2834
2835 if (err == ERROR_OK) {
2836 break;
2837 } else if (h->version.stlink == 1 ||
2838 retry_count == 0) {
2839 LOG_ERROR("read version failed");
2840 goto error_open;
2841 } else {
2842 err = libusb_release_interface(h->fd, 0);
2843 if (err != ERROR_OK) {
2844 LOG_ERROR("release interface failed");
2845 goto error_open;
2846 }
2847
2848 err = libusb_reset_device(h->fd);
2849 if (err != ERROR_OK) {
2850 LOG_ERROR("reset device failed");
2851 goto error_open;
2852 }
2853
2854 jtag_libusb_close(h->fd);
2855 /*
2856 Give the device one second to settle down and
2857 reenumerate.
2858 */
2859 usleep(1 * 1000 * 1000);
2860 retry_count--;
2861 }
2862 } while (1);
2863
2864 /* check if mode is supported */
2865 err = ERROR_OK;
2866
2867 switch (h->transport) {
2868 case HL_TRANSPORT_SWD:
2869 if (h->version.jtag_api == STLINK_JTAG_API_V1)
2870 err = ERROR_FAIL;
2871 /* fall-through */
2872 case HL_TRANSPORT_JTAG:
2873 if (h->version.jtag == 0)
2874 err = ERROR_FAIL;
2875 break;
2876 case HL_TRANSPORT_SWIM:
2877 if (h->version.swim == 0)
2878 err = ERROR_FAIL;
2879 break;
2880 default:
2881 err = ERROR_FAIL;
2882 break;
2883 }
2884
2885 if (err != ERROR_OK) {
2886 LOG_ERROR("mode (transport) not supported by device");
2887 goto error_open;
2888 }
2889
2890 /* initialize the debug hardware */
2891 err = stlink_usb_init_mode(h, param->connect_under_reset, param->initial_interface_speed);
2892
2893 if (err != ERROR_OK) {
2894 LOG_ERROR("init mode failed (unable to connect to the target)");
2895 goto error_open;
2896 }
2897
2898 if (h->transport == HL_TRANSPORT_SWIM) {
2899 err = stlink_swim_enter(h);
2900 if (err != ERROR_OK) {
2901 LOG_ERROR("stlink_swim_enter_failed (unable to connect to the target)");
2902 goto error_open;
2903 }
2904 *fd = h;
2905 h->max_mem_packet = STLINK_DATA_SIZE;
2906 return ERROR_OK;
2907 }
2908
2909 /* get cpuid, so we can determine the max page size
2910 * start with a safe default */
2911 h->max_mem_packet = (1 << 10);
2912
2913 uint8_t buffer[4];
2914 err = stlink_usb_read_mem32(h, CPUID, 4, buffer);
2915 if (err == ERROR_OK) {
2916 uint32_t cpuid = le_to_h_u32(buffer);
2917 int i = (cpuid >> 4) & 0xf;
2918 if (i == 4 || i == 3) {
2919 /* Cortex-M3/M4 has 4096 bytes autoincrement range */
2920 h->max_mem_packet = (1 << 12);
2921 }
2922 }
2923
2924 LOG_DEBUG("Using TAR autoincrement: %" PRIu32, h->max_mem_packet);
2925
2926 *fd = h;
2927
2928 return ERROR_OK;
2929
2930 error_open:
2931 stlink_usb_close(h);
2932
2933 return ERROR_FAIL;
2934 }
2935
2936 int stlink_config_trace(void *handle, bool enabled,
2937 enum tpiu_pin_protocol pin_protocol, uint32_t port_size,
2938 unsigned int *trace_freq, unsigned int traceclkin_freq,
2939 uint16_t *prescaler)
2940 {
2941 struct stlink_usb_handle_s *h = handle;
2942 uint16_t presc;
2943
2944 if (enabled && (!(h->version.flags & STLINK_F_HAS_TRACE) ||
2945 pin_protocol != TPIU_PIN_PROTOCOL_ASYNC_UART)) {
2946 LOG_ERROR("The attached ST-LINK version doesn't support this trace mode");
2947 return ERROR_FAIL;
2948 }
2949
2950 if (!enabled) {
2951 stlink_usb_trace_disable(h);
2952 return ERROR_OK;
2953 }
2954
2955 if (*trace_freq > STLINK_TRACE_MAX_HZ) {
2956 LOG_ERROR("ST-LINK doesn't support SWO frequency higher than %u",
2957 STLINK_TRACE_MAX_HZ);
2958 return ERROR_FAIL;
2959 }
2960
2961 stlink_usb_trace_disable(h);
2962
2963 if (!*trace_freq)
2964 *trace_freq = STLINK_TRACE_MAX_HZ;
2965
2966 presc = traceclkin_freq / *trace_freq;
2967
2968 if (traceclkin_freq % *trace_freq > 0)
2969 presc++;
2970
2971 if (presc > TPIU_ACPR_MAX_SWOSCALER) {
2972 LOG_ERROR("SWO frequency is not suitable. Please choose a different "
2973 "frequency.");
2974 return ERROR_FAIL;
2975 }
2976
2977 *prescaler = presc;
2978 h->trace.source_hz = *trace_freq;
2979
2980 return stlink_usb_trace_enable(h);
2981 }
2982
2983 /** */
2984 static int stlink_usb_init_access_port(void *handle, unsigned char ap_num)
2985 {
2986 struct stlink_usb_handle_s *h = handle;
2987
2988 assert(handle != NULL);
2989
2990 if (!(h->version.flags & STLINK_F_HAS_AP_INIT))
2991 return ERROR_COMMAND_NOTFOUND;
2992
2993 LOG_DEBUG_IO("init ap_num = %d", ap_num);
2994 stlink_usb_init_buffer(handle, h->rx_ep, 16);
2995 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
2996 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_INIT_AP;
2997 h->cmdbuf[h->cmdidx++] = ap_num;
2998
2999 return stlink_usb_xfer_errcheck(handle, h->databuf, 2);
3000 }
3001
3002 /** */
3003 static int stlink_usb_close_access_port(void *handle, unsigned char ap_num)
3004 {
3005 struct stlink_usb_handle_s *h = handle;
3006
3007 assert(handle != NULL);
3008
3009 if (!(h->version.flags & STLINK_F_HAS_AP_INIT))
3010 return ERROR_COMMAND_NOTFOUND;
3011
3012 LOG_DEBUG_IO("close ap_num = %d", ap_num);
3013 stlink_usb_init_buffer(handle, h->rx_ep, 16);
3014 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
3015 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_CLOSE_AP_DBG;
3016 h->cmdbuf[h->cmdidx++] = ap_num;
3017
3018 return stlink_usb_xfer_errcheck(handle, h->databuf, 2);
3019 }
3020
3021 /** */
3022 static int stlink_read_dap_register(void *handle, unsigned short dap_port,
3023 unsigned short addr, uint32_t *val)
3024 {
3025 struct stlink_usb_handle_s *h = handle;
3026 int retval;
3027
3028 assert(handle != NULL);
3029
3030 if (!(h->version.flags & STLINK_F_HAS_DAP_REG))
3031 return ERROR_COMMAND_NOTFOUND;
3032
3033 stlink_usb_init_buffer(handle, h->rx_ep, 16);
3034 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
3035 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_READ_DAP_REG;
3036 h_u16_to_le(&h->cmdbuf[2], dap_port);
3037 h_u16_to_le(&h->cmdbuf[4], addr);
3038
3039 retval = stlink_usb_xfer_errcheck(handle, h->databuf, 8);
3040 *val = le_to_h_u32(h->databuf + 4);
3041 LOG_DEBUG_IO("dap_port_read = %d, addr = 0x%x, value = 0x%x", dap_port, addr, *val);
3042 return retval;
3043 }
3044
3045 /** */
3046 static int stlink_write_dap_register(void *handle, unsigned short dap_port,
3047 unsigned short addr, uint32_t val)
3048 {
3049 struct stlink_usb_handle_s *h = handle;
3050
3051 assert(handle != NULL);
3052
3053 if (!(h->version.flags & STLINK_F_HAS_DAP_REG))
3054 return ERROR_COMMAND_NOTFOUND;
3055
3056 LOG_DEBUG_IO("dap_write port = %d, addr = 0x%x, value = 0x%x", dap_port, addr, val);
3057 stlink_usb_init_buffer(handle, h->rx_ep, 16);
3058 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_COMMAND;
3059 h->cmdbuf[h->cmdidx++] = STLINK_DEBUG_APIV2_WRITE_DAP_REG;
3060 h_u16_to_le(&h->cmdbuf[2], dap_port);
3061 h_u16_to_le(&h->cmdbuf[4], addr);
3062 h_u32_to_le(&h->cmdbuf[6], val);
3063 return stlink_usb_xfer_errcheck(handle, h->databuf, 2);
3064 }
3065
3066 /** */
3067 struct hl_layout_api_s stlink_usb_layout_api = {
3068 /** */
3069 .open = stlink_usb_open,
3070 /** */
3071 .close = stlink_usb_close,
3072 /** */
3073 .idcode = stlink_usb_idcode,
3074 /** */
3075 .state = stlink_usb_state,
3076 /** */
3077 .reset = stlink_usb_reset,
3078 /** */
3079 .assert_srst = stlink_usb_assert_srst,
3080 /** */
3081 .run = stlink_usb_run,
3082 /** */
3083 .halt = stlink_usb_halt,
3084 /** */
3085 .step = stlink_usb_step,
3086 /** */
3087 .read_regs = stlink_usb_read_regs,
3088 /** */
3089 .read_reg = stlink_usb_read_reg,
3090 /** */
3091 .write_reg = stlink_usb_write_reg,
3092 /** */
3093 .read_mem = stlink_usb_read_mem,
3094 /** */
3095 .write_mem = stlink_usb_write_mem,
3096 /** */
3097 .write_debug_reg = stlink_usb_write_debug_reg,
3098 /** */
3099 .override_target = stlink_usb_override_target,
3100 /** */
3101 .speed = stlink_speed,
3102 /** */
3103 .config_trace = stlink_config_trace,
3104 /** */
3105 .poll_trace = stlink_usb_trace_read,
3106 };
3107
3108 /*****************************************************************************
3109 * DAP direct interface
3110 */
3111
3112 static struct stlink_usb_handle_s *stlink_dap_handle;
3113 static struct hl_interface_param_s stlink_dap_param;
3114 static DECLARE_BITMAP(opened_ap, DP_APSEL_MAX + 1);
3115 static int stlink_dap_error = ERROR_OK;
3116
3117 static int stlink_dap_op_queue_dp_read(struct adiv5_dap *dap, unsigned reg,
3118 uint32_t *data);
3119
3120 /** */
3121 static int stlink_dap_record_error(int error)
3122 {
3123 if (stlink_dap_error == ERROR_OK)
3124 stlink_dap_error = error;
3125 return ERROR_OK;
3126 }
3127
3128 /** */
3129 static int stlink_dap_get_and_clear_error(void)
3130 {
3131 int retval = stlink_dap_error;
3132 stlink_dap_error = ERROR_OK;
3133 return retval;
3134 }
3135
3136 /** */
3137 static int stlink_dap_open_ap(unsigned short apsel)
3138 {
3139 int retval;
3140
3141 /* nothing to do on old versions */
3142 if (!(stlink_dap_handle->version.flags & STLINK_F_HAS_AP_INIT))
3143 return ERROR_OK;
3144
3145 if (apsel > DP_APSEL_MAX)
3146 return ERROR_FAIL;
3147
3148 if (test_bit(apsel, opened_ap))
3149 return ERROR_OK;
3150
3151 retval = stlink_usb_init_access_port(stlink_dap_handle, apsel);
3152 if (retval != ERROR_OK)
3153 return retval;
3154
3155 LOG_DEBUG("AP %d enabled", apsel);
3156 set_bit(apsel, opened_ap);
3157 return ERROR_OK;
3158 }
3159
3160 /** */
3161 static int stlink_dap_closeall_ap(void)
3162 {
3163 int retval, apsel;
3164
3165 /* nothing to do on old versions */
3166 if (!(stlink_dap_handle->version.flags & STLINK_F_HAS_AP_INIT))
3167 return ERROR_OK;
3168
3169 for (apsel = 0; apsel <= DP_APSEL_MAX; apsel++) {
3170 if (!test_bit(apsel, opened_ap))
3171 continue;
3172 retval = stlink_usb_close_access_port(stlink_dap_handle, apsel);
3173 if (retval != ERROR_OK)
3174 return retval;
3175 clear_bit(apsel, opened_ap);
3176 }
3177 return ERROR_OK;
3178 }
3179
3180 /** */
3181 static int stlink_dap_reinit_interface(void)
3182 {
3183 int retval;
3184 enum stlink_mode mode;
3185
3186 /*
3187 * On JTAG only, it should be enough to call stlink_usb_reset(). But on
3188 * some firmware version it does not work as expected, and there is no
3189 * equivalent for SWD.
3190 * At least for now, to reset the interface quit from JTAG/SWD mode then
3191 * select the mode again.
3192 */
3193
3194 mode = stlink_get_mode(stlink_dap_param.transport);
3195 if (!stlink_dap_handle->reconnect_pending) {
3196 stlink_dap_handle->reconnect_pending = true;
3197 stlink_usb_mode_leave(stlink_dap_handle, mode);
3198 }
3199
3200 retval = stlink_usb_mode_enter(stlink_dap_handle, mode);
3201 if (retval != ERROR_OK)
3202 return retval;
3203
3204 stlink_dap_handle->reconnect_pending = false;
3205 /* on new FW, calling mode-leave closes all the opened AP; reopen them! */
3206 if (stlink_dap_handle->version.flags & STLINK_F_HAS_AP_INIT)
3207 for (int apsel = 0; apsel <= DP_APSEL_MAX; apsel++)
3208 if (test_bit(apsel, opened_ap)) {
3209 clear_bit(apsel, opened_ap);
3210 stlink_dap_open_ap(apsel);
3211 }
3212 return ERROR_OK;
3213 }
3214
3215 /** */
3216 static int stlink_dap_op_connect(struct adiv5_dap *dap)
3217 {
3218 uint32_t idcode;
3219 int retval;
3220
3221 LOG_INFO("stlink_dap_op_connect(%sconnect)", dap->do_reconnect ? "re" : "");
3222
3223 /* Check if we should reset srst already when connecting, but not if reconnecting. */
3224 if (!dap->do_reconnect) {
3225 enum reset_types jtag_reset_config = jtag_get_reset_config();
3226
3227 if (jtag_reset_config & RESET_CNCT_UNDER_SRST) {
3228 if (jtag_reset_config & RESET_SRST_NO_GATING)
3229 adapter_assert_reset();
3230 else
3231 LOG_WARNING("\'srst_nogate\' reset_config option is required");
3232 }
3233 }
3234
3235 dap->do_reconnect = false;
3236 dap_invalidate_cache(dap);
3237
3238 retval = dap_dp_init(dap);
3239 if (retval != ERROR_OK) {
3240 dap->do_reconnect = true;
3241 return retval;
3242 }
3243
3244 retval = stlink_usb_idcode(stlink_dap_handle, &idcode);
3245 if (retval == ERROR_OK)
3246 LOG_INFO("%s %#8.8" PRIx32,
3247 (stlink_dap_handle->transport == HL_TRANSPORT_JTAG) ? "JTAG IDCODE" : "SWD DPIDR",
3248 idcode);
3249 else
3250 dap->do_reconnect = true;
3251
3252 return retval;
3253 }
3254
3255 /** */
3256 static int stlink_dap_check_reconnect(struct adiv5_dap *dap)
3257 {
3258 int retval;
3259
3260 if (!dap->do_reconnect)
3261 return ERROR_OK;
3262
3263 retval = stlink_dap_reinit_interface();
3264 if (retval != ERROR_OK)
3265 return retval;
3266
3267 return stlink_dap_op_connect(dap);
3268 }
3269
3270 /** */
3271 static int stlink_dap_op_send_sequence(struct adiv5_dap *dap, enum swd_special_seq seq)
3272 {
3273 /* Ignore the request */
3274 return ERROR_OK;
3275 }
3276
3277 /** */
3278 static int stlink_dap_op_queue_dp_read(struct adiv5_dap *dap, unsigned reg,
3279 uint32_t *data)
3280 {
3281 uint32_t dummy;
3282 int retval;
3283
3284 if (!(stlink_dap_handle->version.flags & STLINK_F_HAS_DPBANKSEL))
3285 if (reg & 0x000000F0) {
3286 LOG_ERROR("Banked DP registers not supported in current STLink FW");
3287 return ERROR_COMMAND_NOTFOUND;
3288 }
3289
3290 retval = stlink_dap_check_reconnect(dap);
3291 if (retval != ERROR_OK)
3292 return retval;
3293
3294 data = data ? : &dummy;
3295 if (stlink_dap_handle->version.flags & STLINK_F_QUIRK_JTAG_DP_READ
3296 && stlink_dap_handle->transport == HL_TRANSPORT_JTAG) {
3297 /* Quirk required in JTAG. Read RDBUFF to get the data */
3298 retval = stlink_read_dap_register(stlink_dap_handle,
3299 STLINK_DEBUG_PORT_ACCESS, reg, &dummy);
3300 if (retval == ERROR_OK)
3301 retval = stlink_read_dap_register(stlink_dap_handle,
3302 STLINK_DEBUG_PORT_ACCESS, DP_RDBUFF, data);
3303 } else {
3304 retval = stlink_read_dap_register(stlink_dap_handle,
3305 STLINK_DEBUG_PORT_ACCESS, reg, data);
3306 }
3307
3308 return stlink_dap_record_error(retval);
3309 }
3310
3311 /** */
3312 static int stlink_dap_op_queue_dp_write(struct adiv5_dap *dap, unsigned reg,
3313 uint32_t data)
3314 {
3315 int retval;
3316
3317 if (!(stlink_dap_handle->version.flags & STLINK_F_HAS_DPBANKSEL))
3318 if (reg & 0x000000F0) {
3319 LOG_ERROR("Banked DP registers not supported in current STLink FW");
3320 return ERROR_COMMAND_NOTFOUND;
3321 }
3322
3323 if (reg == DP_SELECT && (data & DP_SELECT_DPBANK) != 0) {
3324 /* ignored if STLINK_F_HAS_DPBANKSEL, not properly managed otherwise */
3325 LOG_DEBUG("Ignoring DPBANKSEL while write SELECT");
3326 data &= ~DP_SELECT_DPBANK;
3327 }
3328
3329 retval = stlink_dap_check_reconnect(dap);
3330 if (retval != ERROR_OK)
3331 return retval;
3332
3333 /* ST-Link does not like that we set CORUNDETECT */
3334 if (reg == DP_CTRL_STAT)
3335 data &= ~CORUNDETECT;
3336
3337 retval = stlink_write_dap_register(stlink_dap_handle,
3338 STLINK_DEBUG_PORT_ACCESS, reg, data);
3339 return stlink_dap_record_error(retval);
3340 }
3341
3342 /** */
3343 static int stlink_dap_op_queue_ap_read(struct adiv5_ap *ap, unsigned reg,
3344 uint32_t *data)
3345 {
3346 struct adiv5_dap *dap = ap->dap;
3347 uint32_t dummy;
3348 int retval;
3349
3350 retval = stlink_dap_check_reconnect(dap);
3351 if (retval != ERROR_OK)
3352 return retval;
3353
3354 if (reg != AP_REG_IDR) {
3355 retval = stlink_dap_open_ap(ap->ap_num);
3356 if (retval != ERROR_OK)
3357 return retval;
3358 }
3359 data = data ? : &dummy;
3360 retval = stlink_read_dap_register(stlink_dap_handle, ap->ap_num, reg,
3361 data);
3362 dap->stlink_flush_ap_write = false;
3363 return stlink_dap_record_error(retval);
3364 }
3365
3366 /** */
3367 static int stlink_dap_op_queue_ap_write(struct adiv5_ap *ap, unsigned reg,
3368 uint32_t data)
3369 {
3370 struct adiv5_dap *dap = ap->dap;
3371 int retval;
3372
3373 retval = stlink_dap_check_reconnect(dap);
3374 if (retval != ERROR_OK)
3375 return retval;
3376
3377 retval = stlink_dap_open_ap(ap->ap_num);
3378 if (retval != ERROR_OK)
3379 return retval;
3380
3381 retval = stlink_write_dap_register(stlink_dap_handle, ap->ap_num, reg,
3382 data);
3383 dap->stlink_flush_ap_write = true;
3384 return stlink_dap_record_error(retval);
3385 }
3386
3387 /** */
3388 static int stlink_dap_op_queue_ap_abort(struct adiv5_dap *dap, uint8_t *ack)
3389 {
3390 LOG_WARNING("stlink_dap_op_queue_ap_abort()");
3391 return ERROR_OK;
3392 }
3393
3394 /** */
3395 static int stlink_dap_op_run(struct adiv5_dap *dap)
3396 {
3397 uint32_t ctrlstat, pwrmask;
3398 int retval, saved_retval;
3399
3400 /* Here no LOG_DEBUG. This is called continuously! */
3401
3402 /*
3403 * ST-Link returns immediately after a DAP write, without waiting for it
3404 * to complete.
3405 * Run a dummy read to DP_RDBUFF, as suggested in
3406 * http://infocenter.arm.com/help/topic/com.arm.doc.faqs/ka16363.html
3407 */
3408 if (dap->stlink_flush_ap_write) {
3409 dap->stlink_flush_ap_write = false;
3410 retval = stlink_dap_op_queue_dp_read(dap, DP_RDBUFF, NULL);
3411 if (retval != ERROR_OK) {
3412 dap->do_reconnect = true;
3413 return retval;
3414 }
3415 }
3416
3417 saved_retval = stlink_dap_get_and_clear_error();
3418
3419 retval = stlink_dap_op_queue_dp_read(dap, DP_CTRL_STAT, &ctrlstat);
3420 if (retval != ERROR_OK) {
3421 dap->do_reconnect = true;
3422 return retval;
3423 }
3424 retval = stlink_dap_get_and_clear_error();
3425 if (retval != ERROR_OK) {
3426 LOG_ERROR("Fail reading CTRL/STAT register. Force reconnect");
3427 dap->do_reconnect = true;
3428 return retval;
3429 }
3430
3431 if (ctrlstat & SSTICKYERR) {
3432 if (stlink_dap_param.transport == HL_TRANSPORT_JTAG)
3433 retval = stlink_dap_op_queue_dp_write(dap, DP_CTRL_STAT,
3434 ctrlstat & (dap->dp_ctrl_stat | SSTICKYERR));
3435 else
3436 retval = stlink_dap_op_queue_dp_write(dap, DP_ABORT, STKERRCLR);
3437 if (retval != ERROR_OK) {
3438 dap->do_reconnect = true;
3439 return retval;
3440 }
3441 retval = stlink_dap_get_and_clear_error();
3442 if (retval != ERROR_OK) {
3443 dap->do_reconnect = true;
3444 return retval;
3445 }
3446 }
3447
3448 /* check for power lost */
3449 pwrmask = dap->dp_ctrl_stat & (CDBGPWRUPREQ | CSYSPWRUPREQ);
3450 if ((ctrlstat & pwrmask) != pwrmask)
3451 dap->do_reconnect = true;
3452
3453 return saved_retval;
3454 }
3455
3456 /** */
3457 static void stlink_dap_op_quit(struct adiv5_dap *dap)
3458 {
3459 int retval;
3460
3461 retval = stlink_dap_closeall_ap();
3462 if (retval != ERROR_OK)
3463 LOG_ERROR("Error closing APs");
3464 }
3465
3466 static int stlink_dap_config_trace(bool enabled,
3467 enum tpiu_pin_protocol pin_protocol, uint32_t port_size,
3468 unsigned int *trace_freq, unsigned int traceclkin_freq,
3469 uint16_t *prescaler)
3470 {
3471 return stlink_config_trace(stlink_dap_handle, enabled, pin_protocol,
3472 port_size, trace_freq, traceclkin_freq,
3473 prescaler);
3474 }
3475
3476 static int stlink_dap_trace_read(uint8_t *buf, size_t *size)
3477 {
3478 return stlink_usb_trace_read(stlink_dap_handle, buf, size);
3479 }
3480
3481 /** */
3482 COMMAND_HANDLER(stlink_dap_serial_command)
3483 {
3484 LOG_DEBUG("stlink_dap_serial_command");
3485
3486 if (CMD_ARGC != 1) {
3487 LOG_ERROR("Expected exactly one argument for \"st-link serial <serial-number>\".");
3488 return ERROR_COMMAND_SYNTAX_ERROR;
3489 }
3490
3491 if (stlink_dap_param.serial) {
3492 LOG_WARNING("Command \"st-link serial\" already used. Replacing previous value");
3493 free((void *)stlink_dap_param.serial);
3494 }
3495
3496 stlink_dap_param.serial = strdup(CMD_ARGV[0]);
3497 return ERROR_OK;
3498 }
3499
3500 /** */
3501 COMMAND_HANDLER(stlink_dap_vid_pid)
3502 {
3503 unsigned int i, max_usb_ids = HLA_MAX_USB_IDS;
3504
3505 if (CMD_ARGC > max_usb_ids * 2) {
3506 LOG_WARNING("ignoring extra IDs in vid_pid "
3507 "(maximum is %d pairs)", max_usb_ids);
3508 CMD_ARGC = max_usb_ids * 2;
3509 }
3510 if (CMD_ARGC < 2 || (CMD_ARGC & 1)) {
3511 LOG_WARNING("incomplete vid_pid configuration directive");
3512 return ERROR_COMMAND_SYNTAX_ERROR;
3513 }
3514 for (i = 0; i < CMD_ARGC; i += 2) {
3515 COMMAND_PARSE_NUMBER(u16, CMD_ARGV[i], stlink_dap_param.vid[i / 2]);
3516 COMMAND_PARSE_NUMBER(u16, CMD_ARGV[i + 1], stlink_dap_param.pid[i / 2]);
3517 }
3518
3519 /* null termination */
3520 stlink_dap_param.vid[i / 2] = stlink_dap_param.pid[i / 2] = 0;
3521
3522 return ERROR_OK;
3523 }
3524
3525 /** */
3526 static const struct command_registration stlink_dap_subcommand_handlers[] = {
3527 {
3528 .name = "serial",
3529 .handler = stlink_dap_serial_command,
3530 .mode = COMMAND_CONFIG,
3531 .help = "set the serial number of the adapter",
3532 .usage = "<serial_number>",
3533 },
3534 {
3535 .name = "vid_pid",
3536 .handler = stlink_dap_vid_pid,
3537 .mode = COMMAND_CONFIG,
3538 .help = "USB VID and PID of the adapter",
3539 .usage = "(vid pid)+",
3540 },
3541 COMMAND_REGISTRATION_DONE
3542 };
3543
3544 /** */
3545 static const struct command_registration stlink_dap_command_handlers[] = {
3546 {
3547 .name = "st-link",
3548 .mode = COMMAND_ANY,
3549 .help = "perform st-link management",
3550 .chain = stlink_dap_subcommand_handlers,
3551 .usage = "",
3552 },
3553 COMMAND_REGISTRATION_DONE
3554 };
3555
3556 /** */
3557 static int stlink_dap_init(void)
3558 {
3559 enum reset_types jtag_reset_config = jtag_get_reset_config();
3560 int retval;
3561
3562 LOG_DEBUG("stlink_dap_init()");
3563
3564 if (jtag_reset_config & RESET_CNCT_UNDER_SRST) {
3565 if (jtag_reset_config & RESET_SRST_NO_GATING)
3566 stlink_dap_param.connect_under_reset = true;
3567 else
3568 LOG_WARNING("\'srst_nogate\' reset_config option is required");
3569 }
3570
3571 if (transport_is_dapdirect_swd())
3572 stlink_dap_param.transport = HL_TRANSPORT_SWD;
3573 else if (transport_is_dapdirect_jtag())
3574 stlink_dap_param.transport = HL_TRANSPORT_JTAG;
3575 else {
3576 LOG_ERROR("Unsupported transport");
3577 return ERROR_FAIL;
3578 }
3579
3580 retval = stlink_usb_open(&stlink_dap_param, (void **)&stlink_dap_handle);
3581 if (retval != ERROR_OK)
3582 return retval;
3583
3584 if (!(stlink_dap_handle->version.flags & STLINK_F_HAS_DAP_REG)) {
3585 LOG_ERROR("ST-Link version does not support DAP direct transport");
3586 return ERROR_FAIL;
3587 }
3588 return ERROR_OK;
3589 }
3590
3591 /** */
3592 static int stlink_dap_quit(void)
3593 {
3594 LOG_DEBUG("stlink_dap_quit()");
3595
3596 free((void *)stlink_dap_param.serial);
3597 stlink_dap_param.serial = NULL;
3598
3599 return stlink_usb_close(stlink_dap_handle);
3600 }
3601
3602 /** */
3603 static int stlink_dap_reset(int req_trst, int req_srst)
3604 {
3605 LOG_DEBUG("stlink_dap_reset(%d)", req_srst);
3606 return stlink_usb_assert_srst(stlink_dap_handle,
3607 req_srst ? STLINK_DEBUG_APIV2_DRIVE_NRST_LOW
3608 : STLINK_DEBUG_APIV2_DRIVE_NRST_HIGH);
3609 }
3610
3611 /** */
3612 static int stlink_dap_speed(int speed)
3613 {
3614 if (speed == 0) {
3615 LOG_ERROR("RTCK not supported. Set nonzero adapter_khz.");
3616 return ERROR_JTAG_NOT_IMPLEMENTED;
3617 }
3618
3619 stlink_dap_param.initial_interface_speed = speed;
3620 stlink_speed(stlink_dap_handle, speed, false);
3621 return ERROR_OK;
3622 }
3623
3624 /** */
3625 static int stlink_dap_khz(int khz, int *jtag_speed)
3626 {
3627 *jtag_speed = khz;
3628 return ERROR_OK;
3629 }
3630
3631 /** */
3632 static int stlink_dap_speed_div(int speed, int *khz)
3633 {
3634 *khz = speed;
3635 return ERROR_OK;
3636 }
3637
3638 static const struct dap_ops stlink_dap_ops = {
3639 .connect = stlink_dap_op_connect,
3640 .send_sequence = stlink_dap_op_send_sequence,
3641 .queue_dp_read = stlink_dap_op_queue_dp_read,
3642 .queue_dp_write = stlink_dap_op_queue_dp_write,
3643 .queue_ap_read = stlink_dap_op_queue_ap_read,
3644 .queue_ap_write = stlink_dap_op_queue_ap_write,
3645 .queue_ap_abort = stlink_dap_op_queue_ap_abort,
3646 .run = stlink_dap_op_run,
3647 .sync = NULL, /* optional */
3648 .quit = stlink_dap_op_quit, /* optional */
3649 };
3650
3651 static const char *const stlink_dap_transport[] = { "dapdirect_jtag", "dapdirect_swd", NULL };
3652
3653 struct adapter_driver stlink_dap_adapter_driver = {
3654 .name = "st-link",
3655 .transports = stlink_dap_transport,
3656 .commands = stlink_dap_command_handlers,
3657
3658 .init = stlink_dap_init,
3659 .quit = stlink_dap_quit,
3660 .reset = stlink_dap_reset,
3661 .speed = stlink_dap_speed,
3662 .khz = stlink_dap_khz,
3663 .speed_div = stlink_dap_speed_div,
3664 .config_trace = stlink_dap_config_trace,
3665 .poll_trace = stlink_dap_trace_read,
3666
3667 .dap_jtag_ops = &stlink_dap_ops,
3668 .dap_swd_ops = &stlink_dap_ops,
3669 };
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