ZY1000 help/usage fixups
[openocd.git] / src / jtag / zy1000 / zy1000.c
1 /***************************************************************************
2 * Copyright (C) 2007-2009 by Øyvind Harboe *
3 * *
4 * This program is free software; you can redistribute it and/or modify *
5 * it under the terms of the GNU General Public License as published by *
6 * the Free Software Foundation; either version 2 of the License, or *
7 * (at your option) any later version. *
8 * *
9 * This program is distributed in the hope that it will be useful, *
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
12 * GNU General Public License for more details. *
13 * *
14 * You should have received a copy of the GNU General Public License *
15 * along with this program; if not, write to the *
16 * Free Software Foundation, Inc., *
17 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
18 ***************************************************************************/
19
20 /* This file supports the zy1000 debugger: http://www.zylin.com/zy1000.html
21 *
22 * The zy1000 is a standalone debugger that has a web interface and
23 * requires no drivers on the developer host as all communication
24 * is via TCP/IP. The zy1000 gets it performance(~400-700kBytes/s
25 * DCC downloads @ 16MHz target) as it has an FPGA to hardware
26 * accelerate the JTAG commands, while offering *very* low latency
27 * between OpenOCD and the FPGA registers.
28 *
29 * The disadvantage of the zy1000 is that it has a feeble CPU compared to
30 * a PC(ca. 50-500 DMIPS depending on how one counts it), whereas a PC
31 * is on the order of 10000 DMIPS(i.e. at a factor of 20-200).
32 *
33 * The zy1000 revc hardware is using an Altera Nios CPU, whereas the
34 * revb is using ARM7 + Xilinx.
35 *
36 * See Zylin web pages or contact Zylin for more information.
37 *
38 * The reason this code is in OpenOCD rather than OpenOCD linked with the
39 * ZY1000 code is that OpenOCD is the long road towards getting
40 * libopenocd into place. libopenocd will support both low performance,
41 * low latency systems(embedded) and high performance high latency
42 * systems(PCs).
43 */
44 #ifdef HAVE_CONFIG_H
45 #include "config.h"
46 #endif
47
48 #include <target/embeddedice.h>
49 #include <jtag/minidriver.h>
50 #include <jtag/interface.h>
51 #include "zy1000_version.h"
52
53 #include <cyg/hal/hal_io.h> // low level i/o
54 #include <cyg/hal/hal_diag.h>
55
56 #include <time.h>
57
58 #ifdef CYGPKG_HAL_NIOS2
59 #include <cyg/hal/io.h>
60 #include <cyg/firmwareutil/firmwareutil.h>
61 #endif
62
63 #define ZYLIN_VERSION GIT_ZY1000_VERSION
64 #define ZYLIN_DATE __DATE__
65 #define ZYLIN_TIME __TIME__
66 #define ZYLIN_OPENOCD GIT_OPENOCD_VERSION
67 #define ZYLIN_OPENOCD_VERSION "ZY1000 " ZYLIN_VERSION " " ZYLIN_DATE
68
69
70 static int zy1000_khz(int khz, int *jtag_speed)
71 {
72 if (khz == 0)
73 {
74 *jtag_speed = 0;
75 }
76 else
77 {
78 *jtag_speed = 64000/khz;
79 }
80 return ERROR_OK;
81 }
82
83 static int zy1000_speed_div(int speed, int *khz)
84 {
85 if (speed == 0)
86 {
87 *khz = 0;
88 }
89 else
90 {
91 *khz = 64000/speed;
92 }
93
94 return ERROR_OK;
95 }
96
97 static bool readPowerDropout(void)
98 {
99 cyg_uint32 state;
100 // sample and clear power dropout
101 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x80);
102 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
103 bool powerDropout;
104 powerDropout = (state & 0x80) != 0;
105 return powerDropout;
106 }
107
108
109 static bool readSRST(void)
110 {
111 cyg_uint32 state;
112 // sample and clear SRST sensing
113 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000040);
114 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
115 bool srstAsserted;
116 srstAsserted = (state & 0x40) != 0;
117 return srstAsserted;
118 }
119
120 static int zy1000_srst_asserted(int *srst_asserted)
121 {
122 *srst_asserted = readSRST();
123 return ERROR_OK;
124 }
125
126 static int zy1000_power_dropout(int *dropout)
127 {
128 *dropout = readPowerDropout();
129 return ERROR_OK;
130 }
131
132 void zy1000_reset(int trst, int srst)
133 {
134 LOG_DEBUG("zy1000 trst=%d, srst=%d", trst, srst);
135 if (!srst)
136 {
137 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000001);
138 }
139 else
140 {
141 /* Danger!!! if clk != 0 when in
142 * idle in TAP_IDLE, reset halt on str912 will fail.
143 */
144 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000001);
145 }
146
147 if (!trst)
148 {
149 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000002);
150 }
151 else
152 {
153 /* assert reset */
154 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000002);
155 }
156
157 if (trst||(srst && (jtag_get_reset_config() & RESET_SRST_PULLS_TRST)))
158 {
159 waitIdle();
160 /* we're now in the RESET state until trst is deasserted */
161 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_RESET);
162 } else
163 {
164 /* We'll get RCLK failure when we assert TRST, so clear any false positives here */
165 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
166 }
167
168 /* wait for srst to float back up */
169 if (!srst)
170 {
171 int i;
172 for (i = 0; i < 1000; i++)
173 {
174 // We don't want to sense our own reset, so we clear here.
175 // There is of course a timing hole where we could loose
176 // a "real" reset.
177 if (!readSRST())
178 break;
179
180 /* wait 1ms */
181 alive_sleep(1);
182 }
183
184 if (i == 1000)
185 {
186 LOG_USER("SRST didn't deassert after %dms", i);
187 } else if (i > 1)
188 {
189 LOG_USER("SRST took %dms to deassert", i);
190 }
191 }
192 }
193
194 int zy1000_speed(int speed)
195 {
196 if (speed == 0)
197 {
198 /*0 means RCLK*/
199 speed = 0;
200 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x100);
201 LOG_DEBUG("jtag_speed using RCLK");
202 }
203 else
204 {
205 if (speed > 8190 || speed < 2)
206 {
207 LOG_USER("valid ZY1000 jtag_speed=[8190,2]. Divisor is 64MHz / even values between 8190-2, i.e. min 7814Hz, max 32MHz");
208 return ERROR_INVALID_ARGUMENTS;
209 }
210
211 LOG_USER("jtag_speed %d => JTAG clk=%f", speed, 64.0/(float)speed);
212 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x100);
213 ZY1000_POKE(ZY1000_JTAG_BASE + 0x1c, speed&~1);
214 }
215 return ERROR_OK;
216 }
217
218 static bool savePower;
219
220
221 static void setPower(bool power)
222 {
223 savePower = power;
224 if (power)
225 {
226 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x8);
227 } else
228 {
229 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x8);
230 }
231 }
232
233 COMMAND_HANDLER(handle_power_command)
234 {
235 switch (CMD_ARGC)
236 {
237 case 1: {
238 bool enable;
239 COMMAND_PARSE_ON_OFF(CMD_ARGV[0], enable);
240 setPower(enable);
241 // fall through
242 }
243 case 0:
244 LOG_INFO("Target power %s", savePower ? "on" : "off");
245 break;
246 default:
247 return ERROR_INVALID_ARGUMENTS;
248 }
249
250 return ERROR_OK;
251 }
252
253
254 /* Give TELNET a way to find out what version this is */
255 static int jim_zy1000_version(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
256 {
257 if ((argc < 1) || (argc > 3))
258 return JIM_ERR;
259 const char *version_str = NULL;
260
261 if (argc == 1)
262 {
263 version_str = ZYLIN_OPENOCD_VERSION;
264 } else
265 {
266 const char *str = Jim_GetString(argv[1], NULL);
267 const char *str2 = NULL;
268 if (argc > 2)
269 str2 = Jim_GetString(argv[2], NULL);
270 if (strcmp("openocd", str) == 0)
271 {
272 version_str = ZYLIN_OPENOCD;
273 }
274 else if (strcmp("zy1000", str) == 0)
275 {
276 version_str = ZYLIN_VERSION;
277 }
278 else if (strcmp("date", str) == 0)
279 {
280 version_str = ZYLIN_DATE;
281 }
282 else if (strcmp("time", str) == 0)
283 {
284 version_str = ZYLIN_TIME;
285 }
286 else if (strcmp("pcb", str) == 0)
287 {
288 #ifdef CYGPKG_HAL_NIOS2
289 version_str="c";
290 #else
291 version_str="b";
292 #endif
293 }
294 #ifdef CYGPKG_HAL_NIOS2
295 else if (strcmp("fpga", str) == 0)
296 {
297
298 /* return a list of 32 bit integers to describe the expected
299 * and actual FPGA
300 */
301 static char *fpga_id = "0x12345678 0x12345678 0x12345678 0x12345678";
302 cyg_uint32 id, timestamp;
303 HAL_READ_UINT32(SYSID_BASE, id);
304 HAL_READ_UINT32(SYSID_BASE+4, timestamp);
305 sprintf(fpga_id, "0x%08x 0x%08x 0x%08x 0x%08x", id, timestamp, SYSID_ID, SYSID_TIMESTAMP);
306 version_str = fpga_id;
307 if ((argc>2) && (strcmp("time", str2) == 0))
308 {
309 time_t last_mod = timestamp;
310 char * t = ctime (&last_mod) ;
311 t[strlen(t)-1] = 0;
312 version_str = t;
313 }
314 }
315 #endif
316
317 else
318 {
319 return JIM_ERR;
320 }
321 }
322
323 Jim_SetResult(interp, Jim_NewStringObj(interp, version_str, -1));
324
325 return JIM_OK;
326 }
327
328
329 #ifdef CYGPKG_HAL_NIOS2
330
331
332 struct info_forward
333 {
334 void *data;
335 struct cyg_upgrade_info *upgraded_file;
336 };
337
338 static void report_info(void *data, const char * format, va_list args)
339 {
340 char *s = alloc_vprintf(format, args);
341 LOG_USER_N("%s", s);
342 free(s);
343 }
344
345 struct cyg_upgrade_info firmware_info =
346 {
347 (cyg_uint8 *)0x84000000,
348 "/ram/firmware.phi",
349 "Firmware",
350 0x0300000,
351 0x1f00000 -
352 0x0300000,
353 "ZylinNiosFirmware\n",
354 report_info,
355 };
356
357 static int jim_zy1000_writefirmware(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
358 {
359 if (argc != 2)
360 return JIM_ERR;
361
362 int length;
363 const char *str = Jim_GetString(argv[1], &length);
364
365 /* */
366 int tmpFile;
367 if ((tmpFile = open(firmware_info.file, O_RDWR | O_CREAT | O_TRUNC)) <= 0)
368 {
369 return JIM_ERR;
370 }
371 bool success;
372 success = write(tmpFile, str, length) == length;
373 close(tmpFile);
374 if (!success)
375 return JIM_ERR;
376
377 if (!cyg_firmware_upgrade(NULL, firmware_info))
378 return JIM_ERR;
379
380 return JIM_OK;
381 }
382 #endif
383
384 static int
385 zylinjtag_Jim_Command_powerstatus(Jim_Interp *interp,
386 int argc,
387 Jim_Obj * const *argv)
388 {
389 if (argc != 1)
390 {
391 Jim_WrongNumArgs(interp, 1, argv, "powerstatus");
392 return JIM_ERR;
393 }
394
395 cyg_uint32 status;
396 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, status);
397
398 Jim_SetResult(interp, Jim_NewIntObj(interp, (status&0x80) != 0));
399
400 return JIM_OK;
401 }
402
403
404
405
406 int zy1000_init(void)
407 {
408 LOG_USER("%s", ZYLIN_OPENOCD_VERSION);
409
410 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x30); // Turn on LED1 & LED2
411
412 setPower(true); // on by default
413
414
415 /* deassert resets. Important to avoid infinite loop waiting for SRST to deassert */
416 zy1000_reset(0, 0);
417 zy1000_speed(jtag_get_speed());
418
419 return ERROR_OK;
420 }
421
422 int zy1000_quit(void)
423 {
424
425 return ERROR_OK;
426 }
427
428
429
430 int interface_jtag_execute_queue(void)
431 {
432 cyg_uint32 empty;
433
434 waitIdle();
435 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, empty);
436 /* clear JTAG error register */
437 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
438
439 if ((empty&0x400) != 0)
440 {
441 LOG_WARNING("RCLK timeout");
442 /* the error is informative only as we don't want to break the firmware if there
443 * is a false positive.
444 */
445 // return ERROR_FAIL;
446 }
447 return ERROR_OK;
448 }
449
450
451
452
453
454 static cyg_uint32 getShiftValue(void)
455 {
456 cyg_uint32 value;
457 waitIdle();
458 ZY1000_PEEK(ZY1000_JTAG_BASE + 0xc, value);
459 VERBOSE(LOG_INFO("getShiftValue %08x", value));
460 return value;
461 }
462 #if 0
463 static cyg_uint32 getShiftValueFlip(void)
464 {
465 cyg_uint32 value;
466 waitIdle();
467 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x18, value);
468 VERBOSE(LOG_INFO("getShiftValue %08x (flipped)", value));
469 return value;
470 }
471 #endif
472
473 #if 0
474 static void shiftValueInnerFlip(const tap_state_t state, const tap_state_t endState, int repeat, cyg_uint32 value)
475 {
476 VERBOSE(LOG_INFO("shiftValueInner %s %s %d %08x (flipped)", tap_state_name(state), tap_state_name(endState), repeat, value));
477 cyg_uint32 a,b;
478 a = state;
479 b = endState;
480 ZY1000_POKE(ZY1000_JTAG_BASE + 0xc, value);
481 ZY1000_POKE(ZY1000_JTAG_BASE + 0x8, (1 << 15) | (repeat << 8) | (a << 4) | b);
482 VERBOSE(getShiftValueFlip());
483 }
484 #endif
485
486 static void gotoEndState(tap_state_t end_state)
487 {
488 setCurrentState(end_state);
489 }
490
491 static __inline void scanFields(int num_fields, const struct scan_field *fields, tap_state_t shiftState, int pause)
492 {
493 int i;
494 int j;
495 int k;
496
497 for (i = 0; i < num_fields; i++)
498 {
499 cyg_uint32 value;
500
501 uint8_t *inBuffer = NULL;
502
503
504 // figure out where to store the input data
505 int num_bits = fields[i].num_bits;
506 if (fields[i].in_value != NULL)
507 {
508 inBuffer = fields[i].in_value;
509 }
510
511 // here we shuffle N bits out/in
512 j = 0;
513 while (j < num_bits)
514 {
515 tap_state_t pause_state;
516 int l;
517 k = num_bits-j;
518 pause_state = (shiftState == TAP_DRSHIFT)?TAP_DRSHIFT:TAP_IRSHIFT;
519 if (k > 32)
520 {
521 k = 32;
522 /* we have more to shift out */
523 } else if (pause&&(i == num_fields-1))
524 {
525 /* this was the last to shift out this time */
526 pause_state = (shiftState==TAP_DRSHIFT)?TAP_DRPAUSE:TAP_IRPAUSE;
527 }
528
529 // we have (num_bits + 7)/8 bytes of bits to toggle out.
530 // bits are pushed out LSB to MSB
531 value = 0;
532 if (fields[i].out_value != NULL)
533 {
534 for (l = 0; l < k; l += 8)
535 {
536 value|=fields[i].out_value[(j + l)/8]<<l;
537 }
538 }
539 /* mask away unused bits for easier debugging */
540 if (k < 32)
541 {
542 value&=~(((uint32_t)0xffffffff) << k);
543 } else
544 {
545 /* Shifting by >= 32 is not defined by the C standard
546 * and will in fact shift by &0x1f bits on nios */
547 }
548
549 shiftValueInner(shiftState, pause_state, k, value);
550
551 if (inBuffer != NULL)
552 {
553 // data in, LSB to MSB
554 value = getShiftValue();
555 // we're shifting in data to MSB, shift data to be aligned for returning the value
556 value >>= 32-k;
557
558 for (l = 0; l < k; l += 8)
559 {
560 inBuffer[(j + l)/8]=(value >> l)&0xff;
561 }
562 }
563 j += k;
564 }
565 }
566 }
567
568 int interface_jtag_add_ir_scan(int num_fields, const struct scan_field *fields, tap_state_t state)
569 {
570
571 int j;
572 int scan_size = 0;
573 struct jtag_tap *tap, *nextTap;
574 for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
575 {
576 nextTap = jtag_tap_next_enabled(tap);
577 int pause = (nextTap==NULL);
578
579 int found = 0;
580
581 scan_size = tap->ir_length;
582
583 /* search the list */
584 for (j = 0; j < num_fields; j++)
585 {
586 if (tap == fields[j].tap)
587 {
588 found = 1;
589
590 scanFields(1, fields + j, TAP_IRSHIFT, pause);
591 /* update device information */
592 buf_cpy(fields[j].out_value, tap->cur_instr, scan_size);
593
594 tap->bypass = 0;
595 break;
596 }
597 }
598
599 if (!found)
600 {
601 /* if a device isn't listed, set it to BYPASS */
602 uint8_t ones[]={0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff};
603
604 struct scan_field tmp;
605 memset(&tmp, 0, sizeof(tmp));
606 tmp.out_value = ones;
607 tmp.num_bits = scan_size;
608 scanFields(1, &tmp, TAP_IRSHIFT, pause);
609 /* update device information */
610 buf_cpy(tmp.out_value, tap->cur_instr, scan_size);
611 tap->bypass = 1;
612 }
613 }
614 gotoEndState(state);
615
616 return ERROR_OK;
617 }
618
619
620
621
622
623 int interface_jtag_add_plain_ir_scan(int num_fields, const struct scan_field *fields, tap_state_t state)
624 {
625 scanFields(num_fields, fields, TAP_IRSHIFT, 1);
626 gotoEndState(state);
627
628 return ERROR_OK;
629 }
630
631 int interface_jtag_add_dr_scan(int num_fields, const struct scan_field *fields, tap_state_t state)
632 {
633
634 int j;
635 struct jtag_tap *tap, *nextTap;
636 for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
637 {
638 nextTap = jtag_tap_next_enabled(tap);
639 int found = 0;
640 int pause = (nextTap==NULL);
641
642 for (j = 0; j < num_fields; j++)
643 {
644 if (tap == fields[j].tap)
645 {
646 found = 1;
647
648 scanFields(1, fields+j, TAP_DRSHIFT, pause);
649 }
650 }
651 if (!found)
652 {
653 struct scan_field tmp;
654 /* program the scan field to 1 bit length, and ignore it's value */
655 tmp.num_bits = 1;
656 tmp.out_value = NULL;
657 tmp.in_value = NULL;
658
659 scanFields(1, &tmp, TAP_DRSHIFT, pause);
660 }
661 else
662 {
663 }
664 }
665 gotoEndState(state);
666 return ERROR_OK;
667 }
668
669 int interface_jtag_add_plain_dr_scan(int num_fields, const struct scan_field *fields, tap_state_t state)
670 {
671 scanFields(num_fields, fields, TAP_DRSHIFT, 1);
672 gotoEndState(state);
673 return ERROR_OK;
674 }
675
676
677 int interface_jtag_add_tlr()
678 {
679 setCurrentState(TAP_RESET);
680 return ERROR_OK;
681 }
682
683
684
685
686 int interface_jtag_add_reset(int req_trst, int req_srst)
687 {
688 zy1000_reset(req_trst, req_srst);
689 return ERROR_OK;
690 }
691
692 static int zy1000_jtag_add_clocks(int num_cycles, tap_state_t state, tap_state_t clockstate)
693 {
694 /* num_cycles can be 0 */
695 setCurrentState(clockstate);
696
697 /* execute num_cycles, 32 at the time. */
698 int i;
699 for (i = 0; i < num_cycles; i += 32)
700 {
701 int num;
702 num = 32;
703 if (num_cycles-i < num)
704 {
705 num = num_cycles-i;
706 }
707 shiftValueInner(clockstate, clockstate, num, 0);
708 }
709
710 #if !TEST_MANUAL()
711 /* finish in end_state */
712 setCurrentState(state);
713 #else
714 tap_state_t t = TAP_IDLE;
715 /* test manual drive code on any target */
716 int tms;
717 uint8_t tms_scan = tap_get_tms_path(t, state);
718 int tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
719
720 for (i = 0; i < tms_count; i++)
721 {
722 tms = (tms_scan >> i) & 1;
723 waitIdle();
724 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
725 }
726 waitIdle();
727 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
728 #endif
729
730
731 return ERROR_OK;
732 }
733
734 int interface_jtag_add_runtest(int num_cycles, tap_state_t state)
735 {
736 return zy1000_jtag_add_clocks(num_cycles, state, TAP_IDLE);
737 }
738
739 int interface_jtag_add_clocks(int num_cycles)
740 {
741 return zy1000_jtag_add_clocks(num_cycles, cmd_queue_cur_state, cmd_queue_cur_state);
742 }
743
744 int interface_jtag_add_sleep(uint32_t us)
745 {
746 jtag_sleep(us);
747 return ERROR_OK;
748 }
749
750 int interface_jtag_add_pathmove(int num_states, const tap_state_t *path)
751 {
752 int state_count;
753 int tms = 0;
754
755 /*wait for the fifo to be empty*/
756 waitIdle();
757
758 state_count = 0;
759
760 tap_state_t cur_state = cmd_queue_cur_state;
761
762 while (num_states)
763 {
764 if (tap_state_transition(cur_state, false) == path[state_count])
765 {
766 tms = 0;
767 }
768 else if (tap_state_transition(cur_state, true) == path[state_count])
769 {
770 tms = 1;
771 }
772 else
773 {
774 LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_name(cur_state), tap_state_name(path[state_count]));
775 exit(-1);
776 }
777
778 waitIdle();
779 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
780
781 cur_state = path[state_count];
782 state_count++;
783 num_states--;
784 }
785
786 waitIdle();
787 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, cur_state);
788 return ERROR_OK;
789 }
790
791
792
793 void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, uint8_t *buffer, int little, int count)
794 {
795 // static int const reg_addr = 0x5;
796 tap_state_t end_state = jtag_get_end_state();
797 if (jtag_tap_next_enabled(jtag_tap_next_enabled(NULL)) == NULL)
798 {
799 /* better performance via code duplication */
800 if (little)
801 {
802 int i;
803 for (i = 0; i < count; i++)
804 {
805 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, 1));
806 shiftValueInner(TAP_DRSHIFT, end_state, 6, reg_addr | (1 << 5));
807 buffer += 4;
808 }
809 } else
810 {
811 int i;
812 for (i = 0; i < count; i++)
813 {
814 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, 0));
815 shiftValueInner(TAP_DRSHIFT, end_state, 6, reg_addr | (1 << 5));
816 buffer += 4;
817 }
818 }
819 }
820 else
821 {
822 int i;
823 for (i = 0; i < count; i++)
824 {
825 embeddedice_write_reg_inner(tap, reg_addr, fast_target_buffer_get_u32(buffer, little));
826 buffer += 4;
827 }
828 }
829 }
830
831
832 static const struct command_registration zy1000_commands[] = {
833 {
834 .name = "power",
835 .handler = handle_power_command,
836 .mode = COMMAND_ANY,
837 .help = "Turn power switch to target on/off. "
838 "With no arguments, prints status.",
839 .usage = "('on'|'off)",
840 },
841 {
842 .name = "zy1000_version",
843 .mode = COMMAND_ANY,
844 .jim_handler = jim_zy1000_version,
845 .help = "Print version info for zy1000.",
846 .usage = "['openocd'|'zy1000'|'date'|'time'|'pcb'|'fpga']",
847 },
848 {
849 .name = "powerstatus",
850 .mode = COMMAND_ANY,
851 .jim_handler = zylinjtag_Jim_Command_powerstatus,
852 .help = "Returns power status of target",
853 },
854 #ifdef CYGPKG_HAL_NIOS2
855 {
856 .name = "updatezy1000firmware",
857 .mode = COMMAND_ANY,
858 .jim_handler = jim_zy1000_writefirmware,
859 .help = "writes firmware to flash",
860 /* .usage = "some_string", */
861 },
862 #endif
863 COMMAND_REGISTRATION_DONE
864 };
865
866
867
868 struct jtag_interface zy1000_interface =
869 {
870 .name = "ZY1000",
871 .execute_queue = NULL,
872 .speed = zy1000_speed,
873 .commands = zy1000_commands,
874 .init = zy1000_init,
875 .quit = zy1000_quit,
876 .khz = zy1000_khz,
877 .speed_div = zy1000_speed_div,
878 .power_dropout = zy1000_power_dropout,
879 .srst_asserted = zy1000_srst_asserted,
880 };
881

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