1 /***************************************************************************
2 * Copyright (C) 2007-2010 by Øyvind Harboe *
4 * This program is free software; you can redistribute it and/or modify *
5 * it under the terms of the GNU General Public License as published by *
6 * the Free Software Foundation; either version 2 of the License, or *
7 * (at your option) any later version. *
9 * This program is distributed in the hope that it will be useful, *
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
12 * GNU General Public License for more details. *
14 * You should have received a copy of the GNU General Public License *
15 * along with this program; if not, write to the *
16 * Free Software Foundation, Inc., *
17 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
18 ***************************************************************************/
20 /* This file supports the zy1000 debugger: http://www.zylin.com/zy1000.html
22 * The zy1000 is a standalone debugger that has a web interface and
23 * requires no drivers on the developer host as all communication
24 * is via TCP/IP. The zy1000 gets it performance(~400-700kBytes/s
25 * DCC downloads @ 16MHz target) as it has an FPGA to hardware
26 * accelerate the JTAG commands, while offering *very* low latency
27 * between OpenOCD and the FPGA registers.
29 * The disadvantage of the zy1000 is that it has a feeble CPU compared to
30 * a PC(ca. 50-500 DMIPS depending on how one counts it), whereas a PC
31 * is on the order of 10000 DMIPS(i.e. at a factor of 20-200).
33 * The zy1000 revc hardware is using an Altera Nios CPU, whereas the
34 * revb is using ARM7 + Xilinx.
36 * See Zylin web pages or contact Zylin for more information.
38 * The reason this code is in OpenOCD rather than OpenOCD linked with the
39 * ZY1000 code is that OpenOCD is the long road towards getting
40 * libopenocd into place. libopenocd will support both low performance,
41 * low latency systems(embedded) and high performance high latency
48 #include <target/embeddedice.h>
49 #include <jtag/minidriver.h>
50 #include <jtag/interface.h>
52 #include <helper/time_support.h>
54 #include <netinet/tcp.h>
57 #include "zy1000_version.h"
59 #include <cyg/hal/hal_io.h> // low level i/o
60 #include <cyg/hal/hal_diag.h>
62 #ifdef CYGPKG_HAL_NIOS2
63 #include <cyg/hal/io.h>
64 #include <cyg/firmwareutil/firmwareutil.h>
67 #define ZYLIN_VERSION GIT_ZY1000_VERSION
68 #define ZYLIN_DATE __DATE__
69 #define ZYLIN_TIME __TIME__
70 #define ZYLIN_OPENOCD GIT_OPENOCD_VERSION
71 #define ZYLIN_OPENOCD_VERSION "ZY1000 " ZYLIN_VERSION " " ZYLIN_DATE
76 /* The software needs to check if it's in RCLK mode or not */
77 static bool zy1000_rclk
= false;
79 static int zy1000_khz(int khz
, int *jtag_speed
)
87 *jtag_speed
= 64000/khz
;
92 static int zy1000_speed_div(int speed
, int *khz
)
106 static bool readPowerDropout(void)
109 // sample and clear power dropout
110 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x80);
111 ZY1000_PEEK(ZY1000_JTAG_BASE
+ 0x10, state
);
113 powerDropout
= (state
& 0x80) != 0;
118 static bool readSRST(void)
121 // sample and clear SRST sensing
122 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x00000040);
123 ZY1000_PEEK(ZY1000_JTAG_BASE
+ 0x10, state
);
125 srstAsserted
= (state
& 0x40) != 0;
129 static int zy1000_srst_asserted(int *srst_asserted
)
131 *srst_asserted
= readSRST();
135 static int zy1000_power_dropout(int *dropout
)
137 *dropout
= readPowerDropout();
141 void zy1000_reset(int trst
, int srst
)
143 LOG_DEBUG("zy1000 trst=%d, srst=%d", trst
, srst
);
145 /* flush the JTAG FIFO. Not flushing the queue before messing with
146 * reset has such interesting bugs as causing hard to reproduce
147 * RCLK bugs as RCLK will stop responding when TRST is asserted
153 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x14, 0x00000001);
157 /* Danger!!! if clk != 0 when in
158 * idle in TAP_IDLE, reset halt on str912 will fail.
160 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x00000001);
165 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x14, 0x00000002);
170 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x00000002);
173 if (trst
||(srst
&& (jtag_get_reset_config() & RESET_SRST_PULLS_TRST
)))
175 /* we're now in the RESET state until trst is deasserted */
176 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x20, TAP_RESET
);
179 /* We'll get RCLK failure when we assert TRST, so clear any false positives here */
180 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x14, 0x400);
183 /* wait for srst to float back up */
184 if ((!srst
&& ((jtag_get_reset_config() & RESET_TRST_PULLS_SRST
) == 0))||
185 (!srst
&& !trst
&& (jtag_get_reset_config() & RESET_TRST_PULLS_SRST
)))
192 // We don't want to sense our own reset, so we clear here.
193 // There is of course a timing hole where we could loose
199 LOG_USER("SRST took %dms to deassert", (int)total
);
207 start
= timeval_ms();
210 total
= timeval_ms() - start
;
216 LOG_ERROR("SRST took too long to deassert: %dms", (int)total
);
224 int zy1000_speed(int speed
)
226 /* flush JTAG master FIFO before setting speed */
234 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x100);
236 LOG_DEBUG("jtag_speed using RCLK");
240 if (speed
> 8190 || speed
< 2)
242 LOG_USER("valid ZY1000 jtag_speed=[8190,2]. Divisor is 64MHz / even values between 8190-2, i.e. min 7814Hz, max 32MHz");
243 return ERROR_INVALID_ARGUMENTS
;
246 LOG_USER("jtag_speed %d => JTAG clk=%f", speed
, 64.0/(float)speed
);
247 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x14, 0x100);
248 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x1c, speed
&~1);
253 static bool savePower
;
256 static void setPower(bool power
)
261 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x14, 0x8);
264 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x8);
268 COMMAND_HANDLER(handle_power_command
)
274 COMMAND_PARSE_ON_OFF(CMD_ARGV
[0], enable
);
279 LOG_INFO("Target power %s", savePower
? "on" : "off");
282 return ERROR_INVALID_ARGUMENTS
;
289 static char *tcp_server
= "notspecified";
290 static int jim_zy1000_server(Jim_Interp
*interp
, int argc
, Jim_Obj
*const *argv
)
295 tcp_server
= strdup(Jim_GetString(argv
[1], NULL
));
302 /* Give TELNET a way to find out what version this is */
303 static int jim_zy1000_version(Jim_Interp
*interp
, int argc
, Jim_Obj
*const *argv
)
305 if ((argc
< 1) || (argc
> 3))
307 const char *version_str
= NULL
;
311 version_str
= ZYLIN_OPENOCD_VERSION
;
314 const char *str
= Jim_GetString(argv
[1], NULL
);
315 const char *str2
= NULL
;
317 str2
= Jim_GetString(argv
[2], NULL
);
318 if (strcmp("openocd", str
) == 0)
320 version_str
= ZYLIN_OPENOCD
;
322 else if (strcmp("zy1000", str
) == 0)
324 version_str
= ZYLIN_VERSION
;
326 else if (strcmp("date", str
) == 0)
328 version_str
= ZYLIN_DATE
;
330 else if (strcmp("time", str
) == 0)
332 version_str
= ZYLIN_TIME
;
334 else if (strcmp("pcb", str
) == 0)
336 #ifdef CYGPKG_HAL_NIOS2
342 #ifdef CYGPKG_HAL_NIOS2
343 else if (strcmp("fpga", str
) == 0)
346 /* return a list of 32 bit integers to describe the expected
349 static char *fpga_id
= "0x12345678 0x12345678 0x12345678 0x12345678";
350 uint32_t id
, timestamp
;
351 HAL_READ_UINT32(SYSID_BASE
, id
);
352 HAL_READ_UINT32(SYSID_BASE
+4, timestamp
);
353 sprintf(fpga_id
, "0x%08x 0x%08x 0x%08x 0x%08x", id
, timestamp
, SYSID_ID
, SYSID_TIMESTAMP
);
354 version_str
= fpga_id
;
355 if ((argc
>2) && (strcmp("time", str2
) == 0))
357 time_t last_mod
= timestamp
;
358 char * t
= ctime (&last_mod
) ;
371 Jim_SetResult(interp
, Jim_NewStringObj(interp
, version_str
, -1));
377 #ifdef CYGPKG_HAL_NIOS2
383 struct cyg_upgrade_info
*upgraded_file
;
386 static void report_info(void *data
, const char * format
, va_list args
)
388 char *s
= alloc_vprintf(format
, args
);
393 struct cyg_upgrade_info firmware_info
=
395 (uint8_t *)0x84000000,
401 "ZylinNiosFirmware\n",
405 static int jim_zy1000_writefirmware(Jim_Interp
*interp
, int argc
, Jim_Obj
*const *argv
)
411 const char *str
= Jim_GetString(argv
[1], &length
);
415 if ((tmpFile
= open(firmware_info
.file
, O_RDWR
| O_CREAT
| O_TRUNC
)) <= 0)
420 success
= write(tmpFile
, str
, length
) == length
;
425 if (!cyg_firmware_upgrade(NULL
, firmware_info
))
433 zylinjtag_Jim_Command_powerstatus(Jim_Interp
*interp
,
435 Jim_Obj
* const *argv
)
439 Jim_WrongNumArgs(interp
, 1, argv
, "powerstatus");
443 bool dropout
= readPowerDropout();
445 Jim_SetResult(interp
, Jim_NewIntObj(interp
, dropout
));
452 int zy1000_quit(void)
460 int interface_jtag_execute_queue(void)
468 /* Only check for errors when using RCLK to speed up
471 ZY1000_PEEK(ZY1000_JTAG_BASE
+ 0x10, empty
);
472 /* clear JTAG error register */
473 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x14, 0x400);
475 if ((empty
&0x400) != 0)
477 LOG_WARNING("RCLK timeout");
478 /* the error is informative only as we don't want to break the firmware if there
479 * is a false positive.
481 // return ERROR_FAIL;
491 static uint32_t getShiftValue(void)
495 ZY1000_PEEK(ZY1000_JTAG_BASE
+ 0xc, value
);
496 VERBOSE(LOG_INFO("getShiftValue %08x", value
));
500 static uint32_t getShiftValueFlip(void)
504 ZY1000_PEEK(ZY1000_JTAG_BASE
+ 0x18, value
);
505 VERBOSE(LOG_INFO("getShiftValue %08x (flipped)", value
));
511 static void shiftValueInnerFlip(const tap_state_t state
, const tap_state_t endState
, int repeat
, uint32_t value
)
513 VERBOSE(LOG_INFO("shiftValueInner %s %s %d %08x (flipped)", tap_state_name(state
), tap_state_name(endState
), repeat
, value
));
517 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0xc, value
);
518 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x8, (1 << 15) | (repeat
<< 8) | (a
<< 4) | b
);
519 VERBOSE(getShiftValueFlip());
523 // here we shuffle N bits out/in
524 static __inline
void scanBits(const uint8_t *out_value
, uint8_t *in_value
, int num_bits
, bool pause_now
, tap_state_t shiftState
, tap_state_t end_state
)
526 tap_state_t pause_state
= shiftState
;
527 for (int j
= 0; j
< num_bits
; j
+= 32)
529 int k
= num_bits
- j
;
533 /* we have more to shift out */
534 } else if (pause_now
)
536 /* this was the last to shift out this time */
537 pause_state
= end_state
;
540 // we have (num_bits + 7)/8 bytes of bits to toggle out.
541 // bits are pushed out LSB to MSB
544 if (out_value
!= NULL
)
546 for (int l
= 0; l
< k
; l
+= 8)
548 value
|=out_value
[(j
+ l
)/8]<<l
;
551 /* mask away unused bits for easier debugging */
554 value
&=~(((uint32_t)0xffffffff) << k
);
557 /* Shifting by >= 32 is not defined by the C standard
558 * and will in fact shift by &0x1f bits on nios */
561 shiftValueInner(shiftState
, pause_state
, k
, value
);
563 if (in_value
!= NULL
)
565 // data in, LSB to MSB
566 value
= getShiftValue();
567 // we're shifting in data to MSB, shift data to be aligned for returning the value
570 for (int l
= 0; l
< k
; l
+= 8)
572 in_value
[(j
+ l
)/8]=(value
>> l
)&0xff;
578 static __inline
void scanFields(int num_fields
, const struct scan_field
*fields
, tap_state_t shiftState
, tap_state_t end_state
)
580 for (int i
= 0; i
< num_fields
; i
++)
582 scanBits(fields
[i
].out_value
,
591 int interface_jtag_add_ir_scan(struct jtag_tap
*active
, const struct scan_field
*fields
, tap_state_t state
)
594 struct jtag_tap
*tap
, *nextTap
;
595 tap_state_t pause_state
= TAP_IRSHIFT
;
597 for (tap
= jtag_tap_next_enabled(NULL
); tap
!= NULL
; tap
= nextTap
)
599 nextTap
= jtag_tap_next_enabled(tap
);
604 scan_size
= tap
->ir_length
;
606 /* search the list */
609 scanFields(1, fields
, TAP_IRSHIFT
, pause_state
);
610 /* update device information */
611 buf_cpy(fields
[0].out_value
, tap
->cur_instr
, scan_size
);
616 /* if a device isn't listed, set it to BYPASS */
617 assert(scan_size
<= 32);
618 shiftValueInner(TAP_IRSHIFT
, pause_state
, scan_size
, 0xffffffff);
631 int interface_jtag_add_plain_ir_scan(int num_bits
, const uint8_t *out_bits
, uint8_t *in_bits
, tap_state_t state
)
633 scanBits(out_bits
, in_bits
, num_bits
, true, TAP_IRSHIFT
, state
);
637 int interface_jtag_add_dr_scan(struct jtag_tap
*active
, int num_fields
, const struct scan_field
*fields
, tap_state_t state
)
639 struct jtag_tap
*tap
, *nextTap
;
640 tap_state_t pause_state
= TAP_DRSHIFT
;
641 for (tap
= jtag_tap_next_enabled(NULL
); tap
!= NULL
; tap
= nextTap
)
643 nextTap
= jtag_tap_next_enabled(tap
);
649 /* Find a range of fields to write to this tap */
652 assert(!tap
->bypass
);
654 scanFields(num_fields
, fields
, TAP_DRSHIFT
, pause_state
);
657 /* Shift out a 0 for disabled tap's */
659 shiftValueInner(TAP_DRSHIFT
, pause_state
, 1, 0);
665 int interface_jtag_add_plain_dr_scan(int num_bits
, const uint8_t *out_bits
, uint8_t *in_bits
, tap_state_t state
)
667 scanBits(out_bits
, in_bits
, num_bits
, true, TAP_DRSHIFT
, state
);
671 int interface_jtag_add_tlr()
673 setCurrentState(TAP_RESET
);
678 int interface_jtag_add_reset(int req_trst
, int req_srst
)
680 zy1000_reset(req_trst
, req_srst
);
684 static int zy1000_jtag_add_clocks(int num_cycles
, tap_state_t state
, tap_state_t clockstate
)
686 /* num_cycles can be 0 */
687 setCurrentState(clockstate
);
689 /* execute num_cycles, 32 at the time. */
691 for (i
= 0; i
< num_cycles
; i
+= 32)
695 if (num_cycles
-i
< num
)
699 shiftValueInner(clockstate
, clockstate
, num
, 0);
703 /* finish in end_state */
704 setCurrentState(state
);
706 tap_state_t t
= TAP_IDLE
;
707 /* test manual drive code on any target */
709 uint8_t tms_scan
= tap_get_tms_path(t
, state
);
710 int tms_count
= tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
712 for (i
= 0; i
< tms_count
; i
++)
714 tms
= (tms_scan
>> i
) & 1;
716 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, tms
);
719 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x20, state
);
725 int interface_jtag_add_runtest(int num_cycles
, tap_state_t state
)
727 return zy1000_jtag_add_clocks(num_cycles
, state
, TAP_IDLE
);
730 int interface_jtag_add_clocks(int num_cycles
)
732 return zy1000_jtag_add_clocks(num_cycles
, cmd_queue_cur_state
, cmd_queue_cur_state
);
735 int interface_add_tms_seq(unsigned num_bits
, const uint8_t *seq
, enum tap_state state
)
737 /*wait for the fifo to be empty*/
740 for (unsigned i
= 0; i
< num_bits
; i
++)
744 if (((seq
[i
/8] >> (i
% 8)) & 1) == 0)
754 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, tms
);
758 if (state
!= TAP_INVALID
)
760 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x20, state
);
763 /* this would be normal if we are switching to SWD mode */
768 int interface_jtag_add_pathmove(int num_states
, const tap_state_t
*path
)
775 tap_state_t cur_state
= cmd_queue_cur_state
;
778 memset(seq
, 0, sizeof(seq
));
779 assert(num_states
< (int)((sizeof(seq
) * 8)));
783 if (tap_state_transition(cur_state
, false) == path
[state_count
])
787 else if (tap_state_transition(cur_state
, true) == path
[state_count
])
793 LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_name(cur_state
), tap_state_name(path
[state_count
]));
797 seq
[state_count
/8] = seq
[state_count
/8] | (tms
<< (state_count
% 8));
799 cur_state
= path
[state_count
];
804 return interface_add_tms_seq(state_count
, seq
, cur_state
);
807 static void jtag_pre_post_bits(struct jtag_tap
*tap
, int *pre
, int *post
)
809 /* bypass bits before and after */
814 struct jtag_tap
*cur_tap
, *nextTap
;
815 for (cur_tap
= jtag_tap_next_enabled(NULL
); cur_tap
!= NULL
; cur_tap
= nextTap
)
817 nextTap
= jtag_tap_next_enabled(cur_tap
);
837 static const int embeddedice_num_bits[] = {32, 6};
841 values[1] = (1 << 5) | reg_addr;
845 embeddedice_num_bits,
850 void embeddedice_write_dcc(struct jtag_tap
*tap
, int reg_addr
, uint8_t *buffer
, int little
, int count
)
854 for (i
= 0; i
< count
; i
++)
856 embeddedice_write_reg_inner(tap
, reg_addr
, fast_target_buffer_get_u32(buffer
, little
));
862 jtag_pre_post_bits(tap
, &pre_bits
, &post_bits
);
864 if ((pre_bits
> 32) || (post_bits
+ 6 > 32))
867 for (i
= 0; i
< count
; i
++)
869 embeddedice_write_reg_inner(tap
, reg_addr
, fast_target_buffer_get_u32(buffer
, little
));
875 for (i
= 0; i
< count
; i
++)
877 /* Fewer pokes means we get to use the FIFO more efficiently */
878 shiftValueInner(TAP_DRSHIFT
, TAP_DRSHIFT
, pre_bits
, 0);
879 shiftValueInner(TAP_DRSHIFT
, TAP_DRSHIFT
, 32, fast_target_buffer_get_u32(buffer
, little
));
880 /* Danger! here we need to exit into the TAP_IDLE state to make
881 * DCC pick up this value.
883 shiftValueInner(TAP_DRSHIFT
, TAP_IDLE
, 6 + post_bits
, (reg_addr
| (1 << 5)));
892 int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap
* tap
, uint32_t opcode
, uint32_t * data
, size_t count
)
894 /* bypass bits before and after */
897 jtag_pre_post_bits(tap
, &pre_bits
, &post_bits
);
900 if ((pre_bits
> 32) || (post_bits
> 32))
902 int arm11_run_instr_data_to_core_noack_inner_default(struct jtag_tap
* tap
, uint32_t opcode
, uint32_t * data
, size_t count
);
903 return arm11_run_instr_data_to_core_noack_inner_default(tap
, opcode
, data
, count
);
906 static const int bits
[] = {32, 2};
907 uint32_t values
[] = {0, 0};
909 /* FIX!!!!!! the target_write_memory() API started this nasty problem
910 * with unaligned uint32_t * pointers... */
911 const uint8_t *t
= (const uint8_t *)data
;
916 /* Danger! This code doesn't update cmd_queue_cur_state, so
917 * invoking jtag_add_pathmove() before jtag_add_dr_out() after
918 * this loop would fail!
920 shiftValueInner(TAP_DRSHIFT
, TAP_DRSHIFT
, pre_bits
, 0);
928 shiftValueInner(TAP_DRSHIFT
, TAP_DRSHIFT
, 32, value
);
930 shiftValueInner(TAP_DRSHIFT
, TAP_DRPAUSE
, post_bits
, 0);
932 /* copy & paste from arm11_dbgtap.c */
933 //TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
934 /* KLUDGE! we have to flush the fifo or the Nios CPU locks up.
935 * This is probably a bug in the Avalon bus(cross clocking bridge?)
936 * or in the jtag registers module.
939 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 1);
940 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 1);
941 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 0);
942 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 0);
943 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 0);
944 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 1);
945 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 0);
946 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 0);
947 /* we don't have to wait for the queue to empty here */
948 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x20, TAP_DRSHIFT
);
951 static const tap_state_t arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay
[] =
953 TAP_DREXIT2
, TAP_DRUPDATE
, TAP_IDLE
, TAP_IDLE
, TAP_IDLE
, TAP_DRSELECT
, TAP_DRCAPTURE
, TAP_DRSHIFT
957 values
[0] |= (*t
++<<8);
958 values
[0] |= (*t
++<<16);
959 values
[0] |= (*t
++<<24);
967 jtag_add_pathmove(ARRAY_SIZE(arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay
),
968 arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay
);
973 values
[0] |= (*t
++<<8);
974 values
[0] |= (*t
++<<16);
975 values
[0] |= (*t
++<<24);
977 /* This will happen on the last iteration updating cmd_queue_cur_state
978 * so we don't have to track it during the common code path
986 return jtag_execute_queue();
991 static const struct command_registration zy1000_commands
[] = {
994 .handler
= handle_power_command
,
996 .help
= "Turn power switch to target on/off. "
997 "With no arguments, prints status.",
998 .usage
= "('on'|'off)",
1002 .name
= "zy1000_version",
1003 .mode
= COMMAND_ANY
,
1004 .jim_handler
= jim_zy1000_version
,
1005 .help
= "Print version info for zy1000.",
1006 .usage
= "['openocd'|'zy1000'|'date'|'time'|'pcb'|'fpga']",
1010 .name
= "zy1000_server",
1011 .mode
= COMMAND_ANY
,
1012 .jim_handler
= jim_zy1000_server
,
1013 .help
= "Tcpip address for ZY1000 server.",
1018 .name
= "powerstatus",
1019 .mode
= COMMAND_ANY
,
1020 .jim_handler
= zylinjtag_Jim_Command_powerstatus
,
1021 .help
= "Returns power status of target",
1023 #ifdef CYGPKG_HAL_NIOS2
1025 .name
= "updatezy1000firmware",
1026 .mode
= COMMAND_ANY
,
1027 .jim_handler
= jim_zy1000_writefirmware
,
1028 .help
= "writes firmware to flash",
1029 /* .usage = "some_string", */
1032 COMMAND_REGISTRATION_DONE
1036 static int tcp_ip
= -1;
1038 /* Write large packets if we can */
1039 static size_t out_pos
;
1040 static uint8_t out_buffer
[16384];
1041 static size_t in_pos
;
1042 static size_t in_write
;
1043 static uint8_t in_buffer
[16384];
1045 static bool flush_writes(void)
1047 bool ok
= (write(tcp_ip
, out_buffer
, out_pos
) == (int)out_pos
);
1052 static bool writeLong(uint32_t l
)
1055 for (i
= 0; i
< 4; i
++)
1057 uint8_t c
= (l
>> (i
*8))&0xff;
1058 out_buffer
[out_pos
++] = c
;
1059 if (out_pos
>= sizeof(out_buffer
))
1061 if (!flush_writes())
1070 static bool readLong(uint32_t *out_data
)
1074 if (!flush_writes())
1082 for (i
= 0; i
< 4; i
++)
1085 if (in_pos
== in_write
)
1089 t
= read(tcp_ip
, in_buffer
, sizeof(in_buffer
));
1094 in_write
= (size_t) t
;
1097 c
= in_buffer
[in_pos
++];
1099 data
|= (c
<< (i
*8));
1107 ZY1000_CMD_POKE
= 0x0,
1108 ZY1000_CMD_PEEK
= 0x8,
1109 ZY1000_CMD_SLEEP
= 0x1,
1113 #if !BUILD_ECOSBOARD
1115 #include <sys/socket.h> /* for socket(), connect(), send(), and recv() */
1116 #include <arpa/inet.h> /* for sockaddr_in and inet_addr() */
1118 /* We initialize this late since we need to know the server address
1121 static void tcpip_open(void)
1126 struct sockaddr_in echoServAddr
; /* Echo server address */
1128 /* Create a reliable, stream socket using TCP */
1129 if ((tcp_ip
= socket(PF_INET
, SOCK_STREAM
, IPPROTO_TCP
)) < 0)
1131 fprintf(stderr
, "Failed to connect to zy1000 server\n");
1135 /* Construct the server address structure */
1136 memset(&echoServAddr
, 0, sizeof(echoServAddr
)); /* Zero out structure */
1137 echoServAddr
.sin_family
= AF_INET
; /* Internet address family */
1138 echoServAddr
.sin_addr
.s_addr
= inet_addr(tcp_server
); /* Server IP address */
1139 echoServAddr
.sin_port
= htons(7777); /* Server port */
1141 /* Establish the connection to the echo server */
1142 if (connect(tcp_ip
, (struct sockaddr
*) &echoServAddr
, sizeof(echoServAddr
)) < 0)
1144 fprintf(stderr
, "Failed to connect to zy1000 server\n");
1149 setsockopt(tcp_ip
, /* socket affected */
1150 IPPROTO_TCP
, /* set option at TCP level */
1151 TCP_NODELAY
, /* name of option */
1152 (char *)&flag
, /* the cast is historical cruft */
1153 sizeof(int)); /* length of option value */
1159 void zy1000_tcpout(uint32_t address
, uint32_t data
)
1162 if (!writeLong((ZY1000_CMD_POKE
<< 24) | address
)||
1165 fprintf(stderr
, "Could not write to zy1000 server\n");
1170 uint32_t zy1000_tcpin(uint32_t address
)
1174 if (!writeLong((ZY1000_CMD_PEEK
<< 24) | address
)||
1177 fprintf(stderr
, "Could not read from zy1000 server\n");
1183 int interface_jtag_add_sleep(uint32_t us
)
1186 if (!writeLong((ZY1000_CMD_SLEEP
<< 24))||
1189 fprintf(stderr
, "Could not read from zy1000 server\n");
1199 static char tcpip_stack
[2048];
1200 static cyg_thread tcpip_thread_object
;
1201 static cyg_handle_t tcpip_thread_handle
;
1203 static char watchdog_stack
[2048];
1204 static cyg_thread watchdog_thread_object
;
1205 static cyg_handle_t watchdog_thread_handle
;
1207 /* Infinite loop peeking & poking */
1208 static void tcpipserver(void)
1213 if (!readLong(&address
))
1215 enum ZY1000_CMD c
= (address
>> 24) & 0xff;
1216 address
&= 0xffffff;
1219 case ZY1000_CMD_POKE
:
1222 if (!readLong(&data
))
1224 address
&= ~0x80000000;
1225 ZY1000_POKE(address
+ ZY1000_JTAG_BASE
, data
);
1228 case ZY1000_CMD_PEEK
:
1231 ZY1000_PEEK(address
+ ZY1000_JTAG_BASE
, data
);
1232 if (!writeLong(data
))
1236 case ZY1000_CMD_SLEEP
:
1239 if (!readLong(&data
))
1251 static void tcpip_server(cyg_addrword_t data
)
1253 int so_reuseaddr_option
= 1;
1256 if ((fd
= socket(AF_INET
, SOCK_STREAM
, 0)) == -1)
1258 LOG_ERROR("error creating socket: %s", strerror(errno
));
1262 setsockopt(fd
, SOL_SOCKET
, SO_REUSEADDR
, (void*) &so_reuseaddr_option
,
1265 struct sockaddr_in sin
;
1266 unsigned int address_size
;
1267 address_size
= sizeof(sin
);
1268 memset(&sin
, 0, sizeof(sin
));
1269 sin
.sin_family
= AF_INET
;
1270 sin
.sin_addr
.s_addr
= INADDR_ANY
;
1271 sin
.sin_port
= htons(7777);
1273 if (bind(fd
, (struct sockaddr
*) &sin
, sizeof(sin
)) == -1)
1275 LOG_ERROR("couldn't bind to socket: %s", strerror(errno
));
1279 if (listen(fd
, 1) == -1)
1281 LOG_ERROR("couldn't listen on socket: %s", strerror(errno
));
1288 tcp_ip
= accept(fd
, (struct sockaddr
*) &sin
, &address_size
);
1295 setsockopt(tcp_ip
, /* socket affected */
1296 IPPROTO_TCP
, /* set option at TCP level */
1297 TCP_NODELAY
, /* name of option */
1298 (char *)&flag
, /* the cast is historical cruft */
1299 sizeof(int)); /* length of option value */
1301 bool save_poll
= jtag_poll_get_enabled();
1303 /* polling will screw up the "connection" */
1304 jtag_poll_set_enabled(false);
1308 jtag_poll_set_enabled(save_poll
);
1317 #ifdef WATCHDOG_BASE
1318 /* If we connect to port 8888 we must send a char every 10s or the board resets itself */
1319 static void watchdog_server(cyg_addrword_t data
)
1321 int so_reuseaddr_option
= 1;
1324 if ((fd
= socket(AF_INET
, SOCK_STREAM
, 0)) == -1)
1326 LOG_ERROR("error creating socket: %s", strerror(errno
));
1330 setsockopt(fd
, SOL_SOCKET
, SO_REUSEADDR
, (void*) &so_reuseaddr_option
,
1333 struct sockaddr_in sin
;
1334 unsigned int address_size
;
1335 address_size
= sizeof(sin
);
1336 memset(&sin
, 0, sizeof(sin
));
1337 sin
.sin_family
= AF_INET
;
1338 sin
.sin_addr
.s_addr
= INADDR_ANY
;
1339 sin
.sin_port
= htons(8888);
1341 if (bind(fd
, (struct sockaddr
*) &sin
, sizeof(sin
)) == -1)
1343 LOG_ERROR("couldn't bind to socket: %s", strerror(errno
));
1347 if (listen(fd
, 1) == -1)
1349 LOG_ERROR("couldn't listen on socket: %s", strerror(errno
));
1356 int watchdog_ip
= accept(fd
, (struct sockaddr
*) &sin
, &address_size
);
1358 /* Start watchdog, must be reset every 10 seconds. */
1359 HAL_WRITE_UINT32(WATCHDOG_BASE
+ 4, 4);
1361 if (watchdog_ip
< 0)
1363 LOG_ERROR("couldn't open watchdog socket: %s", strerror(errno
));
1368 setsockopt(watchdog_ip
, /* socket affected */
1369 IPPROTO_TCP
, /* set option at TCP level */
1370 TCP_NODELAY
, /* name of option */
1371 (char *)&flag
, /* the cast is historical cruft */
1372 sizeof(int)); /* length of option value */
1378 if (read(watchdog_ip
, &buf
, 1) == 1)
1381 HAL_WRITE_UINT32(WATCHDOG_BASE
+ 8, 0x1234);
1382 /* Echo so we can telnet in and see that resetting works */
1383 write(watchdog_ip
, &buf
, 1);
1386 /* Stop tickling the watchdog, the CPU will reset in < 10 seconds
1399 int interface_jtag_add_sleep(uint32_t us
)
1408 int zy1000_init(void)
1411 LOG_USER("%s", ZYLIN_OPENOCD_VERSION
);
1414 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x30); // Turn on LED1 & LED2
1416 setPower(true); // on by default
1419 /* deassert resets. Important to avoid infinite loop waiting for SRST to deassert */
1421 zy1000_speed(jtag_get_speed());
1425 cyg_thread_create(1, tcpip_server
, (cyg_addrword_t
) 0, "tcip/ip server",
1426 (void *) tcpip_stack
, sizeof(tcpip_stack
),
1427 &tcpip_thread_handle
, &tcpip_thread_object
);
1428 cyg_thread_resume(tcpip_thread_handle
);
1429 #ifdef WATCHDOG_BASE
1430 cyg_thread_create(1, watchdog_server
, (cyg_addrword_t
) 0, "watchdog tcip/ip server",
1431 (void *) watchdog_stack
, sizeof(watchdog_stack
),
1432 &watchdog_thread_handle
, &watchdog_thread_object
);
1433 cyg_thread_resume(watchdog_thread_handle
);
1442 struct jtag_interface zy1000_interface
=
1445 .supported
= DEBUG_CAP_TMS_SEQ
,
1446 .execute_queue
= NULL
,
1447 .speed
= zy1000_speed
,
1448 .commands
= zy1000_commands
,
1449 .init
= zy1000_init
,
1450 .quit
= zy1000_quit
,
1452 .speed_div
= zy1000_speed_div
,
1453 .power_dropout
= zy1000_power_dropout
,
1454 .srst_asserted
= zy1000_srst_asserted
,
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