debug feature: jtagtcpip, improved performance
[openocd.git] / src / jtag / zy1000 / zy1000.c
1 /***************************************************************************
2 * Copyright (C) 2007-2010 by Øyvind Harboe *
3 * *
4 * This program is free software; you can redistribute it and/or modify *
5 * it under the terms of the GNU General Public License as published by *
6 * the Free Software Foundation; either version 2 of the License, or *
7 * (at your option) any later version. *
8 * *
9 * This program is distributed in the hope that it will be useful, *
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
12 * GNU General Public License for more details. *
13 * *
14 * You should have received a copy of the GNU General Public License *
15 * along with this program; if not, write to the *
16 * Free Software Foundation, Inc., *
17 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
18 ***************************************************************************/
19
20 /* This file supports the zy1000 debugger: http://www.zylin.com/zy1000.html
21 *
22 * The zy1000 is a standalone debugger that has a web interface and
23 * requires no drivers on the developer host as all communication
24 * is via TCP/IP. The zy1000 gets it performance(~400-700kBytes/s
25 * DCC downloads @ 16MHz target) as it has an FPGA to hardware
26 * accelerate the JTAG commands, while offering *very* low latency
27 * between OpenOCD and the FPGA registers.
28 *
29 * The disadvantage of the zy1000 is that it has a feeble CPU compared to
30 * a PC(ca. 50-500 DMIPS depending on how one counts it), whereas a PC
31 * is on the order of 10000 DMIPS(i.e. at a factor of 20-200).
32 *
33 * The zy1000 revc hardware is using an Altera Nios CPU, whereas the
34 * revb is using ARM7 + Xilinx.
35 *
36 * See Zylin web pages or contact Zylin for more information.
37 *
38 * The reason this code is in OpenOCD rather than OpenOCD linked with the
39 * ZY1000 code is that OpenOCD is the long road towards getting
40 * libopenocd into place. libopenocd will support both low performance,
41 * low latency systems(embedded) and high performance high latency
42 * systems(PCs).
43 */
44 #ifdef HAVE_CONFIG_H
45 #include "config.h"
46 #endif
47
48 #include <target/embeddedice.h>
49 #include <jtag/minidriver.h>
50 #include <jtag/interface.h>
51 #include <time.h>
52 #include <helper/time_support.h>
53
54 #include <netinet/tcp.h>
55
56 #if BUILD_ECOSBOARD
57 #include "zy1000_version.h"
58
59 #include <cyg/hal/hal_io.h> // low level i/o
60 #include <cyg/hal/hal_diag.h>
61
62 #ifdef CYGPKG_HAL_NIOS2
63 #include <cyg/hal/io.h>
64 #include <cyg/firmwareutil/firmwareutil.h>
65 #endif
66
67 #define ZYLIN_VERSION GIT_ZY1000_VERSION
68 #define ZYLIN_DATE __DATE__
69 #define ZYLIN_TIME __TIME__
70 #define ZYLIN_OPENOCD GIT_OPENOCD_VERSION
71 #define ZYLIN_OPENOCD_VERSION "ZY1000 " ZYLIN_VERSION " " ZYLIN_DATE
72
73 #endif
74
75
76 /* The software needs to check if it's in RCLK mode or not */
77 static bool zy1000_rclk = false;
78
79 static int zy1000_khz(int khz, int *jtag_speed)
80 {
81 if (khz == 0)
82 {
83 *jtag_speed = 0;
84 }
85 else
86 {
87 *jtag_speed = 64000/khz;
88 }
89 return ERROR_OK;
90 }
91
92 static int zy1000_speed_div(int speed, int *khz)
93 {
94 if (speed == 0)
95 {
96 *khz = 0;
97 }
98 else
99 {
100 *khz = 64000/speed;
101 }
102
103 return ERROR_OK;
104 }
105
106 static bool readPowerDropout(void)
107 {
108 uint32_t state;
109 // sample and clear power dropout
110 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x80);
111 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
112 bool powerDropout;
113 powerDropout = (state & 0x80) != 0;
114 return powerDropout;
115 }
116
117
118 static bool readSRST(void)
119 {
120 uint32_t state;
121 // sample and clear SRST sensing
122 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000040);
123 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
124 bool srstAsserted;
125 srstAsserted = (state & 0x40) != 0;
126 return srstAsserted;
127 }
128
129 static int zy1000_srst_asserted(int *srst_asserted)
130 {
131 *srst_asserted = readSRST();
132 return ERROR_OK;
133 }
134
135 static int zy1000_power_dropout(int *dropout)
136 {
137 *dropout = readPowerDropout();
138 return ERROR_OK;
139 }
140
141 void zy1000_reset(int trst, int srst)
142 {
143 LOG_DEBUG("zy1000 trst=%d, srst=%d", trst, srst);
144
145 /* flush the JTAG FIFO. Not flushing the queue before messing with
146 * reset has such interesting bugs as causing hard to reproduce
147 * RCLK bugs as RCLK will stop responding when TRST is asserted
148 */
149 waitIdle();
150
151 if (!srst)
152 {
153 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000001);
154 }
155 else
156 {
157 /* Danger!!! if clk != 0 when in
158 * idle in TAP_IDLE, reset halt on str912 will fail.
159 */
160 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000001);
161 }
162
163 if (!trst)
164 {
165 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000002);
166 }
167 else
168 {
169 /* assert reset */
170 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000002);
171 }
172
173 if (trst||(srst && (jtag_get_reset_config() & RESET_SRST_PULLS_TRST)))
174 {
175 /* we're now in the RESET state until trst is deasserted */
176 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_RESET);
177 } else
178 {
179 /* We'll get RCLK failure when we assert TRST, so clear any false positives here */
180 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
181 }
182
183 /* wait for srst to float back up */
184 if ((!srst && ((jtag_get_reset_config() & RESET_TRST_PULLS_SRST) == 0))||
185 (!srst && !trst && (jtag_get_reset_config() & RESET_TRST_PULLS_SRST)))
186 {
187 bool first = true;
188 long long start = 0;
189 long total = 0;
190 for (;;)
191 {
192 // We don't want to sense our own reset, so we clear here.
193 // There is of course a timing hole where we could loose
194 // a "real" reset.
195 if (!readSRST())
196 {
197 if (total > 1)
198 {
199 LOG_USER("SRST took %dms to deassert", (int)total);
200 }
201 break;
202 }
203
204 if (first)
205 {
206 first = false;
207 start = timeval_ms();
208 }
209
210 total = timeval_ms() - start;
211
212 keep_alive();
213
214 if (total > 5000)
215 {
216 LOG_ERROR("SRST took too long to deassert: %dms", (int)total);
217 break;
218 }
219 }
220
221 }
222 }
223
224 int zy1000_speed(int speed)
225 {
226 /* flush JTAG master FIFO before setting speed */
227 waitIdle();
228
229 zy1000_rclk = false;
230
231 if (speed == 0)
232 {
233 /*0 means RCLK*/
234 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x100);
235 zy1000_rclk = true;
236 LOG_DEBUG("jtag_speed using RCLK");
237 }
238 else
239 {
240 if (speed > 8190 || speed < 2)
241 {
242 LOG_USER("valid ZY1000 jtag_speed=[8190,2]. Divisor is 64MHz / even values between 8190-2, i.e. min 7814Hz, max 32MHz");
243 return ERROR_INVALID_ARGUMENTS;
244 }
245
246 LOG_USER("jtag_speed %d => JTAG clk=%f", speed, 64.0/(float)speed);
247 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x100);
248 ZY1000_POKE(ZY1000_JTAG_BASE + 0x1c, speed&~1);
249 }
250 return ERROR_OK;
251 }
252
253 static bool savePower;
254
255
256 static void setPower(bool power)
257 {
258 savePower = power;
259 if (power)
260 {
261 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x8);
262 } else
263 {
264 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x8);
265 }
266 }
267
268 COMMAND_HANDLER(handle_power_command)
269 {
270 switch (CMD_ARGC)
271 {
272 case 1: {
273 bool enable;
274 COMMAND_PARSE_ON_OFF(CMD_ARGV[0], enable);
275 setPower(enable);
276 // fall through
277 }
278 case 0:
279 LOG_INFO("Target power %s", savePower ? "on" : "off");
280 break;
281 default:
282 return ERROR_INVALID_ARGUMENTS;
283 }
284
285 return ERROR_OK;
286 }
287
288 #if !BUILD_ECOSBOARD
289 static char *tcp_server = "notspecified";
290 static int jim_zy1000_server(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
291 {
292 if (argc != 2)
293 return JIM_ERR;
294
295 tcp_server = strdup(Jim_GetString(argv[1], NULL));
296
297 return JIM_OK;
298 }
299 #endif
300
301 #if BUILD_ECOSBOARD
302 /* Give TELNET a way to find out what version this is */
303 static int jim_zy1000_version(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
304 {
305 if ((argc < 1) || (argc > 3))
306 return JIM_ERR;
307 const char *version_str = NULL;
308
309 if (argc == 1)
310 {
311 version_str = ZYLIN_OPENOCD_VERSION;
312 } else
313 {
314 const char *str = Jim_GetString(argv[1], NULL);
315 const char *str2 = NULL;
316 if (argc > 2)
317 str2 = Jim_GetString(argv[2], NULL);
318 if (strcmp("openocd", str) == 0)
319 {
320 version_str = ZYLIN_OPENOCD;
321 }
322 else if (strcmp("zy1000", str) == 0)
323 {
324 version_str = ZYLIN_VERSION;
325 }
326 else if (strcmp("date", str) == 0)
327 {
328 version_str = ZYLIN_DATE;
329 }
330 else if (strcmp("time", str) == 0)
331 {
332 version_str = ZYLIN_TIME;
333 }
334 else if (strcmp("pcb", str) == 0)
335 {
336 #ifdef CYGPKG_HAL_NIOS2
337 version_str="c";
338 #else
339 version_str="b";
340 #endif
341 }
342 #ifdef CYGPKG_HAL_NIOS2
343 else if (strcmp("fpga", str) == 0)
344 {
345
346 /* return a list of 32 bit integers to describe the expected
347 * and actual FPGA
348 */
349 static char *fpga_id = "0x12345678 0x12345678 0x12345678 0x12345678";
350 uint32_t id, timestamp;
351 HAL_READ_UINT32(SYSID_BASE, id);
352 HAL_READ_UINT32(SYSID_BASE+4, timestamp);
353 sprintf(fpga_id, "0x%08x 0x%08x 0x%08x 0x%08x", id, timestamp, SYSID_ID, SYSID_TIMESTAMP);
354 version_str = fpga_id;
355 if ((argc>2) && (strcmp("time", str2) == 0))
356 {
357 time_t last_mod = timestamp;
358 char * t = ctime (&last_mod) ;
359 t[strlen(t)-1] = 0;
360 version_str = t;
361 }
362 }
363 #endif
364
365 else
366 {
367 return JIM_ERR;
368 }
369 }
370
371 Jim_SetResult(interp, Jim_NewStringObj(interp, version_str, -1));
372
373 return JIM_OK;
374 }
375 #endif
376
377 #ifdef CYGPKG_HAL_NIOS2
378
379
380 struct info_forward
381 {
382 void *data;
383 struct cyg_upgrade_info *upgraded_file;
384 };
385
386 static void report_info(void *data, const char * format, va_list args)
387 {
388 char *s = alloc_vprintf(format, args);
389 LOG_USER_N("%s", s);
390 free(s);
391 }
392
393 struct cyg_upgrade_info firmware_info =
394 {
395 (uint8_t *)0x84000000,
396 "/ram/firmware.phi",
397 "Firmware",
398 0x0300000,
399 0x1f00000 -
400 0x0300000,
401 "ZylinNiosFirmware\n",
402 report_info,
403 };
404
405 static int jim_zy1000_writefirmware(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
406 {
407 if (argc != 2)
408 return JIM_ERR;
409
410 int length;
411 const char *str = Jim_GetString(argv[1], &length);
412
413 /* */
414 int tmpFile;
415 if ((tmpFile = open(firmware_info.file, O_RDWR | O_CREAT | O_TRUNC)) <= 0)
416 {
417 return JIM_ERR;
418 }
419 bool success;
420 success = write(tmpFile, str, length) == length;
421 close(tmpFile);
422 if (!success)
423 return JIM_ERR;
424
425 if (!cyg_firmware_upgrade(NULL, firmware_info))
426 return JIM_ERR;
427
428 return JIM_OK;
429 }
430 #endif
431
432 static int
433 zylinjtag_Jim_Command_powerstatus(Jim_Interp *interp,
434 int argc,
435 Jim_Obj * const *argv)
436 {
437 if (argc != 1)
438 {
439 Jim_WrongNumArgs(interp, 1, argv, "powerstatus");
440 return JIM_ERR;
441 }
442
443 bool dropout = readPowerDropout();
444
445 Jim_SetResult(interp, Jim_NewIntObj(interp, dropout));
446
447 return JIM_OK;
448 }
449
450
451
452 int zy1000_quit(void)
453 {
454
455 return ERROR_OK;
456 }
457
458
459
460 int interface_jtag_execute_queue(void)
461 {
462 uint32_t empty;
463
464 waitIdle();
465
466 if (zy1000_rclk)
467 {
468 /* Only check for errors when using RCLK to speed up
469 * jtag over TCP/IP
470 */
471 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, empty);
472 /* clear JTAG error register */
473 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
474
475 if ((empty&0x400) != 0)
476 {
477 LOG_WARNING("RCLK timeout");
478 /* the error is informative only as we don't want to break the firmware if there
479 * is a false positive.
480 */
481 // return ERROR_FAIL;
482 }
483 }
484 return ERROR_OK;
485 }
486
487
488
489
490
491 static uint32_t getShiftValue(void)
492 {
493 uint32_t value;
494 waitIdle();
495 ZY1000_PEEK(ZY1000_JTAG_BASE + 0xc, value);
496 VERBOSE(LOG_INFO("getShiftValue %08x", value));
497 return value;
498 }
499 #if 0
500 static uint32_t getShiftValueFlip(void)
501 {
502 uint32_t value;
503 waitIdle();
504 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x18, value);
505 VERBOSE(LOG_INFO("getShiftValue %08x (flipped)", value));
506 return value;
507 }
508 #endif
509
510 #if 0
511 static void shiftValueInnerFlip(const tap_state_t state, const tap_state_t endState, int repeat, uint32_t value)
512 {
513 VERBOSE(LOG_INFO("shiftValueInner %s %s %d %08x (flipped)", tap_state_name(state), tap_state_name(endState), repeat, value));
514 uint32_t a,b;
515 a = state;
516 b = endState;
517 ZY1000_POKE(ZY1000_JTAG_BASE + 0xc, value);
518 ZY1000_POKE(ZY1000_JTAG_BASE + 0x8, (1 << 15) | (repeat << 8) | (a << 4) | b);
519 VERBOSE(getShiftValueFlip());
520 }
521 #endif
522
523 // here we shuffle N bits out/in
524 static __inline void scanBits(const uint8_t *out_value, uint8_t *in_value, int num_bits, bool pause_now, tap_state_t shiftState, tap_state_t end_state)
525 {
526 tap_state_t pause_state = shiftState;
527 for (int j = 0; j < num_bits; j += 32)
528 {
529 int k = num_bits - j;
530 if (k > 32)
531 {
532 k = 32;
533 /* we have more to shift out */
534 } else if (pause_now)
535 {
536 /* this was the last to shift out this time */
537 pause_state = end_state;
538 }
539
540 // we have (num_bits + 7)/8 bytes of bits to toggle out.
541 // bits are pushed out LSB to MSB
542 uint32_t value;
543 value = 0;
544 if (out_value != NULL)
545 {
546 for (int l = 0; l < k; l += 8)
547 {
548 value|=out_value[(j + l)/8]<<l;
549 }
550 }
551 /* mask away unused bits for easier debugging */
552 if (k < 32)
553 {
554 value&=~(((uint32_t)0xffffffff) << k);
555 } else
556 {
557 /* Shifting by >= 32 is not defined by the C standard
558 * and will in fact shift by &0x1f bits on nios */
559 }
560
561 shiftValueInner(shiftState, pause_state, k, value);
562
563 if (in_value != NULL)
564 {
565 // data in, LSB to MSB
566 value = getShiftValue();
567 // we're shifting in data to MSB, shift data to be aligned for returning the value
568 value >>= 32-k;
569
570 for (int l = 0; l < k; l += 8)
571 {
572 in_value[(j + l)/8]=(value >> l)&0xff;
573 }
574 }
575 }
576 }
577
578 static __inline void scanFields(int num_fields, const struct scan_field *fields, tap_state_t shiftState, tap_state_t end_state)
579 {
580 for (int i = 0; i < num_fields; i++)
581 {
582 scanBits(fields[i].out_value,
583 fields[i].in_value,
584 fields[i].num_bits,
585 (i == num_fields-1),
586 shiftState,
587 end_state);
588 }
589 }
590
591 int interface_jtag_add_ir_scan(struct jtag_tap *active, const struct scan_field *fields, tap_state_t state)
592 {
593 int scan_size = 0;
594 struct jtag_tap *tap, *nextTap;
595 tap_state_t pause_state = TAP_IRSHIFT;
596
597 for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
598 {
599 nextTap = jtag_tap_next_enabled(tap);
600 if (nextTap==NULL)
601 {
602 pause_state = state;
603 }
604 scan_size = tap->ir_length;
605
606 /* search the list */
607 if (tap == active)
608 {
609 scanFields(1, fields, TAP_IRSHIFT, pause_state);
610 /* update device information */
611 buf_cpy(fields[0].out_value, tap->cur_instr, scan_size);
612
613 tap->bypass = 0;
614 } else
615 {
616 /* if a device isn't listed, set it to BYPASS */
617 assert(scan_size <= 32);
618 shiftValueInner(TAP_IRSHIFT, pause_state, scan_size, 0xffffffff);
619
620 tap->bypass = 1;
621 }
622 }
623
624 return ERROR_OK;
625 }
626
627
628
629
630
631 int interface_jtag_add_plain_ir_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits, tap_state_t state)
632 {
633 scanBits(out_bits, in_bits, num_bits, true, TAP_IRSHIFT, state);
634 return ERROR_OK;
635 }
636
637 int interface_jtag_add_dr_scan(struct jtag_tap *active, int num_fields, const struct scan_field *fields, tap_state_t state)
638 {
639 struct jtag_tap *tap, *nextTap;
640 tap_state_t pause_state = TAP_DRSHIFT;
641 for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
642 {
643 nextTap = jtag_tap_next_enabled(tap);
644 if (nextTap==NULL)
645 {
646 pause_state = state;
647 }
648
649 /* Find a range of fields to write to this tap */
650 if (tap == active)
651 {
652 assert(!tap->bypass);
653
654 scanFields(num_fields, fields, TAP_DRSHIFT, pause_state);
655 } else
656 {
657 /* Shift out a 0 for disabled tap's */
658 assert(tap->bypass);
659 shiftValueInner(TAP_DRSHIFT, pause_state, 1, 0);
660 }
661 }
662 return ERROR_OK;
663 }
664
665 int interface_jtag_add_plain_dr_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits, tap_state_t state)
666 {
667 scanBits(out_bits, in_bits, num_bits, true, TAP_DRSHIFT, state);
668 return ERROR_OK;
669 }
670
671 int interface_jtag_add_tlr()
672 {
673 setCurrentState(TAP_RESET);
674 return ERROR_OK;
675 }
676
677
678 int interface_jtag_add_reset(int req_trst, int req_srst)
679 {
680 zy1000_reset(req_trst, req_srst);
681 return ERROR_OK;
682 }
683
684 static int zy1000_jtag_add_clocks(int num_cycles, tap_state_t state, tap_state_t clockstate)
685 {
686 /* num_cycles can be 0 */
687 setCurrentState(clockstate);
688
689 /* execute num_cycles, 32 at the time. */
690 int i;
691 for (i = 0; i < num_cycles; i += 32)
692 {
693 int num;
694 num = 32;
695 if (num_cycles-i < num)
696 {
697 num = num_cycles-i;
698 }
699 shiftValueInner(clockstate, clockstate, num, 0);
700 }
701
702 #if !TEST_MANUAL()
703 /* finish in end_state */
704 setCurrentState(state);
705 #else
706 tap_state_t t = TAP_IDLE;
707 /* test manual drive code on any target */
708 int tms;
709 uint8_t tms_scan = tap_get_tms_path(t, state);
710 int tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
711
712 for (i = 0; i < tms_count; i++)
713 {
714 tms = (tms_scan >> i) & 1;
715 waitIdle();
716 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
717 }
718 waitIdle();
719 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
720 #endif
721
722 return ERROR_OK;
723 }
724
725 int interface_jtag_add_runtest(int num_cycles, tap_state_t state)
726 {
727 return zy1000_jtag_add_clocks(num_cycles, state, TAP_IDLE);
728 }
729
730 int interface_jtag_add_clocks(int num_cycles)
731 {
732 return zy1000_jtag_add_clocks(num_cycles, cmd_queue_cur_state, cmd_queue_cur_state);
733 }
734
735 int interface_add_tms_seq(unsigned num_bits, const uint8_t *seq, enum tap_state state)
736 {
737 /*wait for the fifo to be empty*/
738 waitIdle();
739
740 for (unsigned i = 0; i < num_bits; i++)
741 {
742 int tms;
743
744 if (((seq[i/8] >> (i % 8)) & 1) == 0)
745 {
746 tms = 0;
747 }
748 else
749 {
750 tms = 1;
751 }
752
753 waitIdle();
754 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
755 }
756
757 waitIdle();
758 if (state != TAP_INVALID)
759 {
760 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
761 } else
762 {
763 /* this would be normal if we are switching to SWD mode */
764 }
765 return ERROR_OK;
766 }
767
768 int interface_jtag_add_pathmove(int num_states, const tap_state_t *path)
769 {
770 int state_count;
771 int tms = 0;
772
773 state_count = 0;
774
775 tap_state_t cur_state = cmd_queue_cur_state;
776
777 uint8_t seq[16];
778 memset(seq, 0, sizeof(seq));
779 assert(num_states < (int)((sizeof(seq) * 8)));
780
781 while (num_states)
782 {
783 if (tap_state_transition(cur_state, false) == path[state_count])
784 {
785 tms = 0;
786 }
787 else if (tap_state_transition(cur_state, true) == path[state_count])
788 {
789 tms = 1;
790 }
791 else
792 {
793 LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_name(cur_state), tap_state_name(path[state_count]));
794 exit(-1);
795 }
796
797 seq[state_count/8] = seq[state_count/8] | (tms << (state_count % 8));
798
799 cur_state = path[state_count];
800 state_count++;
801 num_states--;
802 }
803
804 return interface_add_tms_seq(state_count, seq, cur_state);
805 }
806
807 static void jtag_pre_post_bits(struct jtag_tap *tap, int *pre, int *post)
808 {
809 /* bypass bits before and after */
810 int pre_bits = 0;
811 int post_bits = 0;
812
813 bool found = false;
814 struct jtag_tap *cur_tap, *nextTap;
815 for (cur_tap = jtag_tap_next_enabled(NULL); cur_tap!= NULL; cur_tap = nextTap)
816 {
817 nextTap = jtag_tap_next_enabled(cur_tap);
818 if (cur_tap == tap)
819 {
820 found = true;
821 } else
822 {
823 if (found)
824 {
825 post_bits++;
826 } else
827 {
828 pre_bits++;
829 }
830 }
831 }
832 *pre = pre_bits;
833 *post = post_bits;
834 }
835
836 /*
837 static const int embeddedice_num_bits[] = {32, 6};
838 uint32_t values[2];
839
840 values[0] = value;
841 values[1] = (1 << 5) | reg_addr;
842
843 jtag_add_dr_out(tap,
844 2,
845 embeddedice_num_bits,
846 values,
847 TAP_IDLE);
848 */
849
850 void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, uint8_t *buffer, int little, int count)
851 {
852 #if 0
853 int i;
854 for (i = 0; i < count; i++)
855 {
856 embeddedice_write_reg_inner(tap, reg_addr, fast_target_buffer_get_u32(buffer, little));
857 buffer += 4;
858 }
859 #else
860 int pre_bits;
861 int post_bits;
862 jtag_pre_post_bits(tap, &pre_bits, &post_bits);
863
864 if ((pre_bits > 32) || (post_bits + 6 > 32))
865 {
866 int i;
867 for (i = 0; i < count; i++)
868 {
869 embeddedice_write_reg_inner(tap, reg_addr, fast_target_buffer_get_u32(buffer, little));
870 buffer += 4;
871 }
872 } else
873 {
874 int i;
875 for (i = 0; i < count; i++)
876 {
877 /* Fewer pokes means we get to use the FIFO more efficiently */
878 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
879 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, little));
880 /* Danger! here we need to exit into the TAP_IDLE state to make
881 * DCC pick up this value.
882 */
883 shiftValueInner(TAP_DRSHIFT, TAP_IDLE, 6 + post_bits, (reg_addr | (1 << 5)));
884 buffer += 4;
885 }
886 }
887 #endif
888 }
889
890
891
892 int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap * tap, uint32_t opcode, uint32_t * data, size_t count)
893 {
894 /* bypass bits before and after */
895 int pre_bits;
896 int post_bits;
897 jtag_pre_post_bits(tap, &pre_bits, &post_bits);
898 post_bits+=2;
899
900 if ((pre_bits > 32) || (post_bits > 32))
901 {
902 int arm11_run_instr_data_to_core_noack_inner_default(struct jtag_tap * tap, uint32_t opcode, uint32_t * data, size_t count);
903 return arm11_run_instr_data_to_core_noack_inner_default(tap, opcode, data, count);
904 } else
905 {
906 static const int bits[] = {32, 2};
907 uint32_t values[] = {0, 0};
908
909 /* FIX!!!!!! the target_write_memory() API started this nasty problem
910 * with unaligned uint32_t * pointers... */
911 const uint8_t *t = (const uint8_t *)data;
912
913 while (--count > 0)
914 {
915 #if 1
916 /* Danger! This code doesn't update cmd_queue_cur_state, so
917 * invoking jtag_add_pathmove() before jtag_add_dr_out() after
918 * this loop would fail!
919 */
920 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
921
922 uint32_t value;
923 value = *t++;
924 value |= (*t++<<8);
925 value |= (*t++<<16);
926 value |= (*t++<<24);
927
928 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, value);
929 /* minimum 2 bits */
930 shiftValueInner(TAP_DRSHIFT, TAP_DRPAUSE, post_bits, 0);
931
932 /* copy & paste from arm11_dbgtap.c */
933 //TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
934 /* KLUDGE! we have to flush the fifo or the Nios CPU locks up.
935 * This is probably a bug in the Avalon bus(cross clocking bridge?)
936 * or in the jtag registers module.
937 */
938 waitIdle();
939 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
940 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
941 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
942 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
943 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
944 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
945 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
946 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
947 /* we don't have to wait for the queue to empty here */
948 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_DRSHIFT);
949 waitIdle();
950 #else
951 static const tap_state_t arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay[] =
952 {
953 TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
954 };
955
956 values[0] = *t++;
957 values[0] |= (*t++<<8);
958 values[0] |= (*t++<<16);
959 values[0] |= (*t++<<24);
960
961 jtag_add_dr_out(tap,
962 2,
963 bits,
964 values,
965 TAP_IDLE);
966
967 jtag_add_pathmove(ARRAY_SIZE(arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay),
968 arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay);
969 #endif
970 }
971
972 values[0] = *t++;
973 values[0] |= (*t++<<8);
974 values[0] |= (*t++<<16);
975 values[0] |= (*t++<<24);
976
977 /* This will happen on the last iteration updating cmd_queue_cur_state
978 * so we don't have to track it during the common code path
979 */
980 jtag_add_dr_out(tap,
981 2,
982 bits,
983 values,
984 TAP_IDLE);
985
986 return jtag_execute_queue();
987 }
988 }
989
990
991 static const struct command_registration zy1000_commands[] = {
992 {
993 .name = "power",
994 .handler = handle_power_command,
995 .mode = COMMAND_ANY,
996 .help = "Turn power switch to target on/off. "
997 "With no arguments, prints status.",
998 .usage = "('on'|'off)",
999 },
1000 #if BUILD_ECOSBOARD
1001 {
1002 .name = "zy1000_version",
1003 .mode = COMMAND_ANY,
1004 .jim_handler = jim_zy1000_version,
1005 .help = "Print version info for zy1000.",
1006 .usage = "['openocd'|'zy1000'|'date'|'time'|'pcb'|'fpga']",
1007 },
1008 #else
1009 {
1010 .name = "zy1000_server",
1011 .mode = COMMAND_ANY,
1012 .jim_handler = jim_zy1000_server,
1013 .help = "Tcpip address for ZY1000 server.",
1014 .usage = "address",
1015 },
1016 #endif
1017 {
1018 .name = "powerstatus",
1019 .mode = COMMAND_ANY,
1020 .jim_handler = zylinjtag_Jim_Command_powerstatus,
1021 .help = "Returns power status of target",
1022 },
1023 #ifdef CYGPKG_HAL_NIOS2
1024 {
1025 .name = "updatezy1000firmware",
1026 .mode = COMMAND_ANY,
1027 .jim_handler = jim_zy1000_writefirmware,
1028 .help = "writes firmware to flash",
1029 /* .usage = "some_string", */
1030 },
1031 #endif
1032 COMMAND_REGISTRATION_DONE
1033 };
1034
1035
1036 static int tcp_ip = -1;
1037
1038 /* Write large packets if we can */
1039 static size_t out_pos;
1040 static uint8_t out_buffer[16384];
1041 static size_t in_pos;
1042 static size_t in_write;
1043 static uint8_t in_buffer[16384];
1044
1045 static bool flush_writes(void)
1046 {
1047 bool ok = (write(tcp_ip, out_buffer, out_pos) == (int)out_pos);
1048 out_pos = 0;
1049 return ok;
1050 }
1051
1052 static bool writeLong(uint32_t l)
1053 {
1054 int i;
1055 for (i = 0; i < 4; i++)
1056 {
1057 uint8_t c = (l >> (i*8))&0xff;
1058 out_buffer[out_pos++] = c;
1059 if (out_pos >= sizeof(out_buffer))
1060 {
1061 if (!flush_writes())
1062 {
1063 return false;
1064 }
1065 }
1066 }
1067 return true;
1068 }
1069
1070 static bool readLong(uint32_t *out_data)
1071 {
1072 if (out_pos > 0)
1073 {
1074 if (!flush_writes())
1075 {
1076 return false;
1077 }
1078 }
1079
1080 uint32_t data = 0;
1081 int i;
1082 for (i = 0; i < 4; i++)
1083 {
1084 uint8_t c;
1085 if (in_pos == in_write)
1086 {
1087 /* read more */
1088 int t;
1089 t = read(tcp_ip, in_buffer, sizeof(in_buffer));
1090 if (t < 1)
1091 {
1092 return false;
1093 }
1094 in_write = (size_t) t;
1095 in_pos = 0;
1096 }
1097 c = in_buffer[in_pos++];
1098
1099 data |= (c << (i*8));
1100 }
1101 *out_data = data;
1102 return true;
1103 }
1104
1105 enum ZY1000_CMD
1106 {
1107 ZY1000_CMD_POKE = 0x0,
1108 ZY1000_CMD_PEEK = 0x8,
1109 ZY1000_CMD_SLEEP = 0x1,
1110 };
1111
1112
1113 #if !BUILD_ECOSBOARD
1114
1115 #include <sys/socket.h> /* for socket(), connect(), send(), and recv() */
1116 #include <arpa/inet.h> /* for sockaddr_in and inet_addr() */
1117
1118 /* We initialize this late since we need to know the server address
1119 * first.
1120 */
1121 static void tcpip_open(void)
1122 {
1123 if (tcp_ip >= 0)
1124 return;
1125
1126 struct sockaddr_in echoServAddr; /* Echo server address */
1127
1128 /* Create a reliable, stream socket using TCP */
1129 if ((tcp_ip = socket(PF_INET, SOCK_STREAM, IPPROTO_TCP)) < 0)
1130 {
1131 fprintf(stderr, "Failed to connect to zy1000 server\n");
1132 exit(-1);
1133 }
1134
1135 /* Construct the server address structure */
1136 memset(&echoServAddr, 0, sizeof(echoServAddr)); /* Zero out structure */
1137 echoServAddr.sin_family = AF_INET; /* Internet address family */
1138 echoServAddr.sin_addr.s_addr = inet_addr(tcp_server); /* Server IP address */
1139 echoServAddr.sin_port = htons(7777); /* Server port */
1140
1141 /* Establish the connection to the echo server */
1142 if (connect(tcp_ip, (struct sockaddr *) &echoServAddr, sizeof(echoServAddr)) < 0)
1143 {
1144 fprintf(stderr, "Failed to connect to zy1000 server\n");
1145 exit(-1);
1146 }
1147
1148 int flag = 1;
1149 setsockopt(tcp_ip, /* socket affected */
1150 IPPROTO_TCP, /* set option at TCP level */
1151 TCP_NODELAY, /* name of option */
1152 (char *)&flag, /* the cast is historical cruft */
1153 sizeof(int)); /* length of option value */
1154
1155 }
1156
1157
1158 /* send a poke */
1159 void zy1000_tcpout(uint32_t address, uint32_t data)
1160 {
1161 tcpip_open();
1162 if (!writeLong((ZY1000_CMD_POKE << 24) | address)||
1163 !writeLong(data))
1164 {
1165 fprintf(stderr, "Could not write to zy1000 server\n");
1166 exit(-1);
1167 }
1168 }
1169
1170 uint32_t zy1000_tcpin(uint32_t address)
1171 {
1172 tcpip_open();
1173 uint32_t data;
1174 if (!writeLong((ZY1000_CMD_PEEK << 24) | address)||
1175 !readLong(&data))
1176 {
1177 fprintf(stderr, "Could not read from zy1000 server\n");
1178 exit(-1);
1179 }
1180 return data;
1181 }
1182
1183 int interface_jtag_add_sleep(uint32_t us)
1184 {
1185 tcpip_open();
1186 if (!writeLong((ZY1000_CMD_SLEEP << 24))||
1187 !writeLong(us))
1188 {
1189 fprintf(stderr, "Could not read from zy1000 server\n");
1190 exit(-1);
1191 }
1192 return ERROR_OK;
1193 }
1194
1195
1196 #endif
1197
1198 #if BUILD_ECOSBOARD
1199 static char tcpip_stack[2048];
1200 static cyg_thread tcpip_thread_object;
1201 static cyg_handle_t tcpip_thread_handle;
1202
1203 static char watchdog_stack[2048];
1204 static cyg_thread watchdog_thread_object;
1205 static cyg_handle_t watchdog_thread_handle;
1206
1207 /* Infinite loop peeking & poking */
1208 static void tcpipserver(void)
1209 {
1210 for (;;)
1211 {
1212 uint32_t address;
1213 if (!readLong(&address))
1214 return;
1215 enum ZY1000_CMD c = (address >> 24) & 0xff;
1216 address &= 0xffffff;
1217 switch (c)
1218 {
1219 case ZY1000_CMD_POKE:
1220 {
1221 uint32_t data;
1222 if (!readLong(&data))
1223 return;
1224 address &= ~0x80000000;
1225 ZY1000_POKE(address + ZY1000_JTAG_BASE, data);
1226 break;
1227 }
1228 case ZY1000_CMD_PEEK:
1229 {
1230 uint32_t data;
1231 ZY1000_PEEK(address + ZY1000_JTAG_BASE, data);
1232 if (!writeLong(data))
1233 return;
1234 break;
1235 }
1236 case ZY1000_CMD_SLEEP:
1237 {
1238 uint32_t data;
1239 if (!readLong(&data))
1240 return;
1241 jtag_sleep(data);
1242 break;
1243 }
1244 default:
1245 return;
1246 }
1247 }
1248 }
1249
1250
1251 static void tcpip_server(cyg_addrword_t data)
1252 {
1253 int so_reuseaddr_option = 1;
1254
1255 int fd;
1256 if ((fd = socket(AF_INET, SOCK_STREAM, 0)) == -1)
1257 {
1258 LOG_ERROR("error creating socket: %s", strerror(errno));
1259 exit(-1);
1260 }
1261
1262 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (void*) &so_reuseaddr_option,
1263 sizeof(int));
1264
1265 struct sockaddr_in sin;
1266 unsigned int address_size;
1267 address_size = sizeof(sin);
1268 memset(&sin, 0, sizeof(sin));
1269 sin.sin_family = AF_INET;
1270 sin.sin_addr.s_addr = INADDR_ANY;
1271 sin.sin_port = htons(7777);
1272
1273 if (bind(fd, (struct sockaddr *) &sin, sizeof(sin)) == -1)
1274 {
1275 LOG_ERROR("couldn't bind to socket: %s", strerror(errno));
1276 exit(-1);
1277 }
1278
1279 if (listen(fd, 1) == -1)
1280 {
1281 LOG_ERROR("couldn't listen on socket: %s", strerror(errno));
1282 exit(-1);
1283 }
1284
1285
1286 for (;;)
1287 {
1288 tcp_ip = accept(fd, (struct sockaddr *) &sin, &address_size);
1289 if (tcp_ip < 0)
1290 {
1291 continue;
1292 }
1293
1294 int flag = 1;
1295 setsockopt(tcp_ip, /* socket affected */
1296 IPPROTO_TCP, /* set option at TCP level */
1297 TCP_NODELAY, /* name of option */
1298 (char *)&flag, /* the cast is historical cruft */
1299 sizeof(int)); /* length of option value */
1300
1301 bool save_poll = jtag_poll_get_enabled();
1302
1303 /* polling will screw up the "connection" */
1304 jtag_poll_set_enabled(false);
1305
1306 tcpipserver();
1307
1308 jtag_poll_set_enabled(save_poll);
1309
1310 close(tcp_ip);
1311
1312 }
1313 close(fd);
1314
1315 }
1316
1317 #ifdef WATCHDOG_BASE
1318 /* If we connect to port 8888 we must send a char every 10s or the board resets itself */
1319 static void watchdog_server(cyg_addrword_t data)
1320 {
1321 int so_reuseaddr_option = 1;
1322
1323 int fd;
1324 if ((fd = socket(AF_INET, SOCK_STREAM, 0)) == -1)
1325 {
1326 LOG_ERROR("error creating socket: %s", strerror(errno));
1327 exit(-1);
1328 }
1329
1330 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (void*) &so_reuseaddr_option,
1331 sizeof(int));
1332
1333 struct sockaddr_in sin;
1334 unsigned int address_size;
1335 address_size = sizeof(sin);
1336 memset(&sin, 0, sizeof(sin));
1337 sin.sin_family = AF_INET;
1338 sin.sin_addr.s_addr = INADDR_ANY;
1339 sin.sin_port = htons(8888);
1340
1341 if (bind(fd, (struct sockaddr *) &sin, sizeof(sin)) == -1)
1342 {
1343 LOG_ERROR("couldn't bind to socket: %s", strerror(errno));
1344 exit(-1);
1345 }
1346
1347 if (listen(fd, 1) == -1)
1348 {
1349 LOG_ERROR("couldn't listen on socket: %s", strerror(errno));
1350 exit(-1);
1351 }
1352
1353
1354 for (;;)
1355 {
1356 int watchdog_ip = accept(fd, (struct sockaddr *) &sin, &address_size);
1357
1358 /* Start watchdog, must be reset every 10 seconds. */
1359 HAL_WRITE_UINT32(WATCHDOG_BASE + 4, 4);
1360
1361 if (watchdog_ip < 0)
1362 {
1363 LOG_ERROR("couldn't open watchdog socket: %s", strerror(errno));
1364 exit(-1);
1365 }
1366
1367 int flag = 1;
1368 setsockopt(watchdog_ip, /* socket affected */
1369 IPPROTO_TCP, /* set option at TCP level */
1370 TCP_NODELAY, /* name of option */
1371 (char *)&flag, /* the cast is historical cruft */
1372 sizeof(int)); /* length of option value */
1373
1374
1375 char buf;
1376 for (;;)
1377 {
1378 if (read(watchdog_ip, &buf, 1) == 1)
1379 {
1380 /* Reset timer */
1381 HAL_WRITE_UINT32(WATCHDOG_BASE + 8, 0x1234);
1382 /* Echo so we can telnet in and see that resetting works */
1383 write(watchdog_ip, &buf, 1);
1384 } else
1385 {
1386 /* Stop tickling the watchdog, the CPU will reset in < 10 seconds
1387 * now.
1388 */
1389 return;
1390 }
1391
1392 }
1393
1394 /* Never reached */
1395 }
1396 }
1397 #endif
1398
1399 int interface_jtag_add_sleep(uint32_t us)
1400 {
1401 jtag_sleep(us);
1402 return ERROR_OK;
1403 }
1404
1405 #endif
1406
1407
1408 int zy1000_init(void)
1409 {
1410 #if BUILD_ECOSBOARD
1411 LOG_USER("%s", ZYLIN_OPENOCD_VERSION);
1412 #endif
1413
1414 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x30); // Turn on LED1 & LED2
1415
1416 setPower(true); // on by default
1417
1418
1419 /* deassert resets. Important to avoid infinite loop waiting for SRST to deassert */
1420 zy1000_reset(0, 0);
1421 zy1000_speed(jtag_get_speed());
1422
1423
1424 #if BUILD_ECOSBOARD
1425 cyg_thread_create(1, tcpip_server, (cyg_addrword_t) 0, "tcip/ip server",
1426 (void *) tcpip_stack, sizeof(tcpip_stack),
1427 &tcpip_thread_handle, &tcpip_thread_object);
1428 cyg_thread_resume(tcpip_thread_handle);
1429 #ifdef WATCHDOG_BASE
1430 cyg_thread_create(1, watchdog_server, (cyg_addrword_t) 0, "watchdog tcip/ip server",
1431 (void *) watchdog_stack, sizeof(watchdog_stack),
1432 &watchdog_thread_handle, &watchdog_thread_object);
1433 cyg_thread_resume(watchdog_thread_handle);
1434 #endif
1435 #endif
1436
1437 return ERROR_OK;
1438 }
1439
1440
1441
1442 struct jtag_interface zy1000_interface =
1443 {
1444 .name = "ZY1000",
1445 .supported = DEBUG_CAP_TMS_SEQ,
1446 .execute_queue = NULL,
1447 .speed = zy1000_speed,
1448 .commands = zy1000_commands,
1449 .init = zy1000_init,
1450 .quit = zy1000_quit,
1451 .khz = zy1000_khz,
1452 .speed_div = zy1000_speed_div,
1453 .power_dropout = zy1000_power_dropout,
1454 .srst_asserted = zy1000_srst_asserted,
1455 };
1456

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