jtag: retire tap field
[openocd.git] / src / jtag / zy1000 / zy1000.c
1 /***************************************************************************
2 * Copyright (C) 2007-2010 by Øyvind Harboe *
3 * *
4 * This program is free software; you can redistribute it and/or modify *
5 * it under the terms of the GNU General Public License as published by *
6 * the Free Software Foundation; either version 2 of the License, or *
7 * (at your option) any later version. *
8 * *
9 * This program is distributed in the hope that it will be useful, *
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
12 * GNU General Public License for more details. *
13 * *
14 * You should have received a copy of the GNU General Public License *
15 * along with this program; if not, write to the *
16 * Free Software Foundation, Inc., *
17 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
18 ***************************************************************************/
19
20 /* This file supports the zy1000 debugger: http://www.zylin.com/zy1000.html
21 *
22 * The zy1000 is a standalone debugger that has a web interface and
23 * requires no drivers on the developer host as all communication
24 * is via TCP/IP. The zy1000 gets it performance(~400-700kBytes/s
25 * DCC downloads @ 16MHz target) as it has an FPGA to hardware
26 * accelerate the JTAG commands, while offering *very* low latency
27 * between OpenOCD and the FPGA registers.
28 *
29 * The disadvantage of the zy1000 is that it has a feeble CPU compared to
30 * a PC(ca. 50-500 DMIPS depending on how one counts it), whereas a PC
31 * is on the order of 10000 DMIPS(i.e. at a factor of 20-200).
32 *
33 * The zy1000 revc hardware is using an Altera Nios CPU, whereas the
34 * revb is using ARM7 + Xilinx.
35 *
36 * See Zylin web pages or contact Zylin for more information.
37 *
38 * The reason this code is in OpenOCD rather than OpenOCD linked with the
39 * ZY1000 code is that OpenOCD is the long road towards getting
40 * libopenocd into place. libopenocd will support both low performance,
41 * low latency systems(embedded) and high performance high latency
42 * systems(PCs).
43 */
44 #ifdef HAVE_CONFIG_H
45 #include "config.h"
46 #endif
47
48 #include <target/embeddedice.h>
49 #include <jtag/minidriver.h>
50 #include <jtag/interface.h>
51 #include "zy1000_version.h"
52
53 #include <cyg/hal/hal_io.h> // low level i/o
54 #include <cyg/hal/hal_diag.h>
55
56 #include <time.h>
57
58 #ifdef CYGPKG_HAL_NIOS2
59 #include <cyg/hal/io.h>
60 #include <cyg/firmwareutil/firmwareutil.h>
61 #endif
62
63 #define ZYLIN_VERSION GIT_ZY1000_VERSION
64 #define ZYLIN_DATE __DATE__
65 #define ZYLIN_TIME __TIME__
66 #define ZYLIN_OPENOCD GIT_OPENOCD_VERSION
67 #define ZYLIN_OPENOCD_VERSION "ZY1000 " ZYLIN_VERSION " " ZYLIN_DATE
68
69
70 static int zy1000_khz(int khz, int *jtag_speed)
71 {
72 if (khz == 0)
73 {
74 *jtag_speed = 0;
75 }
76 else
77 {
78 *jtag_speed = 64000/khz;
79 }
80 return ERROR_OK;
81 }
82
83 static int zy1000_speed_div(int speed, int *khz)
84 {
85 if (speed == 0)
86 {
87 *khz = 0;
88 }
89 else
90 {
91 *khz = 64000/speed;
92 }
93
94 return ERROR_OK;
95 }
96
97 static bool readPowerDropout(void)
98 {
99 cyg_uint32 state;
100 // sample and clear power dropout
101 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x80);
102 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
103 bool powerDropout;
104 powerDropout = (state & 0x80) != 0;
105 return powerDropout;
106 }
107
108
109 static bool readSRST(void)
110 {
111 cyg_uint32 state;
112 // sample and clear SRST sensing
113 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000040);
114 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
115 bool srstAsserted;
116 srstAsserted = (state & 0x40) != 0;
117 return srstAsserted;
118 }
119
120 static int zy1000_srst_asserted(int *srst_asserted)
121 {
122 *srst_asserted = readSRST();
123 return ERROR_OK;
124 }
125
126 static int zy1000_power_dropout(int *dropout)
127 {
128 *dropout = readPowerDropout();
129 return ERROR_OK;
130 }
131
132 void zy1000_reset(int trst, int srst)
133 {
134 LOG_DEBUG("zy1000 trst=%d, srst=%d", trst, srst);
135
136 /* flush the JTAG FIFO. Not flushing the queue before messing with
137 * reset has such interesting bugs as causing hard to reproduce
138 * RCLK bugs as RCLK will stop responding when TRST is asserted
139 */
140 waitIdle();
141
142 if (!srst)
143 {
144 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000001);
145 }
146 else
147 {
148 /* Danger!!! if clk != 0 when in
149 * idle in TAP_IDLE, reset halt on str912 will fail.
150 */
151 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000001);
152 }
153
154 if (!trst)
155 {
156 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000002);
157 }
158 else
159 {
160 /* assert reset */
161 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000002);
162 }
163
164 if (trst||(srst && (jtag_get_reset_config() & RESET_SRST_PULLS_TRST)))
165 {
166 /* we're now in the RESET state until trst is deasserted */
167 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_RESET);
168 } else
169 {
170 /* We'll get RCLK failure when we assert TRST, so clear any false positives here */
171 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
172 }
173
174 /* wait for srst to float back up */
175 if (!srst)
176 {
177 int i;
178 for (i = 0; i < 1000; i++)
179 {
180 // We don't want to sense our own reset, so we clear here.
181 // There is of course a timing hole where we could loose
182 // a "real" reset.
183 if (!readSRST())
184 break;
185
186 /* wait 1ms */
187 alive_sleep(1);
188 }
189
190 if (i == 1000)
191 {
192 LOG_USER("SRST didn't deassert after %dms", i);
193 } else if (i > 1)
194 {
195 LOG_USER("SRST took %dms to deassert", i);
196 }
197 }
198 }
199
200 int zy1000_speed(int speed)
201 {
202 /* flush JTAG master FIFO before setting speed */
203 waitIdle();
204
205 if (speed == 0)
206 {
207 /*0 means RCLK*/
208 speed = 0;
209 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x100);
210 LOG_DEBUG("jtag_speed using RCLK");
211 }
212 else
213 {
214 if (speed > 8190 || speed < 2)
215 {
216 LOG_USER("valid ZY1000 jtag_speed=[8190,2]. Divisor is 64MHz / even values between 8190-2, i.e. min 7814Hz, max 32MHz");
217 return ERROR_INVALID_ARGUMENTS;
218 }
219
220 LOG_USER("jtag_speed %d => JTAG clk=%f", speed, 64.0/(float)speed);
221 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x100);
222 ZY1000_POKE(ZY1000_JTAG_BASE + 0x1c, speed&~1);
223 }
224 return ERROR_OK;
225 }
226
227 static bool savePower;
228
229
230 static void setPower(bool power)
231 {
232 savePower = power;
233 if (power)
234 {
235 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x8);
236 } else
237 {
238 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x8);
239 }
240 }
241
242 COMMAND_HANDLER(handle_power_command)
243 {
244 switch (CMD_ARGC)
245 {
246 case 1: {
247 bool enable;
248 COMMAND_PARSE_ON_OFF(CMD_ARGV[0], enable);
249 setPower(enable);
250 // fall through
251 }
252 case 0:
253 LOG_INFO("Target power %s", savePower ? "on" : "off");
254 break;
255 default:
256 return ERROR_INVALID_ARGUMENTS;
257 }
258
259 return ERROR_OK;
260 }
261
262
263 /* Give TELNET a way to find out what version this is */
264 static int jim_zy1000_version(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
265 {
266 if ((argc < 1) || (argc > 3))
267 return JIM_ERR;
268 const char *version_str = NULL;
269
270 if (argc == 1)
271 {
272 version_str = ZYLIN_OPENOCD_VERSION;
273 } else
274 {
275 const char *str = Jim_GetString(argv[1], NULL);
276 const char *str2 = NULL;
277 if (argc > 2)
278 str2 = Jim_GetString(argv[2], NULL);
279 if (strcmp("openocd", str) == 0)
280 {
281 version_str = ZYLIN_OPENOCD;
282 }
283 else if (strcmp("zy1000", str) == 0)
284 {
285 version_str = ZYLIN_VERSION;
286 }
287 else if (strcmp("date", str) == 0)
288 {
289 version_str = ZYLIN_DATE;
290 }
291 else if (strcmp("time", str) == 0)
292 {
293 version_str = ZYLIN_TIME;
294 }
295 else if (strcmp("pcb", str) == 0)
296 {
297 #ifdef CYGPKG_HAL_NIOS2
298 version_str="c";
299 #else
300 version_str="b";
301 #endif
302 }
303 #ifdef CYGPKG_HAL_NIOS2
304 else if (strcmp("fpga", str) == 0)
305 {
306
307 /* return a list of 32 bit integers to describe the expected
308 * and actual FPGA
309 */
310 static char *fpga_id = "0x12345678 0x12345678 0x12345678 0x12345678";
311 cyg_uint32 id, timestamp;
312 HAL_READ_UINT32(SYSID_BASE, id);
313 HAL_READ_UINT32(SYSID_BASE+4, timestamp);
314 sprintf(fpga_id, "0x%08x 0x%08x 0x%08x 0x%08x", id, timestamp, SYSID_ID, SYSID_TIMESTAMP);
315 version_str = fpga_id;
316 if ((argc>2) && (strcmp("time", str2) == 0))
317 {
318 time_t last_mod = timestamp;
319 char * t = ctime (&last_mod) ;
320 t[strlen(t)-1] = 0;
321 version_str = t;
322 }
323 }
324 #endif
325
326 else
327 {
328 return JIM_ERR;
329 }
330 }
331
332 Jim_SetResult(interp, Jim_NewStringObj(interp, version_str, -1));
333
334 return JIM_OK;
335 }
336
337
338 #ifdef CYGPKG_HAL_NIOS2
339
340
341 struct info_forward
342 {
343 void *data;
344 struct cyg_upgrade_info *upgraded_file;
345 };
346
347 static void report_info(void *data, const char * format, va_list args)
348 {
349 char *s = alloc_vprintf(format, args);
350 LOG_USER_N("%s", s);
351 free(s);
352 }
353
354 struct cyg_upgrade_info firmware_info =
355 {
356 (cyg_uint8 *)0x84000000,
357 "/ram/firmware.phi",
358 "Firmware",
359 0x0300000,
360 0x1f00000 -
361 0x0300000,
362 "ZylinNiosFirmware\n",
363 report_info,
364 };
365
366 static int jim_zy1000_writefirmware(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
367 {
368 if (argc != 2)
369 return JIM_ERR;
370
371 int length;
372 const char *str = Jim_GetString(argv[1], &length);
373
374 /* */
375 int tmpFile;
376 if ((tmpFile = open(firmware_info.file, O_RDWR | O_CREAT | O_TRUNC)) <= 0)
377 {
378 return JIM_ERR;
379 }
380 bool success;
381 success = write(tmpFile, str, length) == length;
382 close(tmpFile);
383 if (!success)
384 return JIM_ERR;
385
386 if (!cyg_firmware_upgrade(NULL, firmware_info))
387 return JIM_ERR;
388
389 return JIM_OK;
390 }
391 #endif
392
393 static int
394 zylinjtag_Jim_Command_powerstatus(Jim_Interp *interp,
395 int argc,
396 Jim_Obj * const *argv)
397 {
398 if (argc != 1)
399 {
400 Jim_WrongNumArgs(interp, 1, argv, "powerstatus");
401 return JIM_ERR;
402 }
403
404 cyg_uint32 status;
405 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, status);
406
407 Jim_SetResult(interp, Jim_NewIntObj(interp, (status&0x80) != 0));
408
409 return JIM_OK;
410 }
411
412
413
414
415 int zy1000_init(void)
416 {
417 LOG_USER("%s", ZYLIN_OPENOCD_VERSION);
418
419 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x30); // Turn on LED1 & LED2
420
421 setPower(true); // on by default
422
423
424 /* deassert resets. Important to avoid infinite loop waiting for SRST to deassert */
425 zy1000_reset(0, 0);
426 zy1000_speed(jtag_get_speed());
427
428 return ERROR_OK;
429 }
430
431 int zy1000_quit(void)
432 {
433
434 return ERROR_OK;
435 }
436
437
438
439 int interface_jtag_execute_queue(void)
440 {
441 cyg_uint32 empty;
442
443 waitIdle();
444 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, empty);
445 /* clear JTAG error register */
446 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
447
448 if ((empty&0x400) != 0)
449 {
450 LOG_WARNING("RCLK timeout");
451 /* the error is informative only as we don't want to break the firmware if there
452 * is a false positive.
453 */
454 // return ERROR_FAIL;
455 }
456 return ERROR_OK;
457 }
458
459
460
461
462
463 static cyg_uint32 getShiftValue(void)
464 {
465 cyg_uint32 value;
466 waitIdle();
467 ZY1000_PEEK(ZY1000_JTAG_BASE + 0xc, value);
468 VERBOSE(LOG_INFO("getShiftValue %08x", value));
469 return value;
470 }
471 #if 0
472 static cyg_uint32 getShiftValueFlip(void)
473 {
474 cyg_uint32 value;
475 waitIdle();
476 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x18, value);
477 VERBOSE(LOG_INFO("getShiftValue %08x (flipped)", value));
478 return value;
479 }
480 #endif
481
482 #if 0
483 static void shiftValueInnerFlip(const tap_state_t state, const tap_state_t endState, int repeat, cyg_uint32 value)
484 {
485 VERBOSE(LOG_INFO("shiftValueInner %s %s %d %08x (flipped)", tap_state_name(state), tap_state_name(endState), repeat, value));
486 cyg_uint32 a,b;
487 a = state;
488 b = endState;
489 ZY1000_POKE(ZY1000_JTAG_BASE + 0xc, value);
490 ZY1000_POKE(ZY1000_JTAG_BASE + 0x8, (1 << 15) | (repeat << 8) | (a << 4) | b);
491 VERBOSE(getShiftValueFlip());
492 }
493 #endif
494
495 static void gotoEndState(tap_state_t end_state)
496 {
497 setCurrentState(end_state);
498 }
499
500 static __inline void scanFields(int num_fields, const struct scan_field *fields, tap_state_t shiftState, int pause)
501 {
502 int i;
503 int j;
504 int k;
505
506 for (i = 0; i < num_fields; i++)
507 {
508 cyg_uint32 value;
509
510 uint8_t *inBuffer = NULL;
511
512
513 // figure out where to store the input data
514 int num_bits = fields[i].num_bits;
515 if (fields[i].in_value != NULL)
516 {
517 inBuffer = fields[i].in_value;
518 }
519
520 // here we shuffle N bits out/in
521 j = 0;
522 while (j < num_bits)
523 {
524 tap_state_t pause_state;
525 int l;
526 k = num_bits-j;
527 pause_state = (shiftState == TAP_DRSHIFT)?TAP_DRSHIFT:TAP_IRSHIFT;
528 if (k > 32)
529 {
530 k = 32;
531 /* we have more to shift out */
532 } else if (pause&&(i == num_fields-1))
533 {
534 /* this was the last to shift out this time */
535 pause_state = (shiftState==TAP_DRSHIFT)?TAP_DRPAUSE:TAP_IRPAUSE;
536 }
537
538 // we have (num_bits + 7)/8 bytes of bits to toggle out.
539 // bits are pushed out LSB to MSB
540 value = 0;
541 if (fields[i].out_value != NULL)
542 {
543 for (l = 0; l < k; l += 8)
544 {
545 value|=fields[i].out_value[(j + l)/8]<<l;
546 }
547 }
548 /* mask away unused bits for easier debugging */
549 if (k < 32)
550 {
551 value&=~(((uint32_t)0xffffffff) << k);
552 } else
553 {
554 /* Shifting by >= 32 is not defined by the C standard
555 * and will in fact shift by &0x1f bits on nios */
556 }
557
558 shiftValueInner(shiftState, pause_state, k, value);
559
560 if (inBuffer != NULL)
561 {
562 // data in, LSB to MSB
563 value = getShiftValue();
564 // we're shifting in data to MSB, shift data to be aligned for returning the value
565 value >>= 32-k;
566
567 for (l = 0; l < k; l += 8)
568 {
569 inBuffer[(j + l)/8]=(value >> l)&0xff;
570 }
571 }
572 j += k;
573 }
574 }
575 }
576
577 int interface_jtag_add_ir_scan(struct jtag_tap *active, int num_fields, const struct scan_field *fields, tap_state_t state)
578 {
579 int scan_size = 0;
580 struct jtag_tap *tap, *nextTap;
581
582 assert(num_fields == 1);
583
584 for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
585 {
586 nextTap = jtag_tap_next_enabled(tap);
587 bool pause = (nextTap==NULL);
588 scan_size = tap->ir_length;
589
590 /* search the list */
591 if (tap == active)
592 {
593 scanFields(num_fields, fields, TAP_IRSHIFT, pause);
594 /* update device information */
595 buf_cpy(fields[0].out_value, tap->cur_instr, scan_size);
596
597 tap->bypass = 0;
598 } else
599 {
600 /* if a device isn't listed, set it to BYPASS */
601 assert(scan_size <= 32);
602 shiftValueInner(TAP_IRSHIFT, pause?TAP_IRPAUSE:TAP_IRSHIFT, scan_size, 0xffffffff);
603
604 tap->bypass = 1;
605 }
606 }
607 gotoEndState(state);
608
609 return ERROR_OK;
610 }
611
612
613
614
615
616 int interface_jtag_add_plain_ir_scan(int num_fields, const struct scan_field *fields, tap_state_t state)
617 {
618 scanFields(num_fields, fields, TAP_IRSHIFT, 1);
619 gotoEndState(state);
620
621 return ERROR_OK;
622 }
623
624 int interface_jtag_add_dr_scan(struct jtag_tap *active, int num_fields, const struct scan_field *fields, tap_state_t state)
625 {
626 struct jtag_tap *tap, *nextTap;
627 for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
628 {
629 nextTap = jtag_tap_next_enabled(tap);
630 bool pause = (nextTap==NULL);
631
632 /* Find a range of fields to write to this tap */
633 if (tap == active)
634 {
635 assert(!tap->bypass);
636
637 scanFields(num_fields, fields, TAP_DRSHIFT, pause);
638 } else
639 {
640 /* Shift out a 0 for disabled tap's */
641 assert(tap->bypass);
642 shiftValueInner(TAP_DRSHIFT, pause?TAP_DRPAUSE:TAP_DRSHIFT, 1, 0);
643 }
644 }
645 gotoEndState(state);
646 return ERROR_OK;
647 }
648
649 int interface_jtag_add_plain_dr_scan(int num_fields, const struct scan_field *fields, tap_state_t state)
650 {
651 scanFields(num_fields, fields, TAP_DRSHIFT, 1);
652 gotoEndState(state);
653 return ERROR_OK;
654 }
655
656 int interface_jtag_add_tlr()
657 {
658 setCurrentState(TAP_RESET);
659 return ERROR_OK;
660 }
661
662
663 int interface_jtag_add_reset(int req_trst, int req_srst)
664 {
665 zy1000_reset(req_trst, req_srst);
666 return ERROR_OK;
667 }
668
669 static int zy1000_jtag_add_clocks(int num_cycles, tap_state_t state, tap_state_t clockstate)
670 {
671 /* num_cycles can be 0 */
672 setCurrentState(clockstate);
673
674 /* execute num_cycles, 32 at the time. */
675 int i;
676 for (i = 0; i < num_cycles; i += 32)
677 {
678 int num;
679 num = 32;
680 if (num_cycles-i < num)
681 {
682 num = num_cycles-i;
683 }
684 shiftValueInner(clockstate, clockstate, num, 0);
685 }
686
687 #if !TEST_MANUAL()
688 /* finish in end_state */
689 setCurrentState(state);
690 #else
691 tap_state_t t = TAP_IDLE;
692 /* test manual drive code on any target */
693 int tms;
694 uint8_t tms_scan = tap_get_tms_path(t, state);
695 int tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
696
697 for (i = 0; i < tms_count; i++)
698 {
699 tms = (tms_scan >> i) & 1;
700 waitIdle();
701 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
702 }
703 waitIdle();
704 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
705 #endif
706
707 return ERROR_OK;
708 }
709
710 int interface_jtag_add_runtest(int num_cycles, tap_state_t state)
711 {
712 return zy1000_jtag_add_clocks(num_cycles, state, TAP_IDLE);
713 }
714
715 int interface_jtag_add_clocks(int num_cycles)
716 {
717 return zy1000_jtag_add_clocks(num_cycles, cmd_queue_cur_state, cmd_queue_cur_state);
718 }
719
720 int interface_jtag_add_sleep(uint32_t us)
721 {
722 jtag_sleep(us);
723 return ERROR_OK;
724 }
725
726 int interface_add_tms_seq(unsigned num_bits, const uint8_t *seq, enum tap_state state)
727 {
728 /*wait for the fifo to be empty*/
729 waitIdle();
730
731 for (unsigned i = 0; i < num_bits; i++)
732 {
733 int tms;
734
735 if (((seq[i/8] >> (i % 8)) & 1) == 0)
736 {
737 tms = 0;
738 }
739 else
740 {
741 tms = 1;
742 }
743
744 waitIdle();
745 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
746 }
747
748 waitIdle();
749 if (state != TAP_INVALID)
750 {
751 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
752 } else
753 {
754 /* this would be normal if we are switching to SWD mode */
755 }
756 return ERROR_OK;
757 }
758
759 int interface_jtag_add_pathmove(int num_states, const tap_state_t *path)
760 {
761 int state_count;
762 int tms = 0;
763
764 state_count = 0;
765
766 tap_state_t cur_state = cmd_queue_cur_state;
767
768 uint8_t seq[16];
769 memset(seq, 0, sizeof(seq));
770 assert(num_states < (sizeof(seq) * 8));
771
772 while (num_states)
773 {
774 if (tap_state_transition(cur_state, false) == path[state_count])
775 {
776 tms = 0;
777 }
778 else if (tap_state_transition(cur_state, true) == path[state_count])
779 {
780 tms = 1;
781 }
782 else
783 {
784 LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_name(cur_state), tap_state_name(path[state_count]));
785 exit(-1);
786 }
787
788 seq[state_count/8] = seq[state_count/8] | (tms << (state_count % 8));
789
790 cur_state = path[state_count];
791 state_count++;
792 num_states--;
793 }
794
795 return interface_add_tms_seq(state_count, seq, cur_state);
796 }
797
798 void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, uint8_t *buffer, int little, int count)
799 {
800 // static int const reg_addr = 0x5;
801 tap_state_t end_state = jtag_get_end_state();
802 if (jtag_tap_next_enabled(jtag_tap_next_enabled(NULL)) == NULL)
803 {
804 /* better performance via code duplication */
805 if (little)
806 {
807 int i;
808 for (i = 0; i < count; i++)
809 {
810 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, 1));
811 shiftValueInner(TAP_DRSHIFT, end_state, 6, reg_addr | (1 << 5));
812 buffer += 4;
813 }
814 } else
815 {
816 int i;
817 for (i = 0; i < count; i++)
818 {
819 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, 0));
820 shiftValueInner(TAP_DRSHIFT, end_state, 6, reg_addr | (1 << 5));
821 buffer += 4;
822 }
823 }
824 }
825 else
826 {
827 int i;
828 for (i = 0; i < count; i++)
829 {
830 embeddedice_write_reg_inner(tap, reg_addr, fast_target_buffer_get_u32(buffer, little));
831 buffer += 4;
832 }
833 }
834 }
835
836
837
838 int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap * tap, uint32_t opcode, uint32_t * data, size_t count)
839 {
840 #if 0
841 int arm11_run_instr_data_to_core_noack_inner_default(struct jtag_tap * tap, uint32_t opcode, uint32_t * data, size_t count);
842 return arm11_run_instr_data_to_core_noack_inner_default(tap, opcode, data, count);
843 #else
844 static const int bits[] = {32, 2};
845 uint32_t values[] = {0, 0};
846
847 /* FIX!!!!!! the target_write_memory() API started this nasty problem
848 * with unaligned uint32_t * pointers... */
849 const uint8_t *t = (const uint8_t *)data;
850
851
852 /* bypass bits before and after */
853 int pre_bits = 0;
854 int post_bits = 0;
855
856 bool found = false;
857 struct jtag_tap *cur_tap, *nextTap;
858 for (cur_tap = jtag_tap_next_enabled(NULL); cur_tap!= NULL; cur_tap = nextTap)
859 {
860 nextTap = jtag_tap_next_enabled(cur_tap);
861 if (cur_tap == tap)
862 {
863 found = true;
864 } else
865 {
866 if (found)
867 {
868 post_bits++;
869 } else
870 {
871 pre_bits++;
872 }
873 }
874 }
875
876 post_bits+=2;
877
878
879 while (--count > 0)
880 {
881 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
882
883 uint32_t value;
884 value = *t++;
885 value |= (*t++<<8);
886 value |= (*t++<<16);
887 value |= (*t++<<24);
888
889 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, value);
890 shiftValueInner(TAP_DRSHIFT, TAP_DRPAUSE, post_bits, 0);
891
892 #if 1
893 /* copy & paste from arm11_dbgtap.c */
894 //TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
895
896 waitIdle();
897 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
898 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
899 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
900 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
901 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
902 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
903 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
904 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
905 /* we don't have to wait for the queue to empty here. waitIdle(); */
906 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_DRSHIFT);
907 #else
908 static const tap_state_t arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay[] =
909 {
910 TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
911 };
912
913 jtag_add_pathmove(ARRAY_SIZE(arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay),
914 arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay);
915 #endif
916 }
917
918 values[0] = *t++;
919 values[0] |= (*t++<<8);
920 values[0] |= (*t++<<16);
921 values[0] |= (*t++<<24);
922
923 /* This will happen on the last iteration updating the current tap state
924 * so we don't have to track it during the common code path */
925 jtag_add_dr_out(tap,
926 2,
927 bits,
928 values,
929 TAP_IDLE);
930
931 return jtag_execute_queue();
932 #endif
933 }
934
935
936 static const struct command_registration zy1000_commands[] = {
937 {
938 .name = "power",
939 .handler = handle_power_command,
940 .mode = COMMAND_ANY,
941 .help = "Turn power switch to target on/off. "
942 "With no arguments, prints status.",
943 .usage = "('on'|'off)",
944 },
945 {
946 .name = "zy1000_version",
947 .mode = COMMAND_ANY,
948 .jim_handler = jim_zy1000_version,
949 .help = "Print version info for zy1000.",
950 .usage = "['openocd'|'zy1000'|'date'|'time'|'pcb'|'fpga']",
951 },
952 {
953 .name = "powerstatus",
954 .mode = COMMAND_ANY,
955 .jim_handler = zylinjtag_Jim_Command_powerstatus,
956 .help = "Returns power status of target",
957 },
958 #ifdef CYGPKG_HAL_NIOS2
959 {
960 .name = "updatezy1000firmware",
961 .mode = COMMAND_ANY,
962 .jim_handler = jim_zy1000_writefirmware,
963 .help = "writes firmware to flash",
964 /* .usage = "some_string", */
965 },
966 #endif
967 COMMAND_REGISTRATION_DONE
968 };
969
970
971
972 struct jtag_interface zy1000_interface =
973 {
974 .name = "ZY1000",
975 .supported = DEBUG_CAP_TMS_SEQ,
976 .execute_queue = NULL,
977 .speed = zy1000_speed,
978 .commands = zy1000_commands,
979 .init = zy1000_init,
980 .quit = zy1000_quit,
981 .khz = zy1000_khz,
982 .speed_div = zy1000_speed_div,
983 .power_dropout = zy1000_power_dropout,
984 .srst_asserted = zy1000_srst_asserted,
985 };
986

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)