zy1000: dev tool
[openocd.git] / src / jtag / zy1000 / zy1000.c
1 /***************************************************************************
2 * Copyright (C) 2007-2010 by Øyvind Harboe *
3 * *
4 * This program is free software; you can redistribute it and/or modify *
5 * it under the terms of the GNU General Public License as published by *
6 * the Free Software Foundation; either version 2 of the License, or *
7 * (at your option) any later version. *
8 * *
9 * This program is distributed in the hope that it will be useful, *
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
12 * GNU General Public License for more details. *
13 * *
14 * You should have received a copy of the GNU General Public License *
15 * along with this program; if not, write to the *
16 * Free Software Foundation, Inc., *
17 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
18 ***************************************************************************/
19
20 /* This file supports the zy1000 debugger: http://www.zylin.com/zy1000.html
21 *
22 * The zy1000 is a standalone debugger that has a web interface and
23 * requires no drivers on the developer host as all communication
24 * is via TCP/IP. The zy1000 gets it performance(~400-700kBytes/s
25 * DCC downloads @ 16MHz target) as it has an FPGA to hardware
26 * accelerate the JTAG commands, while offering *very* low latency
27 * between OpenOCD and the FPGA registers.
28 *
29 * The disadvantage of the zy1000 is that it has a feeble CPU compared to
30 * a PC(ca. 50-500 DMIPS depending on how one counts it), whereas a PC
31 * is on the order of 10000 DMIPS(i.e. at a factor of 20-200).
32 *
33 * The zy1000 revc hardware is using an Altera Nios CPU, whereas the
34 * revb is using ARM7 + Xilinx.
35 *
36 * See Zylin web pages or contact Zylin for more information.
37 *
38 * The reason this code is in OpenOCD rather than OpenOCD linked with the
39 * ZY1000 code is that OpenOCD is the long road towards getting
40 * libopenocd into place. libopenocd will support both low performance,
41 * low latency systems(embedded) and high performance high latency
42 * systems(PCs).
43 */
44 #ifdef HAVE_CONFIG_H
45 #include "config.h"
46 #endif
47
48 #include <target/embeddedice.h>
49 #include <jtag/minidriver.h>
50 #include <jtag/interface.h>
51 #include <time.h>
52
53 #include <netinet/tcp.h>
54
55 #if BUILD_ECOSBOARD
56 #include "zy1000_version.h"
57
58 #include <cyg/hal/hal_io.h> // low level i/o
59 #include <cyg/hal/hal_diag.h>
60
61 #ifdef CYGPKG_HAL_NIOS2
62 #include <cyg/hal/io.h>
63 #include <cyg/firmwareutil/firmwareutil.h>
64 #endif
65
66 #define ZYLIN_VERSION GIT_ZY1000_VERSION
67 #define ZYLIN_DATE __DATE__
68 #define ZYLIN_TIME __TIME__
69 #define ZYLIN_OPENOCD GIT_OPENOCD_VERSION
70 #define ZYLIN_OPENOCD_VERSION "ZY1000 " ZYLIN_VERSION " " ZYLIN_DATE
71
72 #endif
73
74 static int zy1000_khz(int khz, int *jtag_speed)
75 {
76 if (khz == 0)
77 {
78 *jtag_speed = 0;
79 }
80 else
81 {
82 *jtag_speed = 64000/khz;
83 }
84 return ERROR_OK;
85 }
86
87 static int zy1000_speed_div(int speed, int *khz)
88 {
89 if (speed == 0)
90 {
91 *khz = 0;
92 }
93 else
94 {
95 *khz = 64000/speed;
96 }
97
98 return ERROR_OK;
99 }
100
101 static bool readPowerDropout(void)
102 {
103 uint32_t state;
104 // sample and clear power dropout
105 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x80);
106 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
107 bool powerDropout;
108 powerDropout = (state & 0x80) != 0;
109 return powerDropout;
110 }
111
112
113 static bool readSRST(void)
114 {
115 uint32_t state;
116 // sample and clear SRST sensing
117 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000040);
118 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
119 bool srstAsserted;
120 srstAsserted = (state & 0x40) != 0;
121 return srstAsserted;
122 }
123
124 static int zy1000_srst_asserted(int *srst_asserted)
125 {
126 *srst_asserted = readSRST();
127 return ERROR_OK;
128 }
129
130 static int zy1000_power_dropout(int *dropout)
131 {
132 *dropout = readPowerDropout();
133 return ERROR_OK;
134 }
135
136 void zy1000_reset(int trst, int srst)
137 {
138 LOG_DEBUG("zy1000 trst=%d, srst=%d", trst, srst);
139
140 /* flush the JTAG FIFO. Not flushing the queue before messing with
141 * reset has such interesting bugs as causing hard to reproduce
142 * RCLK bugs as RCLK will stop responding when TRST is asserted
143 */
144 waitIdle();
145
146 if (!srst)
147 {
148 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000001);
149 }
150 else
151 {
152 /* Danger!!! if clk != 0 when in
153 * idle in TAP_IDLE, reset halt on str912 will fail.
154 */
155 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000001);
156 }
157
158 if (!trst)
159 {
160 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000002);
161 }
162 else
163 {
164 /* assert reset */
165 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000002);
166 }
167
168 if (trst||(srst && (jtag_get_reset_config() & RESET_SRST_PULLS_TRST)))
169 {
170 /* we're now in the RESET state until trst is deasserted */
171 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_RESET);
172 } else
173 {
174 /* We'll get RCLK failure when we assert TRST, so clear any false positives here */
175 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
176 }
177
178 /* wait for srst to float back up */
179 if (!srst)
180 {
181 int i;
182 for (i = 0; i < 1000; i++)
183 {
184 // We don't want to sense our own reset, so we clear here.
185 // There is of course a timing hole where we could loose
186 // a "real" reset.
187 if (!readSRST())
188 break;
189
190 /* wait 1ms */
191 alive_sleep(1);
192 }
193
194 if (i == 1000)
195 {
196 LOG_USER("SRST didn't deassert after %dms", i);
197 } else if (i > 1)
198 {
199 LOG_USER("SRST took %dms to deassert", i);
200 }
201 }
202 }
203
204 int zy1000_speed(int speed)
205 {
206 /* flush JTAG master FIFO before setting speed */
207 waitIdle();
208
209 if (speed == 0)
210 {
211 /*0 means RCLK*/
212 speed = 0;
213 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x100);
214 LOG_DEBUG("jtag_speed using RCLK");
215 }
216 else
217 {
218 if (speed > 8190 || speed < 2)
219 {
220 LOG_USER("valid ZY1000 jtag_speed=[8190,2]. Divisor is 64MHz / even values between 8190-2, i.e. min 7814Hz, max 32MHz");
221 return ERROR_INVALID_ARGUMENTS;
222 }
223
224 LOG_USER("jtag_speed %d => JTAG clk=%f", speed, 64.0/(float)speed);
225 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x100);
226 ZY1000_POKE(ZY1000_JTAG_BASE + 0x1c, speed&~1);
227 }
228 return ERROR_OK;
229 }
230
231 static bool savePower;
232
233
234 static void setPower(bool power)
235 {
236 savePower = power;
237 if (power)
238 {
239 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x8);
240 } else
241 {
242 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x8);
243 }
244 }
245
246 COMMAND_HANDLER(handle_power_command)
247 {
248 switch (CMD_ARGC)
249 {
250 case 1: {
251 bool enable;
252 COMMAND_PARSE_ON_OFF(CMD_ARGV[0], enable);
253 setPower(enable);
254 // fall through
255 }
256 case 0:
257 LOG_INFO("Target power %s", savePower ? "on" : "off");
258 break;
259 default:
260 return ERROR_INVALID_ARGUMENTS;
261 }
262
263 return ERROR_OK;
264 }
265
266 #if !BUILD_ECOSBOARD
267 static char *tcp_server = "notspecified";
268 static int jim_zy1000_server(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
269 {
270 if (argc != 2)
271 return JIM_ERR;
272
273 tcp_server = strdup(Jim_GetString(argv[1], NULL));
274
275 return JIM_OK;
276 }
277 #endif
278
279 #if BUILD_ECOSBOARD
280 /* Give TELNET a way to find out what version this is */
281 static int jim_zy1000_version(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
282 {
283 if ((argc < 1) || (argc > 3))
284 return JIM_ERR;
285 const char *version_str = NULL;
286
287 if (argc == 1)
288 {
289 version_str = ZYLIN_OPENOCD_VERSION;
290 } else
291 {
292 const char *str = Jim_GetString(argv[1], NULL);
293 const char *str2 = NULL;
294 if (argc > 2)
295 str2 = Jim_GetString(argv[2], NULL);
296 if (strcmp("openocd", str) == 0)
297 {
298 version_str = ZYLIN_OPENOCD;
299 }
300 else if (strcmp("zy1000", str) == 0)
301 {
302 version_str = ZYLIN_VERSION;
303 }
304 else if (strcmp("date", str) == 0)
305 {
306 version_str = ZYLIN_DATE;
307 }
308 else if (strcmp("time", str) == 0)
309 {
310 version_str = ZYLIN_TIME;
311 }
312 else if (strcmp("pcb", str) == 0)
313 {
314 #ifdef CYGPKG_HAL_NIOS2
315 version_str="c";
316 #else
317 version_str="b";
318 #endif
319 }
320 #ifdef CYGPKG_HAL_NIOS2
321 else if (strcmp("fpga", str) == 0)
322 {
323
324 /* return a list of 32 bit integers to describe the expected
325 * and actual FPGA
326 */
327 static char *fpga_id = "0x12345678 0x12345678 0x12345678 0x12345678";
328 uint32_t id, timestamp;
329 HAL_READ_UINT32(SYSID_BASE, id);
330 HAL_READ_UINT32(SYSID_BASE+4, timestamp);
331 sprintf(fpga_id, "0x%08x 0x%08x 0x%08x 0x%08x", id, timestamp, SYSID_ID, SYSID_TIMESTAMP);
332 version_str = fpga_id;
333 if ((argc>2) && (strcmp("time", str2) == 0))
334 {
335 time_t last_mod = timestamp;
336 char * t = ctime (&last_mod) ;
337 t[strlen(t)-1] = 0;
338 version_str = t;
339 }
340 }
341 #endif
342
343 else
344 {
345 return JIM_ERR;
346 }
347 }
348
349 Jim_SetResult(interp, Jim_NewStringObj(interp, version_str, -1));
350
351 return JIM_OK;
352 }
353 #endif
354
355 #ifdef CYGPKG_HAL_NIOS2
356
357
358 struct info_forward
359 {
360 void *data;
361 struct cyg_upgrade_info *upgraded_file;
362 };
363
364 static void report_info(void *data, const char * format, va_list args)
365 {
366 char *s = alloc_vprintf(format, args);
367 LOG_USER_N("%s", s);
368 free(s);
369 }
370
371 struct cyg_upgrade_info firmware_info =
372 {
373 (uint8_t *)0x84000000,
374 "/ram/firmware.phi",
375 "Firmware",
376 0x0300000,
377 0x1f00000 -
378 0x0300000,
379 "ZylinNiosFirmware\n",
380 report_info,
381 };
382
383 static int jim_zy1000_writefirmware(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
384 {
385 if (argc != 2)
386 return JIM_ERR;
387
388 int length;
389 const char *str = Jim_GetString(argv[1], &length);
390
391 /* */
392 int tmpFile;
393 if ((tmpFile = open(firmware_info.file, O_RDWR | O_CREAT | O_TRUNC)) <= 0)
394 {
395 return JIM_ERR;
396 }
397 bool success;
398 success = write(tmpFile, str, length) == length;
399 close(tmpFile);
400 if (!success)
401 return JIM_ERR;
402
403 if (!cyg_firmware_upgrade(NULL, firmware_info))
404 return JIM_ERR;
405
406 return JIM_OK;
407 }
408 #endif
409
410 static int
411 zylinjtag_Jim_Command_powerstatus(Jim_Interp *interp,
412 int argc,
413 Jim_Obj * const *argv)
414 {
415 if (argc != 1)
416 {
417 Jim_WrongNumArgs(interp, 1, argv, "powerstatus");
418 return JIM_ERR;
419 }
420
421 uint32_t status;
422 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, status);
423
424 Jim_SetResult(interp, Jim_NewIntObj(interp, (status&0x80) != 0));
425
426 return JIM_OK;
427 }
428
429
430
431 int zy1000_quit(void)
432 {
433
434 return ERROR_OK;
435 }
436
437
438
439 int interface_jtag_execute_queue(void)
440 {
441 uint32_t empty;
442
443 waitIdle();
444 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, empty);
445 /* clear JTAG error register */
446 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
447
448 if ((empty&0x400) != 0)
449 {
450 LOG_WARNING("RCLK timeout");
451 /* the error is informative only as we don't want to break the firmware if there
452 * is a false positive.
453 */
454 // return ERROR_FAIL;
455 }
456 return ERROR_OK;
457 }
458
459
460
461
462
463 static uint32_t getShiftValue(void)
464 {
465 uint32_t value;
466 waitIdle();
467 ZY1000_PEEK(ZY1000_JTAG_BASE + 0xc, value);
468 VERBOSE(LOG_INFO("getShiftValue %08x", value));
469 return value;
470 }
471 #if 0
472 static uint32_t getShiftValueFlip(void)
473 {
474 uint32_t value;
475 waitIdle();
476 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x18, value);
477 VERBOSE(LOG_INFO("getShiftValue %08x (flipped)", value));
478 return value;
479 }
480 #endif
481
482 #if 0
483 static void shiftValueInnerFlip(const tap_state_t state, const tap_state_t endState, int repeat, uint32_t value)
484 {
485 VERBOSE(LOG_INFO("shiftValueInner %s %s %d %08x (flipped)", tap_state_name(state), tap_state_name(endState), repeat, value));
486 uint32_t a,b;
487 a = state;
488 b = endState;
489 ZY1000_POKE(ZY1000_JTAG_BASE + 0xc, value);
490 ZY1000_POKE(ZY1000_JTAG_BASE + 0x8, (1 << 15) | (repeat << 8) | (a << 4) | b);
491 VERBOSE(getShiftValueFlip());
492 }
493 #endif
494
495 // here we shuffle N bits out/in
496 static __inline void scanBits(const uint8_t *out_value, uint8_t *in_value, int num_bits, bool pause, tap_state_t shiftState, tap_state_t end_state)
497 {
498 tap_state_t pause_state = shiftState;
499 for (int j = 0; j < num_bits; j += 32)
500 {
501 int k = num_bits - j;
502 if (k > 32)
503 {
504 k = 32;
505 /* we have more to shift out */
506 } else if (pause)
507 {
508 /* this was the last to shift out this time */
509 pause_state = end_state;
510 }
511
512 // we have (num_bits + 7)/8 bytes of bits to toggle out.
513 // bits are pushed out LSB to MSB
514 uint32_t value;
515 value = 0;
516 if (out_value != NULL)
517 {
518 for (int l = 0; l < k; l += 8)
519 {
520 value|=out_value[(j + l)/8]<<l;
521 }
522 }
523 /* mask away unused bits for easier debugging */
524 if (k < 32)
525 {
526 value&=~(((uint32_t)0xffffffff) << k);
527 } else
528 {
529 /* Shifting by >= 32 is not defined by the C standard
530 * and will in fact shift by &0x1f bits on nios */
531 }
532
533 shiftValueInner(shiftState, pause_state, k, value);
534
535 if (in_value != NULL)
536 {
537 // data in, LSB to MSB
538 value = getShiftValue();
539 // we're shifting in data to MSB, shift data to be aligned for returning the value
540 value >>= 32-k;
541
542 for (int l = 0; l < k; l += 8)
543 {
544 in_value[(j + l)/8]=(value >> l)&0xff;
545 }
546 }
547 }
548 }
549
550 static __inline void scanFields(int num_fields, const struct scan_field *fields, tap_state_t shiftState, tap_state_t end_state)
551 {
552 for (int i = 0; i < num_fields; i++)
553 {
554 scanBits(fields[i].out_value,
555 fields[i].in_value,
556 fields[i].num_bits,
557 (i == num_fields-1),
558 shiftState,
559 end_state);
560 }
561 }
562
563 int interface_jtag_add_ir_scan(struct jtag_tap *active, const struct scan_field *fields, tap_state_t state)
564 {
565 int scan_size = 0;
566 struct jtag_tap *tap, *nextTap;
567 tap_state_t pause_state = TAP_IRSHIFT;
568
569 for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
570 {
571 nextTap = jtag_tap_next_enabled(tap);
572 if (nextTap==NULL)
573 {
574 pause_state = state;
575 }
576 scan_size = tap->ir_length;
577
578 /* search the list */
579 if (tap == active)
580 {
581 scanFields(1, fields, TAP_IRSHIFT, pause_state);
582 /* update device information */
583 buf_cpy(fields[0].out_value, tap->cur_instr, scan_size);
584
585 tap->bypass = 0;
586 } else
587 {
588 /* if a device isn't listed, set it to BYPASS */
589 assert(scan_size <= 32);
590 shiftValueInner(TAP_IRSHIFT, pause_state, scan_size, 0xffffffff);
591
592 tap->bypass = 1;
593 }
594 }
595
596 return ERROR_OK;
597 }
598
599
600
601
602
603 int interface_jtag_add_plain_ir_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits, tap_state_t state)
604 {
605 scanBits(out_bits, in_bits, num_bits, true, TAP_IRSHIFT, state);
606 return ERROR_OK;
607 }
608
609 int interface_jtag_add_dr_scan(struct jtag_tap *active, int num_fields, const struct scan_field *fields, tap_state_t state)
610 {
611 struct jtag_tap *tap, *nextTap;
612 tap_state_t pause_state = TAP_DRSHIFT;
613 for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
614 {
615 nextTap = jtag_tap_next_enabled(tap);
616 if (nextTap==NULL)
617 {
618 pause_state = state;
619 }
620
621 /* Find a range of fields to write to this tap */
622 if (tap == active)
623 {
624 assert(!tap->bypass);
625
626 scanFields(num_fields, fields, TAP_DRSHIFT, pause_state);
627 } else
628 {
629 /* Shift out a 0 for disabled tap's */
630 assert(tap->bypass);
631 shiftValueInner(TAP_DRSHIFT, pause_state, 1, 0);
632 }
633 }
634 return ERROR_OK;
635 }
636
637 int interface_jtag_add_plain_dr_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits, tap_state_t state)
638 {
639 scanBits(out_bits, in_bits, num_bits, true, TAP_DRSHIFT, state);
640 return ERROR_OK;
641 }
642
643 int interface_jtag_add_tlr()
644 {
645 setCurrentState(TAP_RESET);
646 return ERROR_OK;
647 }
648
649
650 int interface_jtag_add_reset(int req_trst, int req_srst)
651 {
652 zy1000_reset(req_trst, req_srst);
653 return ERROR_OK;
654 }
655
656 static int zy1000_jtag_add_clocks(int num_cycles, tap_state_t state, tap_state_t clockstate)
657 {
658 /* num_cycles can be 0 */
659 setCurrentState(clockstate);
660
661 /* execute num_cycles, 32 at the time. */
662 int i;
663 for (i = 0; i < num_cycles; i += 32)
664 {
665 int num;
666 num = 32;
667 if (num_cycles-i < num)
668 {
669 num = num_cycles-i;
670 }
671 shiftValueInner(clockstate, clockstate, num, 0);
672 }
673
674 #if !TEST_MANUAL()
675 /* finish in end_state */
676 setCurrentState(state);
677 #else
678 tap_state_t t = TAP_IDLE;
679 /* test manual drive code on any target */
680 int tms;
681 uint8_t tms_scan = tap_get_tms_path(t, state);
682 int tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
683
684 for (i = 0; i < tms_count; i++)
685 {
686 tms = (tms_scan >> i) & 1;
687 waitIdle();
688 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
689 }
690 waitIdle();
691 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
692 #endif
693
694 return ERROR_OK;
695 }
696
697 int interface_jtag_add_runtest(int num_cycles, tap_state_t state)
698 {
699 return zy1000_jtag_add_clocks(num_cycles, state, TAP_IDLE);
700 }
701
702 int interface_jtag_add_clocks(int num_cycles)
703 {
704 return zy1000_jtag_add_clocks(num_cycles, cmd_queue_cur_state, cmd_queue_cur_state);
705 }
706
707 int interface_add_tms_seq(unsigned num_bits, const uint8_t *seq, enum tap_state state)
708 {
709 /*wait for the fifo to be empty*/
710 waitIdle();
711
712 for (unsigned i = 0; i < num_bits; i++)
713 {
714 int tms;
715
716 if (((seq[i/8] >> (i % 8)) & 1) == 0)
717 {
718 tms = 0;
719 }
720 else
721 {
722 tms = 1;
723 }
724
725 waitIdle();
726 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
727 }
728
729 waitIdle();
730 if (state != TAP_INVALID)
731 {
732 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
733 } else
734 {
735 /* this would be normal if we are switching to SWD mode */
736 }
737 return ERROR_OK;
738 }
739
740 int interface_jtag_add_pathmove(int num_states, const tap_state_t *path)
741 {
742 int state_count;
743 int tms = 0;
744
745 state_count = 0;
746
747 tap_state_t cur_state = cmd_queue_cur_state;
748
749 uint8_t seq[16];
750 memset(seq, 0, sizeof(seq));
751 assert(num_states < (int)((sizeof(seq) * 8)));
752
753 while (num_states)
754 {
755 if (tap_state_transition(cur_state, false) == path[state_count])
756 {
757 tms = 0;
758 }
759 else if (tap_state_transition(cur_state, true) == path[state_count])
760 {
761 tms = 1;
762 }
763 else
764 {
765 LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_name(cur_state), tap_state_name(path[state_count]));
766 exit(-1);
767 }
768
769 seq[state_count/8] = seq[state_count/8] | (tms << (state_count % 8));
770
771 cur_state = path[state_count];
772 state_count++;
773 num_states--;
774 }
775
776 return interface_add_tms_seq(state_count, seq, cur_state);
777 }
778
779 static void jtag_pre_post_bits(struct jtag_tap *tap, int *pre, int *post)
780 {
781 /* bypass bits before and after */
782 int pre_bits = 0;
783 int post_bits = 0;
784
785 bool found = false;
786 struct jtag_tap *cur_tap, *nextTap;
787 for (cur_tap = jtag_tap_next_enabled(NULL); cur_tap!= NULL; cur_tap = nextTap)
788 {
789 nextTap = jtag_tap_next_enabled(cur_tap);
790 if (cur_tap == tap)
791 {
792 found = true;
793 } else
794 {
795 if (found)
796 {
797 post_bits++;
798 } else
799 {
800 pre_bits++;
801 }
802 }
803 }
804 *pre = pre_bits;
805 *post = post_bits;
806 }
807
808 void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, uint8_t *buffer, int little, int count)
809 {
810
811 int pre_bits;
812 int post_bits;
813 jtag_pre_post_bits(tap, &pre_bits, &post_bits);
814
815 if (pre_bits + post_bits + 6 > 32)
816 {
817 int i;
818 for (i = 0; i < count; i++)
819 {
820 embeddedice_write_reg_inner(tap, reg_addr, fast_target_buffer_get_u32(buffer, little));
821 buffer += 4;
822 }
823 } else
824 {
825 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
826 int i;
827 for (i = 0; i < count - 1; i++)
828 {
829 /* Fewer pokes means we get to use the FIFO more efficiently */
830 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, little));
831 shiftValueInner(TAP_DRSHIFT, TAP_IDLE, 6 + post_bits + pre_bits, (reg_addr | (1 << 5)));
832 buffer += 4;
833 }
834 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, little));
835 shiftValueInner(TAP_DRSHIFT, TAP_IDLE, 6 + post_bits, (reg_addr | (1 << 5)));
836 }
837 }
838
839
840
841 int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap * tap, uint32_t opcode, uint32_t * data, size_t count)
842 {
843 #if 0
844 int arm11_run_instr_data_to_core_noack_inner_default(struct jtag_tap * tap, uint32_t opcode, uint32_t * data, size_t count);
845 return arm11_run_instr_data_to_core_noack_inner_default(tap, opcode, data, count);
846 #else
847 static const int bits[] = {32, 2};
848 uint32_t values[] = {0, 0};
849
850 /* FIX!!!!!! the target_write_memory() API started this nasty problem
851 * with unaligned uint32_t * pointers... */
852 const uint8_t *t = (const uint8_t *)data;
853
854
855 /* bypass bits before and after */
856 int pre_bits;
857 int post_bits;
858 jtag_pre_post_bits(tap, &pre_bits, &post_bits);
859
860 bool found = false;
861 struct jtag_tap *cur_tap, *nextTap;
862 for (cur_tap = jtag_tap_next_enabled(NULL); cur_tap!= NULL; cur_tap = nextTap)
863 {
864 nextTap = jtag_tap_next_enabled(cur_tap);
865 if (cur_tap == tap)
866 {
867 found = true;
868 } else
869 {
870 if (found)
871 {
872 post_bits++;
873 } else
874 {
875 pre_bits++;
876 }
877 }
878 }
879
880 post_bits+=2;
881
882
883 while (--count > 0)
884 {
885 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
886
887 uint32_t value;
888 value = *t++;
889 value |= (*t++<<8);
890 value |= (*t++<<16);
891 value |= (*t++<<24);
892
893 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, value);
894 /* minimum 2 bits */
895 shiftValueInner(TAP_DRSHIFT, TAP_DRPAUSE, post_bits, 0);
896
897 #if 1
898 /* copy & paste from arm11_dbgtap.c */
899 //TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
900
901 waitIdle();
902 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
903 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
904 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
905 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
906 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
907 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
908 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
909 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
910 /* we don't have to wait for the queue to empty here. waitIdle(); */
911 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_DRSHIFT);
912 #else
913 static const tap_state_t arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay[] =
914 {
915 TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
916 };
917
918 jtag_add_pathmove(ARRAY_SIZE(arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay),
919 arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay);
920 #endif
921 }
922
923 values[0] = *t++;
924 values[0] |= (*t++<<8);
925 values[0] |= (*t++<<16);
926 values[0] |= (*t++<<24);
927
928 /* This will happen on the last iteration updating the current tap state
929 * so we don't have to track it during the common code path */
930 jtag_add_dr_out(tap,
931 2,
932 bits,
933 values,
934 TAP_IDLE);
935
936 return jtag_execute_queue();
937 #endif
938 }
939
940
941 static const struct command_registration zy1000_commands[] = {
942 {
943 .name = "power",
944 .handler = handle_power_command,
945 .mode = COMMAND_ANY,
946 .help = "Turn power switch to target on/off. "
947 "With no arguments, prints status.",
948 .usage = "('on'|'off)",
949 },
950 #if BUILD_ECOSBOARD
951 {
952 .name = "zy1000_version",
953 .mode = COMMAND_ANY,
954 .jim_handler = jim_zy1000_version,
955 .help = "Print version info for zy1000.",
956 .usage = "['openocd'|'zy1000'|'date'|'time'|'pcb'|'fpga']",
957 },
958 #else
959 {
960 .name = "zy1000_server",
961 .mode = COMMAND_ANY,
962 .jim_handler = jim_zy1000_server,
963 .help = "Tcpip address for ZY1000 server.",
964 .usage = "address",
965 },
966 #endif
967 {
968 .name = "powerstatus",
969 .mode = COMMAND_ANY,
970 .jim_handler = zylinjtag_Jim_Command_powerstatus,
971 .help = "Returns power status of target",
972 },
973 #ifdef CYGPKG_HAL_NIOS2
974 {
975 .name = "updatezy1000firmware",
976 .mode = COMMAND_ANY,
977 .jim_handler = jim_zy1000_writefirmware,
978 .help = "writes firmware to flash",
979 /* .usage = "some_string", */
980 },
981 #endif
982 COMMAND_REGISTRATION_DONE
983 };
984
985
986 static int tcp_ip = -1;
987
988 /* Write large packets if we can */
989 static size_t out_pos;
990 static uint8_t out_buffer[16384];
991 static size_t in_pos;
992 static size_t in_write;
993 static uint8_t in_buffer[16384];
994
995 static bool flush_writes(void)
996 {
997 bool ok = (write(tcp_ip, out_buffer, out_pos) == (int)out_pos);
998 out_pos = 0;
999 return ok;
1000 }
1001
1002 static bool writeLong(uint32_t l)
1003 {
1004 int i;
1005 for (i = 0; i < 4; i++)
1006 {
1007 uint8_t c = (l >> (i*8))&0xff;
1008 out_buffer[out_pos++] = c;
1009 if (out_pos >= sizeof(out_buffer))
1010 {
1011 if (!flush_writes())
1012 {
1013 return false;
1014 }
1015 }
1016 }
1017 return true;
1018 }
1019
1020 static bool readLong(uint32_t *out_data)
1021 {
1022 if (out_pos > 0)
1023 {
1024 if (!flush_writes())
1025 {
1026 return false;
1027 }
1028 }
1029
1030 uint32_t data = 0;
1031 int i;
1032 for (i = 0; i < 4; i++)
1033 {
1034 uint8_t c;
1035 if (in_pos == in_write)
1036 {
1037 /* read more */
1038 int t;
1039 t = read(tcp_ip, in_buffer, sizeof(in_buffer));
1040 if (t < 1)
1041 {
1042 return false;
1043 }
1044 in_write = (size_t) t;
1045 in_pos = 0;
1046 }
1047 c = in_buffer[in_pos++];
1048
1049 data |= (c << (i*8));
1050 }
1051 *out_data = data;
1052 return true;
1053 }
1054
1055 enum ZY1000_CMD
1056 {
1057 ZY1000_CMD_POKE = 0x0,
1058 ZY1000_CMD_PEEK = 0x8,
1059 ZY1000_CMD_SLEEP = 0x1,
1060 };
1061
1062
1063 #if !BUILD_ECOSBOARD
1064
1065 #include <sys/socket.h> /* for socket(), connect(), send(), and recv() */
1066 #include <arpa/inet.h> /* for sockaddr_in and inet_addr() */
1067
1068 /* We initialize this late since we need to know the server address
1069 * first.
1070 */
1071 static void tcpip_open(void)
1072 {
1073 if (tcp_ip >= 0)
1074 return;
1075
1076 struct sockaddr_in echoServAddr; /* Echo server address */
1077
1078 /* Create a reliable, stream socket using TCP */
1079 if ((tcp_ip = socket(PF_INET, SOCK_STREAM, IPPROTO_TCP)) < 0)
1080 {
1081 fprintf(stderr, "Failed to connect to zy1000 server\n");
1082 exit(-1);
1083 }
1084
1085 /* Construct the server address structure */
1086 memset(&echoServAddr, 0, sizeof(echoServAddr)); /* Zero out structure */
1087 echoServAddr.sin_family = AF_INET; /* Internet address family */
1088 echoServAddr.sin_addr.s_addr = inet_addr(tcp_server); /* Server IP address */
1089 echoServAddr.sin_port = htons(7777); /* Server port */
1090
1091 /* Establish the connection to the echo server */
1092 if (connect(tcp_ip, (struct sockaddr *) &echoServAddr, sizeof(echoServAddr)) < 0)
1093 {
1094 fprintf(stderr, "Failed to connect to zy1000 server\n");
1095 exit(-1);
1096 }
1097
1098 int flag = 1;
1099 setsockopt(tcp_ip, /* socket affected */
1100 IPPROTO_TCP, /* set option at TCP level */
1101 TCP_NODELAY, /* name of option */
1102 (char *)&flag, /* the cast is historical cruft */
1103 sizeof(int)); /* length of option value */
1104
1105 }
1106
1107
1108 /* send a poke */
1109 void zy1000_tcpout(uint32_t address, uint32_t data)
1110 {
1111 tcpip_open();
1112 if (!writeLong((ZY1000_CMD_POKE << 24) | address)||
1113 !writeLong(data))
1114 {
1115 fprintf(stderr, "Could not write to zy1000 server\n");
1116 exit(-1);
1117 }
1118 }
1119
1120 uint32_t zy1000_tcpin(uint32_t address)
1121 {
1122 tcpip_open();
1123 uint32_t data;
1124 if (!writeLong((ZY1000_CMD_PEEK << 24) | address)||
1125 !readLong(&data))
1126 {
1127 fprintf(stderr, "Could not read from zy1000 server\n");
1128 exit(-1);
1129 }
1130 return data;
1131 }
1132
1133 int interface_jtag_add_sleep(uint32_t us)
1134 {
1135 tcpip_open();
1136 if (!writeLong((ZY1000_CMD_SLEEP << 24))||
1137 !writeLong(us))
1138 {
1139 fprintf(stderr, "Could not read from zy1000 server\n");
1140 exit(-1);
1141 }
1142 return ERROR_OK;
1143 }
1144
1145
1146 #endif
1147
1148 #if BUILD_ECOSBOARD
1149 static char tcpip_stack[2048];
1150
1151 static cyg_thread tcpip_thread_object;
1152 static cyg_handle_t tcpip_thread_handle;
1153
1154 /* Infinite loop peeking & poking */
1155 static void tcpipserver(void)
1156 {
1157 for (;;)
1158 {
1159 uint32_t address;
1160 if (!readLong(&address))
1161 return;
1162 enum ZY1000_CMD c = (address >> 24) & 0xff;
1163 address &= 0xffffff;
1164 switch (c)
1165 {
1166 case ZY1000_CMD_POKE:
1167 {
1168 uint32_t data;
1169 if (!readLong(&data))
1170 return;
1171 address &= ~0x80000000;
1172 ZY1000_POKE(address + ZY1000_JTAG_BASE, data);
1173 break;
1174 }
1175 case ZY1000_CMD_PEEK:
1176 {
1177 uint32_t data;
1178 ZY1000_PEEK(address + ZY1000_JTAG_BASE, data);
1179 if (!writeLong(data))
1180 return;
1181 break;
1182 }
1183 case ZY1000_CMD_SLEEP:
1184 {
1185 uint32_t data;
1186 if (!readLong(&data))
1187 return;
1188 jtag_sleep(data);
1189 break;
1190 }
1191 default:
1192 return;
1193 }
1194 }
1195 }
1196
1197
1198 static void tcpip_server(cyg_addrword_t data)
1199 {
1200 int so_reuseaddr_option = 1;
1201
1202 int fd;
1203 if ((fd = socket(AF_INET, SOCK_STREAM, 0)) == -1)
1204 {
1205 LOG_ERROR("error creating socket: %s", strerror(errno));
1206 exit(-1);
1207 }
1208
1209 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (void*) &so_reuseaddr_option,
1210 sizeof(int));
1211
1212 struct sockaddr_in sin;
1213 unsigned int address_size;
1214 address_size = sizeof(sin);
1215 memset(&sin, 0, sizeof(sin));
1216 sin.sin_family = AF_INET;
1217 sin.sin_addr.s_addr = INADDR_ANY;
1218 sin.sin_port = htons(7777);
1219
1220 if (bind(fd, (struct sockaddr *) &sin, sizeof(sin)) == -1)
1221 {
1222 LOG_ERROR("couldn't bind to socket: %s", strerror(errno));
1223 exit(-1);
1224 }
1225
1226 if (listen(fd, 1) == -1)
1227 {
1228 LOG_ERROR("couldn't listen on socket: %s", strerror(errno));
1229 exit(-1);
1230 }
1231
1232
1233 for (;;)
1234 {
1235 tcp_ip = accept(fd, (struct sockaddr *) &sin, &address_size);
1236 if (tcp_ip < 0)
1237 {
1238 continue;
1239 }
1240
1241 int flag = 1;
1242 setsockopt(tcp_ip, /* socket affected */
1243 IPPROTO_TCP, /* set option at TCP level */
1244 TCP_NODELAY, /* name of option */
1245 (char *)&flag, /* the cast is historical cruft */
1246 sizeof(int)); /* length of option value */
1247
1248 bool save_poll = jtag_poll_get_enabled();
1249
1250 /* polling will screw up the "connection" */
1251 jtag_poll_set_enabled(false);
1252
1253 tcpipserver();
1254
1255 jtag_poll_set_enabled(save_poll);
1256
1257 close(tcp_ip);
1258
1259 }
1260 close(fd);
1261
1262 }
1263
1264 int interface_jtag_add_sleep(uint32_t us)
1265 {
1266 jtag_sleep(us);
1267 return ERROR_OK;
1268 }
1269
1270 #endif
1271
1272
1273 int zy1000_init(void)
1274 {
1275 #if BUILD_ECOSBOARD
1276 LOG_USER("%s", ZYLIN_OPENOCD_VERSION);
1277 #endif
1278
1279 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x30); // Turn on LED1 & LED2
1280
1281 setPower(true); // on by default
1282
1283
1284 /* deassert resets. Important to avoid infinite loop waiting for SRST to deassert */
1285 zy1000_reset(0, 0);
1286 zy1000_speed(jtag_get_speed());
1287
1288
1289 #if BUILD_ECOSBOARD
1290 cyg_thread_create(1, tcpip_server, (cyg_addrword_t) 0, "tcip/ip server",
1291 (void *) tcpip_stack, sizeof(tcpip_stack),
1292 &tcpip_thread_handle, &tcpip_thread_object);
1293 cyg_thread_resume(tcpip_thread_handle);
1294 #endif
1295
1296 return ERROR_OK;
1297 }
1298
1299
1300
1301 struct jtag_interface zy1000_interface =
1302 {
1303 .name = "ZY1000",
1304 .supported = DEBUG_CAP_TMS_SEQ,
1305 .execute_queue = NULL,
1306 .speed = zy1000_speed,
1307 .commands = zy1000_commands,
1308 .init = zy1000_init,
1309 .quit = zy1000_quit,
1310 .khz = zy1000_khz,
1311 .speed_div = zy1000_speed_div,
1312 .power_dropout = zy1000_power_dropout,
1313 .srst_asserted = zy1000_srst_asserted,
1314 };
1315

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