1 /***************************************************************************
2 * Copyright (C) 2007-2010 by Øyvind Harboe *
4 * This program is free software; you can redistribute it and/or modify *
5 * it under the terms of the GNU General Public License as published by *
6 * the Free Software Foundation; either version 2 of the License, or *
7 * (at your option) any later version. *
9 * This program is distributed in the hope that it will be useful, *
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
12 * GNU General Public License for more details. *
14 * You should have received a copy of the GNU General Public License *
15 * along with this program; if not, write to the *
16 * Free Software Foundation, Inc., *
17 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
18 ***************************************************************************/
20 /* This file supports the zy1000 debugger: http://www.zylin.com/zy1000.html
22 * The zy1000 is a standalone debugger that has a web interface and
23 * requires no drivers on the developer host as all communication
24 * is via TCP/IP. The zy1000 gets it performance(~400-700kBytes/s
25 * DCC downloads @ 16MHz target) as it has an FPGA to hardware
26 * accelerate the JTAG commands, while offering *very* low latency
27 * between OpenOCD and the FPGA registers.
29 * The disadvantage of the zy1000 is that it has a feeble CPU compared to
30 * a PC(ca. 50-500 DMIPS depending on how one counts it), whereas a PC
31 * is on the order of 10000 DMIPS(i.e. at a factor of 20-200).
33 * The zy1000 revc hardware is using an Altera Nios CPU, whereas the
34 * revb is using ARM7 + Xilinx.
36 * See Zylin web pages or contact Zylin for more information.
38 * The reason this code is in OpenOCD rather than OpenOCD linked with the
39 * ZY1000 code is that OpenOCD is the long road towards getting
40 * libopenocd into place. libopenocd will support both low performance,
41 * low latency systems(embedded) and high performance high latency
48 #include <target/embeddedice.h>
49 #include <jtag/minidriver.h>
50 #include <jtag/interface.h>
53 #include <netinet/tcp.h>
56 #include "zy1000_version.h"
58 #include <cyg/hal/hal_io.h> // low level i/o
59 #include <cyg/hal/hal_diag.h>
61 #ifdef CYGPKG_HAL_NIOS2
62 #include <cyg/hal/io.h>
63 #include <cyg/firmwareutil/firmwareutil.h>
66 #define ZYLIN_VERSION GIT_ZY1000_VERSION
67 #define ZYLIN_DATE __DATE__
68 #define ZYLIN_TIME __TIME__
69 #define ZYLIN_OPENOCD GIT_OPENOCD_VERSION
70 #define ZYLIN_OPENOCD_VERSION "ZY1000 " ZYLIN_VERSION " " ZYLIN_DATE
74 static int zy1000_khz(int khz
, int *jtag_speed
)
82 *jtag_speed
= 64000/khz
;
87 static int zy1000_speed_div(int speed
, int *khz
)
101 static bool readPowerDropout(void)
104 // sample and clear power dropout
105 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x80);
106 ZY1000_PEEK(ZY1000_JTAG_BASE
+ 0x10, state
);
108 powerDropout
= (state
& 0x80) != 0;
113 static bool readSRST(void)
116 // sample and clear SRST sensing
117 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x00000040);
118 ZY1000_PEEK(ZY1000_JTAG_BASE
+ 0x10, state
);
120 srstAsserted
= (state
& 0x40) != 0;
124 static int zy1000_srst_asserted(int *srst_asserted
)
126 *srst_asserted
= readSRST();
130 static int zy1000_power_dropout(int *dropout
)
132 *dropout
= readPowerDropout();
136 void zy1000_reset(int trst
, int srst
)
138 LOG_DEBUG("zy1000 trst=%d, srst=%d", trst
, srst
);
140 /* flush the JTAG FIFO. Not flushing the queue before messing with
141 * reset has such interesting bugs as causing hard to reproduce
142 * RCLK bugs as RCLK will stop responding when TRST is asserted
148 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x14, 0x00000001);
152 /* Danger!!! if clk != 0 when in
153 * idle in TAP_IDLE, reset halt on str912 will fail.
155 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x00000001);
160 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x14, 0x00000002);
165 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x00000002);
168 if (trst
||(srst
&& (jtag_get_reset_config() & RESET_SRST_PULLS_TRST
)))
170 /* we're now in the RESET state until trst is deasserted */
171 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x20, TAP_RESET
);
174 /* We'll get RCLK failure when we assert TRST, so clear any false positives here */
175 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x14, 0x400);
178 /* wait for srst to float back up */
182 for (i
= 0; i
< 1000; i
++)
184 // We don't want to sense our own reset, so we clear here.
185 // There is of course a timing hole where we could loose
196 LOG_USER("SRST didn't deassert after %dms", i
);
199 LOG_USER("SRST took %dms to deassert", i
);
204 int zy1000_speed(int speed
)
206 /* flush JTAG master FIFO before setting speed */
213 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x100);
214 LOG_DEBUG("jtag_speed using RCLK");
218 if (speed
> 8190 || speed
< 2)
220 LOG_USER("valid ZY1000 jtag_speed=[8190,2]. Divisor is 64MHz / even values between 8190-2, i.e. min 7814Hz, max 32MHz");
221 return ERROR_INVALID_ARGUMENTS
;
224 LOG_USER("jtag_speed %d => JTAG clk=%f", speed
, 64.0/(float)speed
);
225 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x14, 0x100);
226 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x1c, speed
&~1);
231 static bool savePower
;
234 static void setPower(bool power
)
239 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x14, 0x8);
242 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x8);
246 COMMAND_HANDLER(handle_power_command
)
252 COMMAND_PARSE_ON_OFF(CMD_ARGV
[0], enable
);
257 LOG_INFO("Target power %s", savePower
? "on" : "off");
260 return ERROR_INVALID_ARGUMENTS
;
267 static char *tcp_server
= "notspecified";
268 static int jim_zy1000_server(Jim_Interp
*interp
, int argc
, Jim_Obj
*const *argv
)
273 tcp_server
= strdup(Jim_GetString(argv
[1], NULL
));
280 /* Give TELNET a way to find out what version this is */
281 static int jim_zy1000_version(Jim_Interp
*interp
, int argc
, Jim_Obj
*const *argv
)
283 if ((argc
< 1) || (argc
> 3))
285 const char *version_str
= NULL
;
289 version_str
= ZYLIN_OPENOCD_VERSION
;
292 const char *str
= Jim_GetString(argv
[1], NULL
);
293 const char *str2
= NULL
;
295 str2
= Jim_GetString(argv
[2], NULL
);
296 if (strcmp("openocd", str
) == 0)
298 version_str
= ZYLIN_OPENOCD
;
300 else if (strcmp("zy1000", str
) == 0)
302 version_str
= ZYLIN_VERSION
;
304 else if (strcmp("date", str
) == 0)
306 version_str
= ZYLIN_DATE
;
308 else if (strcmp("time", str
) == 0)
310 version_str
= ZYLIN_TIME
;
312 else if (strcmp("pcb", str
) == 0)
314 #ifdef CYGPKG_HAL_NIOS2
320 #ifdef CYGPKG_HAL_NIOS2
321 else if (strcmp("fpga", str
) == 0)
324 /* return a list of 32 bit integers to describe the expected
327 static char *fpga_id
= "0x12345678 0x12345678 0x12345678 0x12345678";
328 uint32_t id
, timestamp
;
329 HAL_READ_UINT32(SYSID_BASE
, id
);
330 HAL_READ_UINT32(SYSID_BASE
+4, timestamp
);
331 sprintf(fpga_id
, "0x%08x 0x%08x 0x%08x 0x%08x", id
, timestamp
, SYSID_ID
, SYSID_TIMESTAMP
);
332 version_str
= fpga_id
;
333 if ((argc
>2) && (strcmp("time", str2
) == 0))
335 time_t last_mod
= timestamp
;
336 char * t
= ctime (&last_mod
) ;
349 Jim_SetResult(interp
, Jim_NewStringObj(interp
, version_str
, -1));
355 #ifdef CYGPKG_HAL_NIOS2
361 struct cyg_upgrade_info
*upgraded_file
;
364 static void report_info(void *data
, const char * format
, va_list args
)
366 char *s
= alloc_vprintf(format
, args
);
371 struct cyg_upgrade_info firmware_info
=
373 (uint8_t *)0x84000000,
379 "ZylinNiosFirmware\n",
383 static int jim_zy1000_writefirmware(Jim_Interp
*interp
, int argc
, Jim_Obj
*const *argv
)
389 const char *str
= Jim_GetString(argv
[1], &length
);
393 if ((tmpFile
= open(firmware_info
.file
, O_RDWR
| O_CREAT
| O_TRUNC
)) <= 0)
398 success
= write(tmpFile
, str
, length
) == length
;
403 if (!cyg_firmware_upgrade(NULL
, firmware_info
))
411 zylinjtag_Jim_Command_powerstatus(Jim_Interp
*interp
,
413 Jim_Obj
* const *argv
)
417 Jim_WrongNumArgs(interp
, 1, argv
, "powerstatus");
422 ZY1000_PEEK(ZY1000_JTAG_BASE
+ 0x10, status
);
424 Jim_SetResult(interp
, Jim_NewIntObj(interp
, (status
&0x80) != 0));
431 int zy1000_quit(void)
439 int interface_jtag_execute_queue(void)
444 ZY1000_PEEK(ZY1000_JTAG_BASE
+ 0x10, empty
);
445 /* clear JTAG error register */
446 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x14, 0x400);
448 if ((empty
&0x400) != 0)
450 LOG_WARNING("RCLK timeout");
451 /* the error is informative only as we don't want to break the firmware if there
452 * is a false positive.
454 // return ERROR_FAIL;
463 static uint32_t getShiftValue(void)
467 ZY1000_PEEK(ZY1000_JTAG_BASE
+ 0xc, value
);
468 VERBOSE(LOG_INFO("getShiftValue %08x", value
));
472 static uint32_t getShiftValueFlip(void)
476 ZY1000_PEEK(ZY1000_JTAG_BASE
+ 0x18, value
);
477 VERBOSE(LOG_INFO("getShiftValue %08x (flipped)", value
));
483 static void shiftValueInnerFlip(const tap_state_t state
, const tap_state_t endState
, int repeat
, uint32_t value
)
485 VERBOSE(LOG_INFO("shiftValueInner %s %s %d %08x (flipped)", tap_state_name(state
), tap_state_name(endState
), repeat
, value
));
489 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0xc, value
);
490 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x8, (1 << 15) | (repeat
<< 8) | (a
<< 4) | b
);
491 VERBOSE(getShiftValueFlip());
495 // here we shuffle N bits out/in
496 static __inline
void scanBits(const uint8_t *out_value
, uint8_t *in_value
, int num_bits
, bool pause
, tap_state_t shiftState
, tap_state_t end_state
)
498 tap_state_t pause_state
= shiftState
;
499 for (int j
= 0; j
< num_bits
; j
+= 32)
501 int k
= num_bits
- j
;
505 /* we have more to shift out */
508 /* this was the last to shift out this time */
509 pause_state
= end_state
;
512 // we have (num_bits + 7)/8 bytes of bits to toggle out.
513 // bits are pushed out LSB to MSB
516 if (out_value
!= NULL
)
518 for (int l
= 0; l
< k
; l
+= 8)
520 value
|=out_value
[(j
+ l
)/8]<<l
;
523 /* mask away unused bits for easier debugging */
526 value
&=~(((uint32_t)0xffffffff) << k
);
529 /* Shifting by >= 32 is not defined by the C standard
530 * and will in fact shift by &0x1f bits on nios */
533 shiftValueInner(shiftState
, pause_state
, k
, value
);
535 if (in_value
!= NULL
)
537 // data in, LSB to MSB
538 value
= getShiftValue();
539 // we're shifting in data to MSB, shift data to be aligned for returning the value
542 for (int l
= 0; l
< k
; l
+= 8)
544 in_value
[(j
+ l
)/8]=(value
>> l
)&0xff;
550 static __inline
void scanFields(int num_fields
, const struct scan_field
*fields
, tap_state_t shiftState
, tap_state_t end_state
)
552 for (int i
= 0; i
< num_fields
; i
++)
554 scanBits(fields
[i
].out_value
,
563 int interface_jtag_add_ir_scan(struct jtag_tap
*active
, const struct scan_field
*fields
, tap_state_t state
)
566 struct jtag_tap
*tap
, *nextTap
;
567 tap_state_t pause_state
= TAP_IRSHIFT
;
569 for (tap
= jtag_tap_next_enabled(NULL
); tap
!= NULL
; tap
= nextTap
)
571 nextTap
= jtag_tap_next_enabled(tap
);
576 scan_size
= tap
->ir_length
;
578 /* search the list */
581 scanFields(1, fields
, TAP_IRSHIFT
, pause_state
);
582 /* update device information */
583 buf_cpy(fields
[0].out_value
, tap
->cur_instr
, scan_size
);
588 /* if a device isn't listed, set it to BYPASS */
589 assert(scan_size
<= 32);
590 shiftValueInner(TAP_IRSHIFT
, pause_state
, scan_size
, 0xffffffff);
603 int interface_jtag_add_plain_ir_scan(int num_bits
, const uint8_t *out_bits
, uint8_t *in_bits
, tap_state_t state
)
605 scanBits(out_bits
, in_bits
, num_bits
, true, TAP_IRSHIFT
, state
);
609 int interface_jtag_add_dr_scan(struct jtag_tap
*active
, int num_fields
, const struct scan_field
*fields
, tap_state_t state
)
611 struct jtag_tap
*tap
, *nextTap
;
612 tap_state_t pause_state
= TAP_DRSHIFT
;
613 for (tap
= jtag_tap_next_enabled(NULL
); tap
!= NULL
; tap
= nextTap
)
615 nextTap
= jtag_tap_next_enabled(tap
);
621 /* Find a range of fields to write to this tap */
624 assert(!tap
->bypass
);
626 scanFields(num_fields
, fields
, TAP_DRSHIFT
, pause_state
);
629 /* Shift out a 0 for disabled tap's */
631 shiftValueInner(TAP_DRSHIFT
, pause_state
, 1, 0);
637 int interface_jtag_add_plain_dr_scan(int num_bits
, const uint8_t *out_bits
, uint8_t *in_bits
, tap_state_t state
)
639 scanBits(out_bits
, in_bits
, num_bits
, true, TAP_DRSHIFT
, state
);
643 int interface_jtag_add_tlr()
645 setCurrentState(TAP_RESET
);
650 int interface_jtag_add_reset(int req_trst
, int req_srst
)
652 zy1000_reset(req_trst
, req_srst
);
656 static int zy1000_jtag_add_clocks(int num_cycles
, tap_state_t state
, tap_state_t clockstate
)
658 /* num_cycles can be 0 */
659 setCurrentState(clockstate
);
661 /* execute num_cycles, 32 at the time. */
663 for (i
= 0; i
< num_cycles
; i
+= 32)
667 if (num_cycles
-i
< num
)
671 shiftValueInner(clockstate
, clockstate
, num
, 0);
675 /* finish in end_state */
676 setCurrentState(state
);
678 tap_state_t t
= TAP_IDLE
;
679 /* test manual drive code on any target */
681 uint8_t tms_scan
= tap_get_tms_path(t
, state
);
682 int tms_count
= tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
684 for (i
= 0; i
< tms_count
; i
++)
686 tms
= (tms_scan
>> i
) & 1;
688 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, tms
);
691 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x20, state
);
697 int interface_jtag_add_runtest(int num_cycles
, tap_state_t state
)
699 return zy1000_jtag_add_clocks(num_cycles
, state
, TAP_IDLE
);
702 int interface_jtag_add_clocks(int num_cycles
)
704 return zy1000_jtag_add_clocks(num_cycles
, cmd_queue_cur_state
, cmd_queue_cur_state
);
707 int interface_add_tms_seq(unsigned num_bits
, const uint8_t *seq
, enum tap_state state
)
709 /*wait for the fifo to be empty*/
712 for (unsigned i
= 0; i
< num_bits
; i
++)
716 if (((seq
[i
/8] >> (i
% 8)) & 1) == 0)
726 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, tms
);
730 if (state
!= TAP_INVALID
)
732 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x20, state
);
735 /* this would be normal if we are switching to SWD mode */
740 int interface_jtag_add_pathmove(int num_states
, const tap_state_t
*path
)
747 tap_state_t cur_state
= cmd_queue_cur_state
;
750 memset(seq
, 0, sizeof(seq
));
751 assert(num_states
< (int)((sizeof(seq
) * 8)));
755 if (tap_state_transition(cur_state
, false) == path
[state_count
])
759 else if (tap_state_transition(cur_state
, true) == path
[state_count
])
765 LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_name(cur_state
), tap_state_name(path
[state_count
]));
769 seq
[state_count
/8] = seq
[state_count
/8] | (tms
<< (state_count
% 8));
771 cur_state
= path
[state_count
];
776 return interface_add_tms_seq(state_count
, seq
, cur_state
);
779 static void jtag_pre_post_bits(struct jtag_tap
*tap
, int *pre
, int *post
)
781 /* bypass bits before and after */
786 struct jtag_tap
*cur_tap
, *nextTap
;
787 for (cur_tap
= jtag_tap_next_enabled(NULL
); cur_tap
!= NULL
; cur_tap
= nextTap
)
789 nextTap
= jtag_tap_next_enabled(cur_tap
);
808 void embeddedice_write_dcc(struct jtag_tap
*tap
, int reg_addr
, uint8_t *buffer
, int little
, int count
)
813 jtag_pre_post_bits(tap
, &pre_bits
, &post_bits
);
815 if (pre_bits
+ post_bits
+ 6 > 32)
818 for (i
= 0; i
< count
; i
++)
820 embeddedice_write_reg_inner(tap
, reg_addr
, fast_target_buffer_get_u32(buffer
, little
));
825 shiftValueInner(TAP_DRSHIFT
, TAP_DRSHIFT
, pre_bits
, 0);
827 for (i
= 0; i
< count
- 1; i
++)
829 /* Fewer pokes means we get to use the FIFO more efficiently */
830 shiftValueInner(TAP_DRSHIFT
, TAP_DRSHIFT
, 32, fast_target_buffer_get_u32(buffer
, little
));
831 shiftValueInner(TAP_DRSHIFT
, TAP_IDLE
, 6 + post_bits
+ pre_bits
, (reg_addr
| (1 << 5)));
834 shiftValueInner(TAP_DRSHIFT
, TAP_DRSHIFT
, 32, fast_target_buffer_get_u32(buffer
, little
));
835 shiftValueInner(TAP_DRSHIFT
, TAP_IDLE
, 6 + post_bits
, (reg_addr
| (1 << 5)));
841 int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap
* tap
, uint32_t opcode
, uint32_t * data
, size_t count
)
844 int arm11_run_instr_data_to_core_noack_inner_default(struct jtag_tap
* tap
, uint32_t opcode
, uint32_t * data
, size_t count
);
845 return arm11_run_instr_data_to_core_noack_inner_default(tap
, opcode
, data
, count
);
847 static const int bits
[] = {32, 2};
848 uint32_t values
[] = {0, 0};
850 /* FIX!!!!!! the target_write_memory() API started this nasty problem
851 * with unaligned uint32_t * pointers... */
852 const uint8_t *t
= (const uint8_t *)data
;
855 /* bypass bits before and after */
858 jtag_pre_post_bits(tap
, &pre_bits
, &post_bits
);
861 struct jtag_tap
*cur_tap
, *nextTap
;
862 for (cur_tap
= jtag_tap_next_enabled(NULL
); cur_tap
!= NULL
; cur_tap
= nextTap
)
864 nextTap
= jtag_tap_next_enabled(cur_tap
);
885 shiftValueInner(TAP_DRSHIFT
, TAP_DRSHIFT
, pre_bits
, 0);
893 shiftValueInner(TAP_DRSHIFT
, TAP_DRSHIFT
, 32, value
);
895 shiftValueInner(TAP_DRSHIFT
, TAP_DRPAUSE
, post_bits
, 0);
898 /* copy & paste from arm11_dbgtap.c */
899 //TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
902 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 1);
903 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 1);
904 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 0);
905 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 0);
906 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 0);
907 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 1);
908 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 0);
909 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 0);
910 /* we don't have to wait for the queue to empty here. waitIdle(); */
911 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x20, TAP_DRSHIFT
);
913 static const tap_state_t arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay
[] =
915 TAP_DREXIT2
, TAP_DRUPDATE
, TAP_IDLE
, TAP_IDLE
, TAP_IDLE
, TAP_DRSELECT
, TAP_DRCAPTURE
, TAP_DRSHIFT
918 jtag_add_pathmove(ARRAY_SIZE(arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay
),
919 arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay
);
924 values
[0] |= (*t
++<<8);
925 values
[0] |= (*t
++<<16);
926 values
[0] |= (*t
++<<24);
928 /* This will happen on the last iteration updating the current tap state
929 * so we don't have to track it during the common code path */
936 return jtag_execute_queue();
941 static const struct command_registration zy1000_commands
[] = {
944 .handler
= handle_power_command
,
946 .help
= "Turn power switch to target on/off. "
947 "With no arguments, prints status.",
948 .usage
= "('on'|'off)",
952 .name
= "zy1000_version",
954 .jim_handler
= jim_zy1000_version
,
955 .help
= "Print version info for zy1000.",
956 .usage
= "['openocd'|'zy1000'|'date'|'time'|'pcb'|'fpga']",
960 .name
= "zy1000_server",
962 .jim_handler
= jim_zy1000_server
,
963 .help
= "Tcpip address for ZY1000 server.",
968 .name
= "powerstatus",
970 .jim_handler
= zylinjtag_Jim_Command_powerstatus
,
971 .help
= "Returns power status of target",
973 #ifdef CYGPKG_HAL_NIOS2
975 .name
= "updatezy1000firmware",
977 .jim_handler
= jim_zy1000_writefirmware
,
978 .help
= "writes firmware to flash",
979 /* .usage = "some_string", */
982 COMMAND_REGISTRATION_DONE
986 static int tcp_ip
= -1;
988 /* Write large packets if we can */
989 static size_t out_pos
;
990 static uint8_t out_buffer
[16384];
991 static size_t in_pos
;
992 static size_t in_write
;
993 static uint8_t in_buffer
[16384];
995 static bool flush_writes(void)
997 bool ok
= (write(tcp_ip
, out_buffer
, out_pos
) == (int)out_pos
);
1002 static bool writeLong(uint32_t l
)
1005 for (i
= 0; i
< 4; i
++)
1007 uint8_t c
= (l
>> (i
*8))&0xff;
1008 out_buffer
[out_pos
++] = c
;
1009 if (out_pos
>= sizeof(out_buffer
))
1011 if (!flush_writes())
1020 static bool readLong(uint32_t *out_data
)
1024 if (!flush_writes())
1032 for (i
= 0; i
< 4; i
++)
1035 if (in_pos
== in_write
)
1039 t
= read(tcp_ip
, in_buffer
, sizeof(in_buffer
));
1044 in_write
= (size_t) t
;
1047 c
= in_buffer
[in_pos
++];
1049 data
|= (c
<< (i
*8));
1057 ZY1000_CMD_POKE
= 0x0,
1058 ZY1000_CMD_PEEK
= 0x8,
1059 ZY1000_CMD_SLEEP
= 0x1,
1063 #if !BUILD_ECOSBOARD
1065 #include <sys/socket.h> /* for socket(), connect(), send(), and recv() */
1066 #include <arpa/inet.h> /* for sockaddr_in and inet_addr() */
1068 /* We initialize this late since we need to know the server address
1071 static void tcpip_open(void)
1076 struct sockaddr_in echoServAddr
; /* Echo server address */
1078 /* Create a reliable, stream socket using TCP */
1079 if ((tcp_ip
= socket(PF_INET
, SOCK_STREAM
, IPPROTO_TCP
)) < 0)
1081 fprintf(stderr
, "Failed to connect to zy1000 server\n");
1085 /* Construct the server address structure */
1086 memset(&echoServAddr
, 0, sizeof(echoServAddr
)); /* Zero out structure */
1087 echoServAddr
.sin_family
= AF_INET
; /* Internet address family */
1088 echoServAddr
.sin_addr
.s_addr
= inet_addr(tcp_server
); /* Server IP address */
1089 echoServAddr
.sin_port
= htons(7777); /* Server port */
1091 /* Establish the connection to the echo server */
1092 if (connect(tcp_ip
, (struct sockaddr
*) &echoServAddr
, sizeof(echoServAddr
)) < 0)
1094 fprintf(stderr
, "Failed to connect to zy1000 server\n");
1099 setsockopt(tcp_ip
, /* socket affected */
1100 IPPROTO_TCP
, /* set option at TCP level */
1101 TCP_NODELAY
, /* name of option */
1102 (char *)&flag
, /* the cast is historical cruft */
1103 sizeof(int)); /* length of option value */
1109 void zy1000_tcpout(uint32_t address
, uint32_t data
)
1112 if (!writeLong((ZY1000_CMD_POKE
<< 24) | address
)||
1115 fprintf(stderr
, "Could not write to zy1000 server\n");
1120 uint32_t zy1000_tcpin(uint32_t address
)
1124 if (!writeLong((ZY1000_CMD_PEEK
<< 24) | address
)||
1127 fprintf(stderr
, "Could not read from zy1000 server\n");
1133 int interface_jtag_add_sleep(uint32_t us
)
1136 if (!writeLong((ZY1000_CMD_SLEEP
<< 24))||
1139 fprintf(stderr
, "Could not read from zy1000 server\n");
1149 static char tcpip_stack
[2048];
1151 static cyg_thread tcpip_thread_object
;
1152 static cyg_handle_t tcpip_thread_handle
;
1154 /* Infinite loop peeking & poking */
1155 static void tcpipserver(void)
1160 if (!readLong(&address
))
1162 enum ZY1000_CMD c
= (address
>> 24) & 0xff;
1163 address
&= 0xffffff;
1166 case ZY1000_CMD_POKE
:
1169 if (!readLong(&data
))
1171 address
&= ~0x80000000;
1172 ZY1000_POKE(address
+ ZY1000_JTAG_BASE
, data
);
1175 case ZY1000_CMD_PEEK
:
1178 ZY1000_PEEK(address
+ ZY1000_JTAG_BASE
, data
);
1179 if (!writeLong(data
))
1183 case ZY1000_CMD_SLEEP
:
1186 if (!readLong(&data
))
1198 static void tcpip_server(cyg_addrword_t data
)
1200 int so_reuseaddr_option
= 1;
1203 if ((fd
= socket(AF_INET
, SOCK_STREAM
, 0)) == -1)
1205 LOG_ERROR("error creating socket: %s", strerror(errno
));
1209 setsockopt(fd
, SOL_SOCKET
, SO_REUSEADDR
, (void*) &so_reuseaddr_option
,
1212 struct sockaddr_in sin
;
1213 unsigned int address_size
;
1214 address_size
= sizeof(sin
);
1215 memset(&sin
, 0, sizeof(sin
));
1216 sin
.sin_family
= AF_INET
;
1217 sin
.sin_addr
.s_addr
= INADDR_ANY
;
1218 sin
.sin_port
= htons(7777);
1220 if (bind(fd
, (struct sockaddr
*) &sin
, sizeof(sin
)) == -1)
1222 LOG_ERROR("couldn't bind to socket: %s", strerror(errno
));
1226 if (listen(fd
, 1) == -1)
1228 LOG_ERROR("couldn't listen on socket: %s", strerror(errno
));
1235 tcp_ip
= accept(fd
, (struct sockaddr
*) &sin
, &address_size
);
1242 setsockopt(tcp_ip
, /* socket affected */
1243 IPPROTO_TCP
, /* set option at TCP level */
1244 TCP_NODELAY
, /* name of option */
1245 (char *)&flag
, /* the cast is historical cruft */
1246 sizeof(int)); /* length of option value */
1248 bool save_poll
= jtag_poll_get_enabled();
1250 /* polling will screw up the "connection" */
1251 jtag_poll_set_enabled(false);
1255 jtag_poll_set_enabled(save_poll
);
1264 int interface_jtag_add_sleep(uint32_t us
)
1273 int zy1000_init(void)
1276 LOG_USER("%s", ZYLIN_OPENOCD_VERSION
);
1279 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x30); // Turn on LED1 & LED2
1281 setPower(true); // on by default
1284 /* deassert resets. Important to avoid infinite loop waiting for SRST to deassert */
1286 zy1000_speed(jtag_get_speed());
1290 cyg_thread_create(1, tcpip_server
, (cyg_addrword_t
) 0, "tcip/ip server",
1291 (void *) tcpip_stack
, sizeof(tcpip_stack
),
1292 &tcpip_thread_handle
, &tcpip_thread_object
);
1293 cyg_thread_resume(tcpip_thread_handle
);
1301 struct jtag_interface zy1000_interface
=
1304 .supported
= DEBUG_CAP_TMS_SEQ
,
1305 .execute_queue
= NULL
,
1306 .speed
= zy1000_speed
,
1307 .commands
= zy1000_commands
,
1308 .init
= zy1000_init
,
1309 .quit
= zy1000_quit
,
1311 .speed_div
= zy1000_speed_div
,
1312 .power_dropout
= zy1000_power_dropout
,
1313 .srst_asserted
= zy1000_srst_asserted
,
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