Add RISC-V support.
[openocd.git] / src / target / Makefile.am
1 if OOCD_TRACE
2 OOCD_TRACE_FILES = %D%/oocd_trace.c
3 else
4 OOCD_TRACE_FILES =
5 endif
6
7 %C%_libtarget_la_LIBADD = %D%/openrisc/libopenrisc.la \
8 %D%/riscv/libriscv.la
9
10
11 STARTUP_TCL_SRCS += %D%/startup.tcl
12
13 noinst_LTLIBRARIES += %D%/libtarget.la
14 %C%_libtarget_la_SOURCES = \
15 $(TARGET_CORE_SRC) \
16 $(ARM_DEBUG_SRC) \
17 $(ARMV4_5_SRC) \
18 $(ARMV6_SRC) \
19 $(ARMV7_SRC) \
20 $(ARM_MISC_SRC) \
21 $(AVR32_SRC) \
22 $(MIPS32_SRC) \
23 $(NDS32_SRC) \
24 $(STM8_SRC) \
25 $(INTEL_IA32_SRC) \
26 %D%/avrt.c \
27 %D%/dsp563xx.c \
28 %D%/dsp563xx_once.c \
29 %D%/dsp5680xx.c \
30 %D%/hla_target.c
31
32 if TARGET64
33 %C%_libtarget_la_SOURCES +=$(ARMV8_SRC)
34 endif
35
36 TARGET_CORE_SRC = \
37 %D%/algorithm.c \
38 %D%/register.c \
39 %D%/image.c \
40 %D%/breakpoints.c \
41 %D%/target.c \
42 %D%/target_request.c \
43 %D%/testee.c \
44 %D%/semihosting_common.c \
45 %D%/smp.c
46
47 ARMV4_5_SRC = \
48 %D%/armv4_5.c \
49 %D%/armv4_5_mmu.c \
50 %D%/armv4_5_cache.c \
51 $(ARM7_9_SRC)
52
53 ARM7_9_SRC = \
54 %D%/arm7_9_common.c \
55 %D%/arm7tdmi.c \
56 %D%/arm720t.c \
57 %D%/arm9tdmi.c \
58 %D%/arm920t.c \
59 %D%/arm966e.c \
60 %D%/arm946e.c \
61 %D%/arm926ejs.c \
62 %D%/feroceon.c
63
64 ARM_MISC_SRC = \
65 %D%/fa526.c \
66 %D%/xscale.c
67
68 ARMV6_SRC = \
69 %D%/arm11.c \
70 %D%/arm11_dbgtap.c
71
72 ARMV7_SRC = \
73 %D%/armv7m.c \
74 %D%/armv7m_trace.c \
75 %D%/cortex_m.c \
76 %D%/armv7a.c \
77 %D%/cortex_a.c \
78 %D%/ls1_sap.c
79
80 ARMV8_SRC = \
81 %D%/armv8_dpm.c \
82 %D%/armv8_opcodes.c \
83 %D%/aarch64.c \
84 %D%/armv8.c \
85 %D%/armv8_cache.c
86
87 ARM_DEBUG_SRC = \
88 %D%/arm_dpm.c \
89 %D%/arm_jtag.c \
90 %D%/arm_disassembler.c \
91 %D%/arm_simulator.c \
92 %D%/arm_semihosting.c \
93 %D%/arm_adi_v5.c \
94 %D%/arm_dap.c \
95 %D%/armv7a_cache.c \
96 %D%/armv7a_cache_l2x.c \
97 %D%/adi_v5_jtag.c \
98 %D%/adi_v5_swd.c \
99 %D%/embeddedice.c \
100 %D%/trace.c \
101 %D%/etb.c \
102 %D%/etm.c \
103 $(OOCD_TRACE_FILES) \
104 %D%/etm_dummy.c \
105 %D%/arm_cti.c
106
107 AVR32_SRC = \
108 %D%/avr32_ap7k.c \
109 %D%/avr32_jtag.c \
110 %D%/avr32_mem.c \
111 %D%/avr32_regs.c
112
113 MIPS32_SRC = \
114 %D%/mips32.c \
115 %D%/mips_m4k.c \
116 %D%/mips32_pracc.c \
117 %D%/mips32_dmaacc.c \
118 %D%/mips_ejtag.c
119
120 NDS32_SRC = \
121 %D%/nds32.c \
122 %D%/nds32_reg.c \
123 %D%/nds32_cmd.c \
124 %D%/nds32_disassembler.c \
125 %D%/nds32_tlb.c \
126 %D%/nds32_v2.c \
127 %D%/nds32_v3_common.c \
128 %D%/nds32_v3.c \
129 %D%/nds32_v3m.c \
130 %D%/nds32_aice.c
131
132 STM8_SRC = \
133 %D%/stm8.c
134
135 INTEL_IA32_SRC = \
136 %D%/quark_x10xx.c \
137 %D%/quark_d20xx.c \
138 %D%/lakemont.c \
139 %D%/x86_32_common.c
140
141 %C%_libtarget_la_SOURCES += \
142 %D%/algorithm.h \
143 %D%/arm.h \
144 %D%/arm_dpm.h \
145 %D%/arm_jtag.h \
146 %D%/arm_adi_v5.h \
147 %D%/armv7a_cache.h \
148 %D%/armv7a_cache_l2x.h \
149 %D%/arm_disassembler.h \
150 %D%/arm_opcodes.h \
151 %D%/arm_simulator.h \
152 %D%/arm_semihosting.h \
153 %D%/arm7_9_common.h \
154 %D%/arm7tdmi.h \
155 %D%/arm720t.h \
156 %D%/arm9tdmi.h \
157 %D%/arm920t.h \
158 %D%/arm926ejs.h \
159 %D%/arm966e.h \
160 %D%/arm946e.h \
161 %D%/arm11.h \
162 %D%/arm11_dbgtap.h \
163 %D%/armv4_5.h \
164 %D%/armv4_5_mmu.h \
165 %D%/armv4_5_cache.h \
166 %D%/armv7a.h \
167 %D%/armv7m.h \
168 %D%/armv7m_trace.h \
169 %D%/armv8.h \
170 %D%/armv8_dpm.h \
171 %D%/armv8_opcodes.h \
172 %D%/armv8_cache.h \
173 %D%/avrt.h \
174 %D%/dsp563xx.h \
175 %D%/dsp563xx_once.h \
176 %D%/dsp5680xx.h \
177 %D%/breakpoints.h \
178 %D%/cortex_m.h \
179 %D%/cortex_a.h \
180 %D%/aarch64.h \
181 %D%/embeddedice.h \
182 %D%/etb.h \
183 %D%/etm.h \
184 %D%/etm_dummy.h \
185 %D%/image.h \
186 %D%/mips32.h \
187 %D%/mips_m4k.h \
188 %D%/mips_ejtag.h \
189 %D%/mips32_pracc.h \
190 %D%/mips32_dmaacc.h \
191 %D%/oocd_trace.h \
192 %D%/register.h \
193 %D%/target.h \
194 %D%/target_type.h \
195 %D%/trace.h \
196 %D%/target_request.h \
197 %D%/trace.h \
198 %D%/xscale.h \
199 %D%/smp.h \
200 %D%/avr32_ap7k.h \
201 %D%/avr32_jtag.h \
202 %D%/avr32_mem.h \
203 %D%/avr32_regs.h \
204 %D%/nds32.h \
205 %D%/nds32_cmd.h \
206 %D%/nds32_disassembler.h \
207 %D%/nds32_edm.h \
208 %D%/nds32_insn.h \
209 %D%/nds32_reg.h \
210 %D%/nds32_tlb.h \
211 %D%/nds32_v2.h \
212 %D%/nds32_v3_common.h \
213 %D%/nds32_v3.h \
214 %D%/nds32_v3m.h \
215 %D%/nds32_aice.h \
216 %D%/semihosting_common.h \
217 %D%/stm8.h \
218 %D%/lakemont.h \
219 %D%/x86_32_common.h \
220 %D%/arm_cti.h
221
222 include %D%/openrisc/Makefile.am
223 include %D%/riscv/Makefile.am

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