1 /***************************************************************************
2 * Copyright (C) 2013 by mike brown *
3 * mike@theshedworks.org.uk *
5 * Copyright (C) 2013 by Spencer Oliver *
6 * spen@spen-soft.co.uk *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
22 ***************************************************************************/
26 * Utilities to support ARM "CMSIS-DAP", The CoreSight Debug Access Port.
27 * This is coupled to recent versions of ARM's "CoreSight" debug framework.
28 * This specific code is a transport level interface, with
29 * "target/arm_adi_v5.[hc]" code understanding operation semantics,
30 * shared with the SWD & JTAG transports.
38 #include "arm_adi_v5.h"
39 #include <helper/time_support.h>
41 #include <transport/transport.h>
42 #include <jtag/interface.h>
46 #define CMSIS_CMD_DP (0 << 0) /* set only for AP access */
47 #define CMSIS_CMD_AP (1 << 0) /* set only for AP access */
48 #define CMSIS_CMD_READ (1 << 1) /* set only for read access */
49 #define CMSIS_CMD_WRITE (0 << 1) /* set only for read access */
50 #define CMSIS_CMD_A32(n) ((n)&0x0C) /* bits A[3:2] of register addr */
51 #define CMSIS_CMD_VAL_MATCH (1 << 4) /* Value Match */
52 #define CMSIS_CMD_MATCH_MSK (1 << 5) /* Match Mask */
54 /* YUK! - but this is currently a global.... */
55 extern struct jtag_interface
*jtag_interface
;
57 static int cmsis_dap_clear_sticky_errors(struct adiv5_dap
*dap
)
61 const struct swd_driver
*swd
= jtag_interface
->swd
;
64 return swd
->write_reg(swd_cmd(false, false, DP_ABORT
),
65 STKCMPCLR
| STKERRCLR
| WDERRCLR
| ORUNERRCLR
);
68 static int cmsis_dap_queue_ap_abort(struct adiv5_dap
*dap
, uint8_t *ack
)
72 const struct swd_driver
*swd
= jtag_interface
->swd
;
75 return swd
->write_reg(swd_cmd(false, false, DP_ABORT
),
76 DAPABORT
| STKCMPCLR
| STKERRCLR
| WDERRCLR
| ORUNERRCLR
);
79 static int cmsis_dap_queue_dp_read(struct adiv5_dap
*dap
, unsigned reg
, uint32_t *data
)
81 LOG_DEBUG("reg = %d", reg
);
83 int retval
= jtag_interface
->swd
->read_reg(
84 (CMSIS_CMD_DP
| CMSIS_CMD_READ
| CMSIS_CMD_A32(reg
)), data
);
86 if (retval
!= ERROR_OK
)
87 cmsis_dap_clear_sticky_errors(dap
);
92 static int (cmsis_dap_queue_dp_write
)(struct adiv5_dap
*dap
, unsigned reg
, uint32_t data
)
94 LOG_DEBUG("reg = %d, data = 0x%08" PRIx32
, reg
, data
);
96 /* setting the ORUNDETECT bit causes issues for some targets,
97 * disable until we find out why */
98 if (reg
== DP_CTRL_STAT
) {
99 LOG_DEBUG("disabling overrun detection");
100 data
&= ~CORUNDETECT
;
103 int retval
= jtag_interface
->swd
->write_reg(
104 (CMSIS_CMD_DP
| CMSIS_CMD_WRITE
| CMSIS_CMD_A32(reg
)), data
);
106 if (retval
!= ERROR_OK
)
107 cmsis_dap_clear_sticky_errors(dap
);
112 /** Select the AP register bank matching bits 7:4 of reg. */
113 static int cmsis_dap_ap_q_bankselect(struct adiv5_dap
*dap
, unsigned reg
)
115 uint32_t select_ap_bank
= reg
& 0x000000F0;
117 if (select_ap_bank
== dap
->ap_bank_value
)
120 dap
->ap_bank_value
= select_ap_bank
;
121 select_ap_bank
|= dap
->ap_current
;
123 return cmsis_dap_queue_dp_write(dap
, DP_SELECT
, select_ap_bank
);
126 static int (cmsis_dap_queue_ap_read
)(struct adiv5_dap
*dap
, unsigned reg
, uint32_t *data
)
128 int retval
= cmsis_dap_ap_q_bankselect(dap
, reg
);
129 if (retval
!= ERROR_OK
)
132 LOG_DEBUG("reg = %d", reg
);
134 retval
= jtag_interface
->swd
->read_reg(
135 (CMSIS_CMD_AP
| CMSIS_CMD_READ
| CMSIS_CMD_A32(reg
)), data
);
137 if (retval
!= ERROR_OK
)
138 cmsis_dap_clear_sticky_errors(dap
);
143 static int (cmsis_dap_queue_ap_write
)(struct adiv5_dap
*dap
, unsigned reg
, uint32_t data
)
147 /* TODO: CSW_DBGSWENABLE (bit31) causes issues for some targets
148 * disable until we find out why */
149 if (reg
== AP_REG_CSW
)
150 data
&= ~CSW_DBGSWENABLE
;
152 int retval
= cmsis_dap_ap_q_bankselect(dap
, reg
);
153 if (retval
!= ERROR_OK
)
156 LOG_DEBUG("reg = %d, data = 0x%08" PRIx32
, reg
, data
);
158 retval
= jtag_interface
->swd
->write_reg(
159 (CMSIS_CMD_AP
| CMSIS_CMD_WRITE
| CMSIS_CMD_A32(reg
)), data
);
161 if (retval
!= ERROR_OK
)
162 cmsis_dap_clear_sticky_errors(dap
);
167 /** Executes all queued DAP operations. */
168 static int cmsis_dap_run(struct adiv5_dap
*dap
)
171 /* FIXME: for now the CMSIS-DAP interface hard-wires a zero-size queue. */
176 Some debug dongles do more than asked for(e.g. EDBG from
177 Atmel) behind the scene and issuing an AP write
178 may result in more than just APACC SWD transaction, which in
179 turn can possibly set sticky error bit in CTRL/STAT register
180 of the DP(an example would be writing SYSRESETREQ to AIRCR).
181 Such adapters may interpret CMSIS-DAP secification
182 differently and not guarantee to be report those failures
183 via status byte of the return USB packet from CMSIS-DAP, so
184 we need to check CTRL/STAT and if that happens to clear it.
186 ret
= cmsis_dap_queue_dp_read(dap
, DP_CTRL_STAT
, &ctrlstat
);
187 if (ret
!= ERROR_OK
) {
188 LOG_ERROR("Failed to read CTRL/STAT register");
192 if (ctrlstat
& SSTICKYERR
) {
193 LOG_WARNING("SSTICKYERR was set, clearing it");
194 ret
= cmsis_dap_clear_sticky_errors(dap
);
195 if (ret
!= ERROR_OK
) {
196 LOG_ERROR("Failed to clear sticky errors");
204 const struct dap_ops cmsis_dap_ops
= {
206 .queue_dp_read
= cmsis_dap_queue_dp_read
,
207 .queue_dp_write
= cmsis_dap_queue_dp_write
,
208 .queue_ap_read
= cmsis_dap_queue_ap_read
,
209 .queue_ap_write
= cmsis_dap_queue_ap_write
,
210 .queue_ap_abort
= cmsis_dap_queue_ap_abort
,
211 .run
= cmsis_dap_run
,
214 static const struct command_registration cmsis_dap_commands
[] = {
217 * Set up SWD and JTAG targets identically, unless/until
218 * infrastructure improves ... meanwhile, ignore all
219 * JTAG-specific stuff like IR length for SWD.
221 * REVISIT can we verify "just one SWD DAP" here/early?
224 .jim_handler
= jim_jtag_newtap
,
225 .mode
= COMMAND_CONFIG
,
226 .help
= "declare a new CMSIS-DAP"
228 COMMAND_REGISTRATION_DONE
231 static const struct command_registration cmsis_dap_handlers
[] = {
235 .help
= "cmsis_dap command group",
236 .chain
= cmsis_dap_commands
,
238 COMMAND_REGISTRATION_DONE
241 static int cmsis_dap_select(struct command_context
*ctx
)
245 int retval
= register_commands(ctx
, NULL
, cmsis_dap_handlers
);
247 if (retval
!= ERROR_OK
)
250 /* FIXME: This needs a real overhaul!! FIXME
251 * be sure driver is in SWD mode; start
252 * with hardware default TRN (1), it can be changed later
253 * we use a bogus 'swd' driver to implement cmsis-dap as it is quite similar */
255 const struct swd_driver
*swd
= jtag_interface
->swd
;
256 if (!swd
|| !swd
->read_reg
|| !swd
->write_reg
|| !swd
->init
) {
257 LOG_ERROR("no SWD driver?");
261 retval
= swd
->init(1);
262 if (retval
!= ERROR_OK
) {
263 LOG_ERROR("unable to init CMSIS-DAP driver");
270 static int cmsis_dap_init(struct command_context
*ctx
)
272 struct target
*target
= get_current_target(ctx
);
273 struct arm
*arm
= target_to_arm(target
);
274 struct adiv5_dap
*dap
= arm
->dap
;
278 LOG_DEBUG("CMSIS-ADI init");
280 /* Force the DAP's ops vector for CMSIS-DAP mode.
281 * messy - is there a better way? */
282 arm
->dap
->ops
= &cmsis_dap_ops
;
284 /* FIXME validate transport config ... is the
285 * configured DAP present (check IDCODE)?
286 * Is *only* one DAP configured?
291 /* Note, debugport_init() does setup too */
294 const struct swd_driver
*swd
= jtag_interface
->swd
;
295 if (!swd
|| !swd
->read_reg
|| !swd
->write_reg
|| !swd
->init
) {
296 LOG_ERROR("no SWD driver?");
300 int retval
= swd
->init(1);
301 if (retval
!= ERROR_OK
) {
302 LOG_ERROR("unable to init CMSIS-DAP driver");
307 status
= cmsis_dap_queue_dp_read(dap
, DP_IDCODE
, &idcode
);
309 if (status
== ERROR_OK
)
310 LOG_INFO("IDCODE 0x%08" PRIx32
, idcode
);
312 /* force clear all sticky faults */
313 cmsis_dap_clear_sticky_errors(dap
);
315 /* this is a workaround to get polling working */
316 jtag_add_reset(0, 0);
321 static struct transport cmsis_dap_transport
= {
323 .select
= cmsis_dap_select
,
324 .init
= cmsis_dap_init
,
327 static void cmsis_dap_constructor(void) __attribute__((constructor
));
328 static void cmsis_dap_constructor(void)
330 transport_register(&cmsis_dap_transport
);
333 /** Returns true if the current debug session
334 * is using CMSIS-DAP as its transport.
336 bool transport_is_cmsis_dap(void)
338 return get_current_transport() == &cmsis_dap_transport
;
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