src/target/adi_v5_swd.c

   1 /***************************************************************************
   2  *
   3  *   Copyright (C) 2010 by David Brownell
   4  *
   5  *   This program is free software; you can redistribute it and/or modify
   6  *   it under the terms of the GNU General Public License as published by
   7  *   the Free Software Foundation; either version 2 of the License, or
   8  *   (at your option) any later version.
   9  *
  10  *   This program is distributed in the hope that it will be useful,
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  *   GNU General Public License for more details.
  14  *
  15  *   You should have received a copy of the GNU General Public License
  16  *   along with this program; if not, write to the
  17  *   Free Software Foundation, Inc.,
  18  *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19  ***************************************************************************/
  20
  21 /**
  22  * @file
  23  * Utilities to support ARM "Serial Wire Debug" (SWD), a low pin-count debug
  24  * link protocol used in cases where JTAG is not wanted.  This is coupled to
  25  * recent versions of ARM's "CoreSight" debug framework.  This specific code
  26  * is a transport level interface, with "target/arm_adi_v5.[hc]" code
  27  * understanding operation semantics, shared with the JTAG transport.
  28  *
  29  * Single-DAP support only.
  30  *
  31  * for details, see "ARM IHI 0031A"
  32  * ARM Debug Interface v5 Architecture Specification
  33  * especially section 5.3 for SWD protocol
  34  *
  35  * On many chips (most current Cortex-M3 parts) SWD is a run-time alternative
  36  * to JTAG.  Boards may support one or both.  There are also SWD-only chips,
  37  * (using SW-DP not SWJ-DP).
  38  *
  39  * Even boards that also support JTAG can benefit from SWD support, because
  40  * usually there's no way to access the SWO trace view mechanism in JTAG mode.
  41  * That is, trace access may require SWD support.
  42  *
  43  */
  44
  45 #ifdef HAVE_CONFIG_H
  46 #include "config.h"
  47 #endif
  48
  49 #include "arm.h"
  50 #include "arm_adi_v5.h"
  51 #include <helper/time_support.h>
  52
  53 #include <transport/transport.h>
  54 #include <jtag/interface.h>
  55
  56 #include <jtag/swd.h>
  57
  58 static int swd_queue_dp_read(struct adiv5_dap *dap, unsigned reg,
  59                 uint32_t *data)
  60 {
  61         /* REVISIT status return vs ack ... */
  62         return swd->read_reg(swd_cmd(true,  false, reg), data);
  63 }
  64
  65 static int swd_queue_idcode_read(struct adiv5_dap *dap,
  66                 uint8_t *ack, uint32_t *data)
  67 {
  68         int status = swd_queue_dp_read(dap, DP_IDCODE, data);
  69         if (status < 0)
  70                 return status;
  71         *ack = status;
  72         /* ?? */
  73         return ERROR_OK;
  74 }
  75
  76 static int (swd_queue_dp_write)(struct adiv5_dap *dap, unsigned reg,
  77                 uint32_t data)
  78 {
  79         /* REVISIT status return vs ack ... */
  80         return swd->write_reg(swd_cmd(false,  false, reg), data);
  81 }
  82
  83
  84 static int (swd_queue_ap_read)(struct adiv5_dap *dap, unsigned reg,
  85                 uint32_t *data)
  86 {
  87         /* REVISIT  APSEL ... */
  88         /* REVISIT status return ... */
  89         return swd->read_reg(swd_cmd(true,  true, reg), data);
  90 }
  91
  92 static int (swd_queue_ap_write)(struct adiv5_dap *dap, unsigned reg,
  93                 uint32_t data)
  94 {
  95         /* REVISIT  APSEL ... */
  96         /* REVISIT status return ... */
  97         return swd->write_reg(swd_cmd(false,  true, reg), data);
  98 }
  99
 100 static int (swd_queue_ap_abort)(struct adiv5_dap *dap, uint8_t *ack)
 101 {
 102         return ERROR_FAIL;
 103 }
 104
 105 /** Executes all queued DAP operations. */
 106 static int swd_run(struct adiv5_dap *dap)
 107 {
 108         /* for now the SWD interface hard-wires a zero-size queue.  */
 109
 110         /* FIXME but we still need to check and scrub
 111          * any hardware errors ...
 112          */
 113         return ERROR_OK;
 114 }
 115
 116 const struct dap_ops swd_dap_ops = {
 117         .is_swd = true,
 118
 119         .queue_idcode_read = swd_queue_idcode_read,
 120         .queue_dp_read = swd_queue_dp_read,
 121         .queue_dp_write = swd_queue_dp_write,
 122         .queue_ap_read = swd_queue_ap_read,
 123         .queue_ap_write = swd_queue_ap_write,
 124         .queue_ap_abort = swd_queue_ap_abort,
 125         .run = swd_run,
 126 };
 127
 128 /*
 129  * This represents the bits which must be sent out on TMS/SWDIO to
 130  * switch a DAP implemented using an SWJ-DP module into SWD mode.
 131  * These bits are stored (and transmitted) LSB-first.
 132  *
 133  * See the DAP-Lite specification, section 2.2.5 for information
 134  * about making the debug link select SWD or JTAG.  (Similar info
 135  * is in a few other ARM documents.)
 136  */
 137 static const uint8_t jtag2swd_bitseq[] = {
 138         /* More than 50 TCK/SWCLK cycles with TMS/SWDIO high,
 139          * putting both JTAG and SWD logic into reset state.
 140          */
 141         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 142         /* Switching sequence enables SWD and disables JTAG
 143          * NOTE: bits in the DP's IDCODE may expose the need for
 144          * an old/obsolete/deprecated sequence (0xb6 0xed).
 145          */
 146         0x9e, 0xe7,
 147         /* More than 50 TCK/SWCLK cycles with TMS/SWDIO high,
 148          * putting both JTAG and SWD logic into reset state.
 149          */
 150         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
 151 };
 152
 153 /**
 154  * Put the debug link into SWD mode, if the target supports it.
 155  * The link's initial mode may be either JTAG (for example,
 156  * with SWJ-DP after reset) or SWD.
 157  *
 158  * @param target Enters SWD mode (if possible).
 159  *
 160  * Note that targets using the JTAG-DP do not support SWD, and that
 161  * some targets which could otherwise support it may have have been
 162  * configured to disable SWD signaling
 163  *
 164  * @return ERROR_OK or else a fault code.
 165  */
 166 int dap_to_swd(struct target *target)
 167 {
 168         struct arm *arm = target_to_arm(target);
 169         int retval;
 170
 171         LOG_DEBUG("Enter SWD mode");
 172
 173         /* REVISIT it's ugly to need to make calls to a "jtag"
 174          * subsystem if the link may not be in JTAG mode...
 175          */
 176
 177         retval =  jtag_add_tms_seq(8 * sizeof(jtag2swd_bitseq),
 178                         jtag2swd_bitseq, TAP_INVALID);
 179         if (retval == ERROR_OK)
 180                 retval = jtag_execute_queue();
 181
 182         /* set up the DAP's ops vector for SWD mode. */
 183         arm->dap->ops = &swd_dap_ops;
 184
 185         return retval;
 186 }
 187
 188
 189
 190 COMMAND_HANDLER(handle_swd_wcr)
 191 {
 192         int retval;
 193         struct target *target = get_current_target(CMD_CTX);
 194         struct arm *arm = target_to_arm(target);
 195         struct adiv5_dap *dap = arm->dap;
 196         uint32_t wcr;
 197         unsigned trn, scale = 0;
 198
 199         switch (CMD_ARGC) {
 200         /* no-args: just dump state */
 201         case 0:
 202                 /*retval = swd_queue_dp_read(dap, DP_WCR, &wcr); */
 203                 retval = dap_queue_dp_read(dap, DP_WCR, &wcr);
 204                 if (retval == ERROR_OK)
 205                         dap->ops->run(dap);
 206                 if (retval != ERROR_OK) {
 207                         LOG_ERROR("can't read WCR?");
 208                         return retval;
 209                 }
 210
 211                 command_print(CMD_CTX,
 212                         "turnaround=%" PRIu32 ", prescale=%" PRIu32,
 213                         WCR_TO_TRN(wcr),
 214                         WCR_TO_PRESCALE(wcr));
 215         return ERROR_OK;
 216
 217         case 2:         /* TRN and prescale */
 218                 COMMAND_PARSE_NUMBER(uint, CMD_ARGV[1], scale);
 219                 if (scale > 7) {
 220                         LOG_ERROR("prescale %d is too big", scale);
 221                         return ERROR_FAIL;
 222                 }
 223                 /* FALL THROUGH */
 224
 225         case 1:         /* TRN only */
 226                 COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], trn);
 227                 if (trn < 1 || trn > 4) {
 228                         LOG_ERROR("turnaround %d is invalid", trn);
 229                         return ERROR_FAIL;
 230                 }
 231
 232                 wcr = ((trn - 1) << 8) | scale;
 233                 /* FIXME
 234                  * write WCR ...
 235                  * then, re-init adapter with new TRN
 236                  */
 237                 LOG_ERROR("can't yet modify WCR");
 238                 return ERROR_FAIL;
 239
 240         default:        /* too many arguments */
 241                 return ERROR_COMMAND_SYNTAX_ERROR;
 242         }
 243 }
 244
 245 static const struct command_registration swd_commands[] = {
 246         {
 247                 /*
 248                  * Set up SWD and JTAG targets identically, unless/until
 249                  * infrastructure improves ...  meanwhile, ignore all
 250                  * JTAG-specific stuff like IR length for SWD.
 251                  *
 252                  * REVISIT can we verify "just one SWD DAP" here/early?
 253                  */
 254                 .name = "newdap",
 255                 .jim_handler = jim_jtag_newtap,
 256                 .mode = COMMAND_CONFIG,
 257                 .help = "declare a new SWD DAP"
 258         },
 259         {
 260                 .name = "wcr",
 261                 .handler = handle_swd_wcr,
 262                 .mode = COMMAND_ANY,
 263                 .help = "display or update DAP's WCR register",
 264                 .usage = "turnaround (1..4), prescale (0..7)",
 265         },
 266
 267         /* REVISIT -- add a command for SWV trace on/off */
 268         COMMAND_REGISTRATION_DONE
 269 };
 270
 271 static const struct command_registration swd_handlers[] = {
 272         {
 273                 .name = "swd",
 274                 .mode = COMMAND_ANY,
 275                 .help = "SWD command group",
 276                 .chain = swd_commands,
 277         },
 278         COMMAND_REGISTRATION_DONE
 279 };
 280
 281 static int swd_select(struct command_context *ctx)
 282 {
 283         struct target *target = get_current_target(ctx);
 284         int retval;
 285
 286         retval = register_commands(ctx, NULL, swd_handlers);
 287
 288         if (retval != ERROR_OK)
 289                 return retval;
 290
 291          /* be sure driver is in SWD mode; start
 292           * with hardware default TRN (1), it can be changed later
 293           */
 294         if (!swd || !swd->read_reg || !swd->write_reg || !swd->init) {
 295                 LOG_DEBUG("no SWD driver?");
 296                 return ERROR_FAIL;
 297         }
 298
 299          retval = swd->init(1);
 300         if (retval != ERROR_OK) {
 301                 LOG_DEBUG("can't init SWD driver");
 302                 return retval;
 303         }
 304
 305         /* force DAP into SWD mode (not JTAG) */
 306         retval = dap_to_swd(target);
 307
 308         return retval;
 309 }
 310
 311 static int swd_init(struct command_context *ctx)
 312 {
 313         struct target *target = get_current_target(ctx);
 314         struct arm *arm = target_to_arm(target);
 315         struct adiv5_dap *dap = arm->dap;
 316         uint32_t idcode;
 317         int status;
 318
 319         /* FIXME validate transport config ... is the
 320          * configured DAP present (check IDCODE)?
 321          * Is *only* one DAP configured?
 322          *
 323          * MUST READ IDCODE
 324          */
 325
 326  /* Note, debugport_init() does setup too */
 327
 328         uint8_t ack;
 329
 330         status = swd_queue_idcode_read(dap, &ack, &idcode);
 331
 332         if (status == ERROR_OK)
 333                 LOG_INFO("SWD IDCODE %#8.8" PRIx32, idcode);
 334
 335         return status;
 336
 337 }
 338
 339 static struct transport swd_transport = {
 340         .name = "swd",
 341         .select = swd_select,
 342         .init = swd_init,
 343 };
 344
 345 static void swd_constructor(void) __attribute__((constructor));
 346 static void swd_constructor(void)
 347 {
 348         transport_register(&swd_transport);
 349 }
 350
 351 /** Returns true if the current debug session
 352  * is using SWD as its transport.
 353  */
 354 bool transport_is_swd(void)
 355 {
 356         return get_current_transport() == &swd_transport;
 357 }