ARM: streamline register init
[openocd.git] / src / target / arm11_dbgtap.h
1 #ifndef ARM11_DBGTAP_H
2 #define ARM11_DBGTAP_H
3
4 #include "arm11.h"
5
6 /* ARM11 internals */
7
8 void arm11_setup_field(struct arm11_common *arm11, int num_bits,
9 void *in_data, void *out_data, struct scan_field *field);
10 void arm11_add_IR(struct arm11_common *arm11,
11 uint8_t instr, tap_state_t state);
12 int arm11_add_debug_SCAN_N(struct arm11_common *arm11,
13 uint8_t chain, tap_state_t state);
14 void arm11_add_debug_INST(struct arm11_common *arm11,
15 uint32_t inst, uint8_t *flag, tap_state_t state);
16 int arm11_read_DSCR(struct arm11_common *arm11, uint32_t *dscr);
17 int arm11_write_DSCR(struct arm11_common *arm11, uint32_t dscr);
18
19 enum target_debug_reason arm11_get_DSCR_debug_reason(uint32_t dscr);
20
21 int arm11_run_instr_data_prepare(struct arm11_common *arm11);
22 int arm11_run_instr_data_finish(struct arm11_common *arm11);
23 int arm11_run_instr_no_data(struct arm11_common *arm11,
24 uint32_t *opcode, size_t count);
25 int arm11_run_instr_no_data1(struct arm11_common *arm11, uint32_t opcode);
26 int arm11_run_instr_data_to_core(struct arm11_common *arm11,
27 uint32_t opcode, uint32_t *data, size_t count);
28 int arm11_run_instr_data_to_core_noack(struct arm11_common *arm11,
29 uint32_t opcode, uint32_t *data, size_t count);
30 int arm11_run_instr_data_to_core1(struct arm11_common *arm11,
31 uint32_t opcode, uint32_t data);
32 int arm11_run_instr_data_from_core(struct arm11_common *arm11,
33 uint32_t opcode, uint32_t *data, size_t count);
34 int arm11_run_instr_data_from_core_via_r0(struct arm11_common *arm11,
35 uint32_t opcode, uint32_t *data);
36 int arm11_run_instr_data_to_core_via_r0(struct arm11_common *arm11,
37 uint32_t opcode, uint32_t data);
38
39 int arm11_add_dr_scan_vc(int num_fields, struct scan_field *fields,
40 tap_state_t state);
41 int arm11_add_ir_scan_vc(int num_fields, struct scan_field *fields,
42 tap_state_t state);
43
44 /**
45 * Used with arm11_sc7_run to make a list of read/write commands for
46 * scan chain 7
47 */
48 struct arm11_sc7_action
49 {
50 bool write; /**< Access mode: true for write, false for read. */
51 uint8_t address; /**< Register address mode. Use enum #arm11_sc7 */
52 /**
53 * If write then set this to value to be written. In read mode
54 * this receives the read value when the function returns.
55 */
56 uint32_t value;
57 };
58
59 int arm11_sc7_run(struct arm11_common *arm11,
60 struct arm11_sc7_action *actions, size_t count);
61
62 /* Mid-level helper functions */
63 void arm11_sc7_clear_vbw(struct arm11_common *arm11);
64 void arm11_sc7_set_vcr(struct arm11_common *arm11, uint32_t value);
65
66 int arm11_read_memory_word(struct arm11_common *arm11,
67 uint32_t address, uint32_t *result);
68
69 #endif // ARM11_DBGTAP_H

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