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[openocd.git] / src / target / arm966e.c
1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
4 * *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
9 * *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
14 * *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
20 #ifdef HAVE_CONFIG_H
21 #include "config.h"
22 #endif
23
24 #include "arm966e.h"
25
26 #include "arm7_9_common.h"
27 #include "register.h"
28 #include "target.h"
29 #include "armv4_5.h"
30 #include "embeddedice.h"
31 #include "log.h"
32 #include "jtag.h"
33 #include "arm_jtag.h"
34
35 #include <stdlib.h>
36 #include <string.h>
37
38 #if 0
39 #define _DEBUG_INSTRUCTION_EXECUTION_
40 #endif
41
42 /* cli handling */
43 int arm966e_register_commands(struct command_context_s *cmd_ctx);
44
45 /* forward declarations */
46 int arm966e_target_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct target_s *target);
47 int arm966e_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
48 int arm966e_quit(void);
49
50 target_type_t arm966e_target =
51 {
52 .name = "arm966e",
53
54 .poll = arm7_9_poll,
55 .arch_state = armv4_5_arch_state,
56
57 .target_request_data = arm7_9_target_request_data,
58
59 .halt = arm7_9_halt,
60 .resume = arm7_9_resume,
61 .step = arm7_9_step,
62
63 .assert_reset = arm7_9_assert_reset,
64 .deassert_reset = arm7_9_deassert_reset,
65 .soft_reset_halt = arm7_9_soft_reset_halt,
66 .prepare_reset_halt = arm7_9_prepare_reset_halt,
67
68 .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
69
70 .read_memory = arm7_9_read_memory,
71 .write_memory = arm7_9_write_memory,
72 .bulk_write_memory = arm7_9_bulk_write_memory,
73 .checksum_memory = arm7_9_checksum_memory,
74
75 .run_algorithm = armv4_5_run_algorithm,
76
77 .add_breakpoint = arm7_9_add_breakpoint,
78 .remove_breakpoint = arm7_9_remove_breakpoint,
79 .add_watchpoint = arm7_9_add_watchpoint,
80 .remove_watchpoint = arm7_9_remove_watchpoint,
81
82 .register_commands = arm966e_register_commands,
83 .target_command = arm966e_target_command,
84 .init_target = arm966e_init_target,
85 .quit = arm966e_quit,
86 };
87
88 int arm966e_init_target(struct command_context_s *cmd_ctx, struct target_s *target)
89 {
90 arm9tdmi_init_target(cmd_ctx, target);
91
92 return ERROR_OK;
93 }
94
95 int arm966e_quit(void)
96 {
97
98 return ERROR_OK;
99 }
100
101 int arm966e_init_arch_info(target_t *target, arm966e_common_t *arm966e, int chain_pos, char *variant)
102 {
103 arm9tdmi_common_t *arm9tdmi = &arm966e->arm9tdmi_common;
104 arm7_9_common_t *arm7_9 = &arm9tdmi->arm7_9_common;
105
106 arm9tdmi_init_arch_info(target, arm9tdmi, chain_pos, variant);
107
108 arm9tdmi->arch_info = arm966e;
109 arm966e->common_magic = ARM966E_COMMON_MAGIC;
110
111 /* The ARM966E-S implements the ARMv5TE architecture which
112 * has the BKPT instruction, so we don't have to use a watchpoint comparator
113 */
114 arm7_9->arm_bkpt = ARMV5_BKPT(0x0);
115 arm7_9->thumb_bkpt = ARMV5_T_BKPT(0x0) & 0xffff;
116
117 arm7_9->sw_bkpts_use_wp = 0;
118 arm7_9->sw_bkpts_enabled = 1;
119
120 return ERROR_OK;
121 }
122
123 int arm966e_target_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct target_s *target)
124 {
125 int chain_pos;
126 char *variant = NULL;
127 arm966e_common_t *arm966e = malloc(sizeof(arm966e_common_t));
128
129 if (argc < 4)
130 {
131 ERROR("'target arm966e' requires at least one additional argument");
132 exit(-1);
133 }
134
135 chain_pos = strtoul(args[3], NULL, 0);
136
137 if (argc >= 5)
138 variant = args[4];
139
140 DEBUG("chain_pos: %i, variant: %s", chain_pos, variant);
141
142 arm966e_init_arch_info(target, arm966e, chain_pos, variant);
143
144 return ERROR_OK;
145 }
146
147 int arm966e_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p, arm9tdmi_common_t **arm9tdmi_p, arm966e_common_t **arm966e_p)
148 {
149 armv4_5_common_t *armv4_5 = target->arch_info;
150 arm7_9_common_t *arm7_9;
151 arm9tdmi_common_t *arm9tdmi;
152 arm966e_common_t *arm966e;
153
154 if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC)
155 {
156 return -1;
157 }
158
159 arm7_9 = armv4_5->arch_info;
160 if (arm7_9->common_magic != ARM7_9_COMMON_MAGIC)
161 {
162 return -1;
163 }
164
165 arm9tdmi = arm7_9->arch_info;
166 if (arm9tdmi->common_magic != ARM9TDMI_COMMON_MAGIC)
167 {
168 return -1;
169 }
170
171 arm966e = arm9tdmi->arch_info;
172 if (arm966e->common_magic != ARM966E_COMMON_MAGIC)
173 {
174 return -1;
175 }
176
177 *armv4_5_p = armv4_5;
178 *arm7_9_p = arm7_9;
179 *arm9tdmi_p = arm9tdmi;
180 *arm966e_p = arm966e;
181
182 return ERROR_OK;
183 }
184
185 int arm966e_read_cp15(target_t *target, int reg_addr, u32 *value)
186 {
187 armv4_5_common_t *armv4_5 = target->arch_info;
188 arm7_9_common_t *arm7_9 = armv4_5->arch_info;
189 arm_jtag_t *jtag_info = &arm7_9->jtag_info;
190 scan_field_t fields[3];
191 u8 reg_addr_buf = reg_addr & 0x3f;
192 u8 nr_w_buf = 0;
193
194 jtag_add_end_state(TAP_RTI);
195 arm_jtag_scann(jtag_info, 0xf);
196 arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
197
198 fields[0].device = jtag_info->chain_pos;
199 fields[0].num_bits = 32;
200 fields[0].out_value = NULL;
201 fields[0].out_mask = NULL;
202 fields[0].in_value = NULL;
203 fields[0].in_check_value = NULL;
204 fields[0].in_check_mask = NULL;
205 fields[0].in_handler = NULL;
206 fields[0].in_handler_priv = NULL;
207
208 fields[1].device = jtag_info->chain_pos;
209 fields[1].num_bits = 6;
210 fields[1].out_value = &reg_addr_buf;
211 fields[1].out_mask = NULL;
212 fields[1].in_value = NULL;
213 fields[1].in_check_value = NULL;
214 fields[1].in_check_mask = NULL;
215 fields[1].in_handler = NULL;
216 fields[1].in_handler_priv = NULL;
217
218 fields[2].device = jtag_info->chain_pos;
219 fields[2].num_bits = 1;
220 fields[2].out_value = &nr_w_buf;
221 fields[2].out_mask = NULL;
222 fields[2].in_value = NULL;
223 fields[2].in_check_value = NULL;
224 fields[2].in_check_mask = NULL;
225 fields[2].in_handler = NULL;
226 fields[2].in_handler_priv = NULL;
227
228 jtag_add_dr_scan(3, fields, -1);
229
230 fields[0].in_handler_priv = value;
231 fields[0].in_handler = arm_jtag_buf_to_u32;
232
233 jtag_add_dr_scan(3, fields, -1);
234
235 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
236 jtag_execute_queue();
237 DEBUG("addr: 0x%x value: %8.8x", reg_addr, *value);
238 #endif
239
240 return ERROR_OK;
241 }
242
243 int arm966e_write_cp15(target_t *target, int reg_addr, u32 value)
244 {
245 armv4_5_common_t *armv4_5 = target->arch_info;
246 arm7_9_common_t *arm7_9 = armv4_5->arch_info;
247 arm_jtag_t *jtag_info = &arm7_9->jtag_info;
248 scan_field_t fields[3];
249 u8 reg_addr_buf = reg_addr & 0x3f;
250 u8 nr_w_buf = 1;
251 u8 value_buf[4];
252
253 buf_set_u32(value_buf, 0, 32, value);
254
255 jtag_add_end_state(TAP_RTI);
256 arm_jtag_scann(jtag_info, 0xf);
257 arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
258
259 fields[0].device = jtag_info->chain_pos;
260 fields[0].num_bits = 32;
261 fields[0].out_value = value_buf;
262 fields[0].out_mask = NULL;
263 fields[0].in_value = NULL;
264 fields[0].in_check_value = NULL;
265 fields[0].in_check_mask = NULL;
266 fields[0].in_handler = NULL;
267 fields[0].in_handler_priv = NULL;
268
269 fields[1].device = jtag_info->chain_pos;
270 fields[1].num_bits = 6;
271 fields[1].out_value = &reg_addr_buf;
272 fields[1].out_mask = NULL;
273 fields[1].in_value = NULL;
274 fields[1].in_check_value = NULL;
275 fields[1].in_check_mask = NULL;
276 fields[1].in_handler = NULL;
277 fields[1].in_handler_priv = NULL;
278
279 fields[2].device = jtag_info->chain_pos;
280 fields[2].num_bits = 1;
281 fields[2].out_value = &nr_w_buf;
282 fields[2].out_mask = NULL;
283 fields[2].in_value = NULL;
284 fields[2].in_check_value = NULL;
285 fields[2].in_check_mask = NULL;
286 fields[2].in_handler = NULL;
287 fields[2].in_handler_priv = NULL;
288
289 jtag_add_dr_scan(3, fields, -1);
290
291 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
292 DEBUG("addr: 0x%x value: %8.8x", reg_addr, value);
293 #endif
294
295 return ERROR_OK;
296 }
297
298 int arm966e_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
299 {
300 int retval;
301 target_t *target = get_current_target(cmd_ctx);
302 armv4_5_common_t *armv4_5;
303 arm7_9_common_t *arm7_9;
304 arm9tdmi_common_t *arm9tdmi;
305 arm966e_common_t *arm966e;
306 arm_jtag_t *jtag_info;
307
308 if (arm966e_get_arch_pointers(target, &armv4_5, &arm7_9, &arm9tdmi, &arm966e) != ERROR_OK)
309 {
310 command_print(cmd_ctx, "current target isn't an ARM966e target");
311 return ERROR_OK;
312 }
313
314 jtag_info = &arm7_9->jtag_info;
315
316 if (target->state != TARGET_HALTED)
317 {
318 command_print(cmd_ctx, "target must be stopped for \"%s\" command", cmd);
319 return ERROR_OK;
320 }
321
322 /* one or more argument, access a single register (write if second argument is given */
323 if (argc >= 1)
324 {
325 int address = strtoul(args[0], NULL, 0);
326
327 if (argc == 1)
328 {
329 u32 value;
330 if ((retval = arm966e_read_cp15(target, address, &value)) != ERROR_OK)
331 {
332 command_print(cmd_ctx, "couldn't access reg %i", address);
333 return ERROR_OK;
334 }
335 jtag_execute_queue();
336
337 command_print(cmd_ctx, "%i: %8.8x", address, value);
338 }
339 else if (argc == 2)
340 {
341 u32 value = strtoul(args[1], NULL, 0);
342 if ((retval = arm966e_write_cp15(target, address, value)) != ERROR_OK)
343 {
344 command_print(cmd_ctx, "couldn't access reg %i", address);
345 return ERROR_OK;
346 }
347 command_print(cmd_ctx, "%i: %8.8x", address, value);
348 }
349 }
350
351 return ERROR_OK;
352 }
353
354 int arm966e_register_commands(struct command_context_s *cmd_ctx)
355 {
356 int retval;
357 command_t *arm966e_cmd;
358
359 retval = arm9tdmi_register_commands(cmd_ctx);
360 arm966e_cmd = register_command(cmd_ctx, NULL, "arm966e", NULL, COMMAND_ANY, "arm966e specific commands");
361 register_command(cmd_ctx, arm966e_cmd, "cp15", arm966e_handle_cp15_command, COMMAND_EXEC, "display/modify cp15 register <num> [value]");
362
363 return ERROR_OK;
364 }

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