remove in_handler usage
[openocd.git] / src / target / arm966e.c
1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
4 * *
5 * Copyright (C) 2008 by Spencer Oliver *
6 * spen@spen-soft.co.uk *
7 * *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
12 * *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
17 * *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
23 #ifdef HAVE_CONFIG_H
24 #include "config.h"
25 #endif
26
27 #include "arm966e.h"
28
29 #include "arm7_9_common.h"
30 #include "register.h"
31 #include "target.h"
32 #include "armv4_5.h"
33 #include "embeddedice.h"
34 #include "log.h"
35 #include "jtag.h"
36 #include "arm_jtag.h"
37
38 #include <stdlib.h>
39 #include <string.h>
40
41 #if 0
42 #define _DEBUG_INSTRUCTION_EXECUTION_
43 #endif
44
45 /* cli handling */
46 int arm966e_register_commands(struct command_context_s *cmd_ctx);
47
48 /* forward declarations */
49 int arm966e_target_create(struct target_s *target, Jim_Interp *interp);
50 int arm966e_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
51 int arm966e_quit(void);
52
53 target_type_t arm966e_target =
54 {
55 .name = "arm966e",
56
57 .poll = arm7_9_poll,
58 .arch_state = armv4_5_arch_state,
59
60 .target_request_data = arm7_9_target_request_data,
61
62 .halt = arm7_9_halt,
63 .resume = arm7_9_resume,
64 .step = arm7_9_step,
65
66 .assert_reset = arm7_9_assert_reset,
67 .deassert_reset = arm7_9_deassert_reset,
68 .soft_reset_halt = arm7_9_soft_reset_halt,
69
70 .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
71
72 .read_memory = arm7_9_read_memory,
73 .write_memory = arm7_9_write_memory,
74 .bulk_write_memory = arm7_9_bulk_write_memory,
75 .checksum_memory = arm7_9_checksum_memory,
76 .blank_check_memory = arm7_9_blank_check_memory,
77
78 .run_algorithm = armv4_5_run_algorithm,
79
80 .add_breakpoint = arm7_9_add_breakpoint,
81 .remove_breakpoint = arm7_9_remove_breakpoint,
82 .add_watchpoint = arm7_9_add_watchpoint,
83 .remove_watchpoint = arm7_9_remove_watchpoint,
84
85 .register_commands = arm966e_register_commands,
86 .target_create = arm966e_target_create,
87 .init_target = arm966e_init_target,
88 .examine = arm9tdmi_examine,
89 .quit = arm966e_quit,
90 };
91
92 int arm966e_init_target(struct command_context_s *cmd_ctx, struct target_s *target)
93 {
94 arm9tdmi_init_target(cmd_ctx, target);
95
96 return ERROR_OK;
97 }
98
99 int arm966e_quit(void)
100 {
101 return ERROR_OK;
102 }
103
104 int arm966e_init_arch_info(target_t *target, arm966e_common_t *arm966e, jtag_tap_t *tap)
105 {
106 arm9tdmi_common_t *arm9tdmi = &arm966e->arm9tdmi_common;
107 arm7_9_common_t *arm7_9 = &arm9tdmi->arm7_9_common;
108
109 arm9tdmi_init_arch_info(target, arm9tdmi, tap);
110
111 arm9tdmi->arch_info = arm966e;
112 arm966e->common_magic = ARM966E_COMMON_MAGIC;
113
114 /* The ARM966E-S implements the ARMv5TE architecture which
115 * has the BKPT instruction, so we don't have to use a watchpoint comparator
116 */
117 arm7_9->arm_bkpt = ARMV5_BKPT(0x0);
118 arm7_9->thumb_bkpt = ARMV5_T_BKPT(0x0) & 0xffff;
119
120 return ERROR_OK;
121 }
122
123 int arm966e_target_create( struct target_s *target, Jim_Interp *interp )
124 {
125 arm966e_common_t *arm966e = calloc(1,sizeof(arm966e_common_t));
126
127 arm966e_init_arch_info(target, arm966e, target->tap);
128
129 return ERROR_OK;
130 }
131
132 int arm966e_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p, arm9tdmi_common_t **arm9tdmi_p, arm966e_common_t **arm966e_p)
133 {
134 armv4_5_common_t *armv4_5 = target->arch_info;
135 arm7_9_common_t *arm7_9;
136 arm9tdmi_common_t *arm9tdmi;
137 arm966e_common_t *arm966e;
138
139 if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC)
140 {
141 return -1;
142 }
143
144 arm7_9 = armv4_5->arch_info;
145 if (arm7_9->common_magic != ARM7_9_COMMON_MAGIC)
146 {
147 return -1;
148 }
149
150 arm9tdmi = arm7_9->arch_info;
151 if (arm9tdmi->common_magic != ARM9TDMI_COMMON_MAGIC)
152 {
153 return -1;
154 }
155
156 arm966e = arm9tdmi->arch_info;
157 if (arm966e->common_magic != ARM966E_COMMON_MAGIC)
158 {
159 return -1;
160 }
161
162 *armv4_5_p = armv4_5;
163 *arm7_9_p = arm7_9;
164 *arm9tdmi_p = arm9tdmi;
165 *arm966e_p = arm966e;
166
167 return ERROR_OK;
168 }
169
170 int arm966e_read_cp15(target_t *target, int reg_addr, u32 *value)
171 {
172 int retval = ERROR_OK;
173 armv4_5_common_t *armv4_5 = target->arch_info;
174 arm7_9_common_t *arm7_9 = armv4_5->arch_info;
175 arm_jtag_t *jtag_info = &arm7_9->jtag_info;
176 scan_field_t fields[3];
177 u8 reg_addr_buf = reg_addr & 0x3f;
178 u8 nr_w_buf = 0;
179
180 jtag_add_end_state(TAP_IDLE);
181 if((retval = arm_jtag_scann(jtag_info, 0xf)) != ERROR_OK)
182 {
183 return retval;
184 }
185 arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
186
187 fields[0].tap = jtag_info->tap;
188 fields[0].num_bits = 32;
189 fields[0].out_value = NULL;
190 fields[0].in_value = NULL;
191 fields[0].in_handler = NULL;
192
193 fields[1].tap = jtag_info->tap;
194 fields[1].num_bits = 6;
195 fields[1].out_value = &reg_addr_buf;
196 fields[1].in_value = NULL;
197 fields[1].in_handler = NULL;
198
199 fields[2].tap = jtag_info->tap;
200 fields[2].num_bits = 1;
201 fields[2].out_value = &nr_w_buf;
202 fields[2].in_value = NULL;
203 fields[2].in_handler = NULL;
204
205 jtag_add_dr_scan(3, fields, TAP_INVALID);
206
207 u8 tmp[4];
208 fields[1].in_value = tmp;
209
210 jtag_add_dr_scan_now(3, fields, TAP_INVALID);
211
212 *value=flip_u32(le_to_h_u32(tmp), 32);
213
214
215 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
216 if((retval = jtag_execute_queue()) != ERROR_OK)
217 {
218 return retval;
219 }
220 LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, *value);
221 #endif
222
223 return ERROR_OK;
224 }
225
226 int arm966e_write_cp15(target_t *target, int reg_addr, u32 value)
227 {
228 int retval = ERROR_OK;
229 armv4_5_common_t *armv4_5 = target->arch_info;
230 arm7_9_common_t *arm7_9 = armv4_5->arch_info;
231 arm_jtag_t *jtag_info = &arm7_9->jtag_info;
232 scan_field_t fields[3];
233 u8 reg_addr_buf = reg_addr & 0x3f;
234 u8 nr_w_buf = 1;
235 u8 value_buf[4];
236
237 buf_set_u32(value_buf, 0, 32, value);
238
239 jtag_add_end_state(TAP_IDLE);
240 if((retval = arm_jtag_scann(jtag_info, 0xf)) != ERROR_OK)
241 {
242 return retval;
243 }
244 arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
245
246 fields[0].tap = jtag_info->tap;
247 fields[0].num_bits = 32;
248 fields[0].out_value = value_buf;
249
250 fields[0].in_value = NULL;
251
252
253 fields[0].in_handler = NULL;
254
255
256 fields[1].tap = jtag_info->tap;
257 fields[1].num_bits = 6;
258 fields[1].out_value = &reg_addr_buf;
259
260 fields[1].in_value = NULL;
261
262
263 fields[1].in_handler = NULL;
264
265
266 fields[2].tap = jtag_info->tap;
267 fields[2].num_bits = 1;
268 fields[2].out_value = &nr_w_buf;
269
270 fields[2].in_value = NULL;
271
272
273 fields[2].in_handler = NULL;
274
275
276 jtag_add_dr_scan(3, fields, TAP_INVALID);
277
278 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
279 LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, value);
280 #endif
281
282 return ERROR_OK;
283 }
284
285 int arm966e_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
286 {
287 int retval;
288 target_t *target = get_current_target(cmd_ctx);
289 armv4_5_common_t *armv4_5;
290 arm7_9_common_t *arm7_9;
291 arm9tdmi_common_t *arm9tdmi;
292 arm966e_common_t *arm966e;
293 arm_jtag_t *jtag_info;
294
295 if (arm966e_get_arch_pointers(target, &armv4_5, &arm7_9, &arm9tdmi, &arm966e) != ERROR_OK)
296 {
297 command_print(cmd_ctx, "current target isn't an ARM966e target");
298 return ERROR_OK;
299 }
300
301 jtag_info = &arm7_9->jtag_info;
302
303 if (target->state != TARGET_HALTED)
304 {
305 command_print(cmd_ctx, "target must be stopped for \"%s\" command", cmd);
306 return ERROR_OK;
307 }
308
309 /* one or more argument, access a single register (write if second argument is given */
310 if (argc >= 1)
311 {
312 int address = strtoul(args[0], NULL, 0);
313
314 if (argc == 1)
315 {
316 u32 value;
317 if ((retval = arm966e_read_cp15(target, address, &value)) != ERROR_OK)
318 {
319 command_print(cmd_ctx, "couldn't access reg %i", address);
320 return ERROR_OK;
321 }
322 if((retval = jtag_execute_queue()) != ERROR_OK)
323 {
324 return retval;
325 }
326
327 command_print(cmd_ctx, "%i: %8.8x", address, value);
328 }
329 else if (argc == 2)
330 {
331 u32 value = strtoul(args[1], NULL, 0);
332 if ((retval = arm966e_write_cp15(target, address, value)) != ERROR_OK)
333 {
334 command_print(cmd_ctx, "couldn't access reg %i", address);
335 return ERROR_OK;
336 }
337 command_print(cmd_ctx, "%i: %8.8x", address, value);
338 }
339 }
340
341 return ERROR_OK;
342 }
343
344 int arm966e_register_commands(struct command_context_s *cmd_ctx)
345 {
346 int retval;
347 command_t *arm966e_cmd;
348
349 retval = arm9tdmi_register_commands(cmd_ctx);
350 arm966e_cmd = register_command(cmd_ctx, NULL, "arm966e", NULL, COMMAND_ANY, "arm966e specific commands");
351 register_command(cmd_ctx, arm966e_cmd, "cp15", arm966e_handle_cp15_command, COMMAND_EXEC, "display/modify cp15 register <num> [value]");
352
353 return retval;
354 }

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