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semihosting: add armv7m semihosting support
[openocd.git] / src / target / arm_semihosting.c
1 /***************************************************************************
2 * Copyright (C) 2009 by Marvell Technology Group Ltd. *
3 * Written by Nicolas Pitre <nico@marvell.com> *
4 * *
5 * Copyright (C) 2010 by Spencer Oliver *
6 * spen@spen-soft.co.uk *
7 * *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
12 * *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
17 * *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
23
24 /**
25 * @file
26 * Hold ARM semihosting support.
27 *
28 * Semihosting enables code running on an ARM target to use the I/O
29 * facilities on the host computer. The target application must be linked
30 * against a library that forwards operation requests by using the SVC
31 * instruction trapped at the Supervisor Call vector by the debugger.
32 * Details can be found in chapter 8 of DUI0203I_rvct_developer_guide.pdf
33 * from ARM Ltd.
34 */
35
36 #ifdef HAVE_CONFIG_H
37 #include "config.h"
38 #endif
39
40 #include "arm.h"
41 #include "armv4_5.h"
42 #include "arm7_9_common.h"
43 #include "armv7m.h"
44 #include "cortex_m3.h"
45 #include "register.h"
46 #include "arm_semihosting.h"
47 #include <helper/binarybuffer.h>
48 #include <helper/log.h>
49 #include <sys/stat.h>
50
51 static int open_modeflags[12] = {
52 O_RDONLY,
53 O_RDONLY | O_BINARY,
54 O_RDWR,
55 O_RDWR | O_BINARY,
56 O_WRONLY | O_CREAT | O_TRUNC,
57 O_WRONLY | O_CREAT | O_TRUNC | O_BINARY,
58 O_RDWR | O_CREAT | O_TRUNC,
59 O_RDWR | O_CREAT | O_TRUNC | O_BINARY,
60 O_WRONLY | O_CREAT | O_APPEND,
61 O_WRONLY | O_CREAT | O_APPEND | O_BINARY,
62 O_RDWR | O_CREAT | O_APPEND,
63 O_RDWR | O_CREAT | O_APPEND | O_BINARY
64 };
65
66 static int do_semihosting(struct target *target)
67 {
68 struct arm *arm = target_to_arm(target);
69 uint32_t r0 = buf_get_u32(arm->core_cache->reg_list[0].value, 0, 32);
70 uint32_t r1 = buf_get_u32(arm->core_cache->reg_list[1].value, 0, 32);
71 uint32_t lr, spsr;
72 uint8_t params[16];
73 int retval, result;
74
75 if (is_arm7_9(target_to_arm7_9(target)))
76 {
77 lr = buf_get_u32(ARMV4_5_CORE_REG_MODE(arm->core_cache, ARM_MODE_SVC, 14).value, 0, 32);
78 spsr = buf_get_u32(arm->spsr->value, 0, 32);;
79 }
80
81 /*
82 * TODO: lots of security issues are not considered yet, such as:
83 * - no validation on target provided file descriptors
84 * - no safety checks on opened/deleted/renamed file paths
85 * Beware the target app you use this support with.
86 *
87 * TODO: explore mapping requests to GDB's "File-I/O Remote
88 * Protocol Extension" ... when GDB is active.
89 */
90 switch (r0) {
91 case 0x01: /* SYS_OPEN */
92 retval = target_read_memory(target, r1, 4, 3, params);
93 if (retval != ERROR_OK)
94 return retval;
95 else {
96 uint32_t a = target_buffer_get_u32(target, params+0);
97 uint32_t m = target_buffer_get_u32(target, params+4);
98 uint32_t l = target_buffer_get_u32(target, params+8);
99 if (l <= 255 && m <= 11) {
100 uint8_t fn[256];
101 retval = target_read_memory(target, a, 1, l, fn);
102 if (retval != ERROR_OK)
103 return retval;
104 fn[l] = 0;
105 if (strcmp((char *)fn, ":tt") == 0) {
106 if (m < 4)
107 result = dup(STDIN_FILENO);
108 else
109 result = dup(STDOUT_FILENO);
110 } else {
111 /* cygwin requires the permission setting
112 * otherwise it will fail to reopen a previously
113 * written file */
114 result = open((char *)fn, open_modeflags[m], 0644);
115 }
116 arm->semihosting_errno = errno;
117 } else {
118 result = -1;
119 arm->semihosting_errno = EINVAL;
120 }
121 }
122 break;
123
124 case 0x02: /* SYS_CLOSE */
125 retval = target_read_memory(target, r1, 4, 1, params);
126 if (retval != ERROR_OK)
127 return retval;
128 else {
129 int fd = target_buffer_get_u32(target, params+0);
130 result = close(fd);
131 arm->semihosting_errno = errno;
132 }
133 break;
134
135 case 0x03: /* SYS_WRITEC */
136 {
137 unsigned char c;
138 retval = target_read_memory(target, r1, 1, 1, &c);
139 if (retval != ERROR_OK)
140 return retval;
141 putchar(c);
142 result = 0;
143 }
144 break;
145
146 case 0x04: /* SYS_WRITE0 */
147 do {
148 unsigned char c;
149 retval = target_read_memory(target, r1, 1, 1, &c);
150 if (retval != ERROR_OK)
151 return retval;
152 if (!c)
153 break;
154 putchar(c);
155 } while (1);
156 result = 0;
157 break;
158
159 case 0x05: /* SYS_WRITE */
160 retval = target_read_memory(target, r1, 4, 3, params);
161 if (retval != ERROR_OK)
162 return retval;
163 else {
164 int fd = target_buffer_get_u32(target, params+0);
165 uint32_t a = target_buffer_get_u32(target, params+4);
166 size_t l = target_buffer_get_u32(target, params+8);
167 uint8_t *buf = malloc(l);
168 if (!buf) {
169 result = -1;
170 arm->semihosting_errno = ENOMEM;
171 } else {
172 retval = target_read_buffer(target, a, l, buf);
173 if (retval != ERROR_OK) {
174 free(buf);
175 return retval;
176 }
177 result = write(fd, buf, l);
178 arm->semihosting_errno = errno;
179 if (result >= 0)
180 result = l - result;
181 free(buf);
182 }
183 }
184 break;
185
186 case 0x06: /* SYS_READ */
187 retval = target_read_memory(target, r1, 4, 3, params);
188 if (retval != ERROR_OK)
189 return retval;
190 else {
191 int fd = target_buffer_get_u32(target, params+0);
192 uint32_t a = target_buffer_get_u32(target, params+4);
193 ssize_t l = target_buffer_get_u32(target, params+8);
194 uint8_t *buf = malloc(l);
195 if (!buf) {
196 result = -1;
197 arm->semihosting_errno = ENOMEM;
198 } else {
199 result = read(fd, buf, l);
200 arm->semihosting_errno = errno;
201 if (result >= 0) {
202 retval = target_write_buffer(target, a, result, buf);
203 if (retval != ERROR_OK) {
204 free(buf);
205 return retval;
206 }
207 result = l - result;
208 }
209 free(buf);
210 }
211 }
212 break;
213
214 case 0x07: /* SYS_READC */
215 result = getchar();
216 break;
217
218 case 0x08: /* SYS_ISERROR */
219 retval = target_read_memory(target, r1, 4, 1, params);
220 if (retval != ERROR_OK)
221 return retval;
222 result = (target_buffer_get_u32(target, params+0) != 0);
223 break;
224
225 case 0x09: /* SYS_ISTTY */
226 retval = target_read_memory(target, r1, 4, 1, params);
227 if (retval != ERROR_OK)
228 return retval;
229 result = isatty(target_buffer_get_u32(target, params+0));
230 break;
231
232 case 0x0a: /* SYS_SEEK */
233 retval = target_read_memory(target, r1, 4, 2, params);
234 if (retval != ERROR_OK)
235 return retval;
236 else {
237 int fd = target_buffer_get_u32(target, params+0);
238 off_t pos = target_buffer_get_u32(target, params+4);
239 result = lseek(fd, pos, SEEK_SET);
240 arm->semihosting_errno = errno;
241 if (result == pos)
242 result = 0;
243 }
244 break;
245
246 case 0x0c: /* SYS_FLEN */
247 retval = target_read_memory(target, r1, 4, 1, params);
248 if (retval != ERROR_OK)
249 return retval;
250 else {
251 int fd = target_buffer_get_u32(target, params+0);
252 struct stat buf;
253 result = fstat(fd, &buf);
254 if (result == -1) {
255 arm->semihosting_errno = errno;
256 result = -1;
257 break;
258 }
259 result = buf.st_size;
260 }
261 break;
262
263 case 0x0e: /* SYS_REMOVE */
264 retval = target_read_memory(target, r1, 4, 2, params);
265 if (retval != ERROR_OK)
266 return retval;
267 else {
268 uint32_t a = target_buffer_get_u32(target, params+0);
269 uint32_t l = target_buffer_get_u32(target, params+4);
270 if (l <= 255) {
271 uint8_t fn[256];
272 retval = target_read_memory(target, a, 1, l, fn);
273 if (retval != ERROR_OK)
274 return retval;
275 fn[l] = 0;
276 result = remove((char *)fn);
277 arm->semihosting_errno = errno;
278 } else {
279 result = -1;
280 arm->semihosting_errno = EINVAL;
281 }
282 }
283 break;
284
285 case 0x0f: /* SYS_RENAME */
286 retval = target_read_memory(target, r1, 4, 4, params);
287 if (retval != ERROR_OK)
288 return retval;
289 else {
290 uint32_t a1 = target_buffer_get_u32(target, params+0);
291 uint32_t l1 = target_buffer_get_u32(target, params+4);
292 uint32_t a2 = target_buffer_get_u32(target, params+8);
293 uint32_t l2 = target_buffer_get_u32(target, params+12);
294 if (l1 <= 255 && l2 <= 255) {
295 uint8_t fn1[256], fn2[256];
296 retval = target_read_memory(target, a1, 1, l1, fn1);
297 if (retval != ERROR_OK)
298 return retval;
299 retval = target_read_memory(target, a2, 1, l2, fn2);
300 if (retval != ERROR_OK)
301 return retval;
302 fn1[l1] = 0;
303 fn2[l2] = 0;
304 result = rename((char *)fn1, (char *)fn2);
305 arm->semihosting_errno = errno;
306 } else {
307 result = -1;
308 arm->semihosting_errno = EINVAL;
309 }
310 }
311 break;
312
313 case 0x11: /* SYS_TIME */
314 result = time(NULL);
315 break;
316
317 case 0x13: /* SYS_ERRNO */
318 result = arm->semihosting_errno;
319 break;
320
321 case 0x15: /* SYS_GET_CMDLINE */
322 retval = target_read_memory(target, r1, 4, 2, params);
323 if (retval != ERROR_OK)
324 return retval;
325 else {
326 uint32_t a = target_buffer_get_u32(target, params+0);
327 uint32_t l = target_buffer_get_u32(target, params+4);
328 char *arg = "foobar";
329 uint32_t s = strlen(arg) + 1;
330 if (l < s)
331 result = -1;
332 else {
333 retval = target_write_buffer(target, a, s, (void*)arg);
334 if (retval != ERROR_OK)
335 return retval;
336 result = 0;
337 }
338 }
339 break;
340
341 case 0x16: /* SYS_HEAPINFO */
342 retval = target_read_memory(target, r1, 4, 1, params);
343 if (retval != ERROR_OK)
344 return retval;
345 else {
346 uint32_t a = target_buffer_get_u32(target, params+0);
347 /* tell the remote we have no idea */
348 memset(params, 0, 4*4);
349 retval = target_write_memory(target, a, 4, 4, params);
350 if (retval != ERROR_OK)
351 return retval;
352 result = 0;
353 }
354 break;
355
356 case 0x18: /* angel_SWIreason_ReportException */
357 switch (r1) {
358 case 0x20026: /* ADP_Stopped_ApplicationExit */
359 fprintf(stderr, "semihosting: *** application exited ***\n");
360 break;
361 case 0x20000: /* ADP_Stopped_BranchThroughZero */
362 case 0x20001: /* ADP_Stopped_UndefinedInstr */
363 case 0x20002: /* ADP_Stopped_SoftwareInterrupt */
364 case 0x20003: /* ADP_Stopped_PrefetchAbort */
365 case 0x20004: /* ADP_Stopped_DataAbort */
366 case 0x20005: /* ADP_Stopped_AddressException */
367 case 0x20006: /* ADP_Stopped_IRQ */
368 case 0x20007: /* ADP_Stopped_FIQ */
369 case 0x20020: /* ADP_Stopped_BreakPoint */
370 case 0x20021: /* ADP_Stopped_WatchPoint */
371 case 0x20022: /* ADP_Stopped_StepComplete */
372 case 0x20023: /* ADP_Stopped_RunTimeErrorUnknown */
373 case 0x20024: /* ADP_Stopped_InternalError */
374 case 0x20025: /* ADP_Stopped_UserInterruption */
375 case 0x20027: /* ADP_Stopped_StackOverflow */
376 case 0x20028: /* ADP_Stopped_DivisionByZero */
377 case 0x20029: /* ADP_Stopped_OSSpecific */
378 default:
379 fprintf(stderr, "semihosting: exception %#x\n",
380 (unsigned) r1);
381 }
382 return target_call_event_callbacks(target, TARGET_EVENT_HALTED);
383
384 case 0x0d: /* SYS_TMPNAM */
385 case 0x10: /* SYS_CLOCK */
386 case 0x12: /* SYS_SYSTEM */
387 case 0x17: /* angel_SWIreason_EnterSVC */
388 case 0x30: /* SYS_ELAPSED */
389 case 0x31: /* SYS_TICKFREQ */
390 default:
391 fprintf(stderr, "semihosting: unsupported call %#x\n",
392 (unsigned) r0);
393 result = -1;
394 arm->semihosting_errno = ENOTSUP;
395 }
396
397 /* resume execution to the original mode */
398
399 if (is_arm7_9(target_to_arm7_9(target)))
400 {
401 /* return value in R0 */
402 buf_set_u32(arm->core_cache->reg_list[0].value, 0, 32, result);
403 arm->core_cache->reg_list[0].dirty = 1;
404
405 /* LR --> PC */
406 buf_set_u32(arm->core_cache->reg_list[15].value, 0, 32, lr);
407 arm->core_cache->reg_list[15].dirty = 1;
408
409 /* saved PSR --> current PSR */
410 buf_set_u32(arm->cpsr->value, 0, 32, spsr);
411 arm->cpsr->dirty = 1;
412 arm->core_mode = spsr & 0x1f;
413 if (spsr & 0x20)
414 arm->core_state = ARM_STATE_THUMB;
415 }
416 else
417 {
418 /* resume execution, this will be pc+2 to skip over the
419 * bkpt instruction */
420
421 /* return result in R0 */
422 buf_set_u32(arm->core_cache->reg_list[0].value, 0, 32, result);
423 arm->core_cache->reg_list[0].dirty = 1;
424 }
425
426 return target_resume(target, 1, 0, 0, 0);
427 }
428
429 /**
430 * Checks for and processes an ARM semihosting request. This is meant
431 * to be called when the target is stopped due to a debug mode entry.
432 * If the value 0 is returned then there was nothing to process. A non-zero
433 * return value signifies that a request was processed and the target resumed,
434 * or an error was encountered, in which case the caller must return
435 * immediately.
436 *
437 * @param target Pointer to the ARM target to process. This target must
438 * not represent an ARMv6-M or ARMv7-M processor.
439 * @param retval Pointer to a location where the return code will be stored
440 * @return non-zero value if a request was processed or an error encountered
441 */
442 int arm_semihosting(struct target *target, int *retval)
443 {
444 struct arm *arm = target_to_arm(target);
445 uint32_t pc, lr, spsr;
446 struct reg *r;
447
448 if (!arm->is_semihosting)
449 return 0;
450
451 if (is_arm7_9(target_to_arm7_9(target)))
452 {
453 if (arm->core_mode != ARM_MODE_SVC)
454 return 0;
455
456 /* Check for PC == 0x00000008 or 0xffff0008: Supervisor Call vector. */
457 r = arm->pc;
458 pc = buf_get_u32(r->value, 0, 32);
459 if (pc != 0x00000008 && pc != 0xffff0008)
460 return 0;
461
462 r = arm_reg_current(arm, 14);
463 lr = buf_get_u32(r->value, 0, 32);
464
465 /* Core-specific code should make sure SPSR is retrieved
466 * when the above checks pass...
467 */
468 if (!arm->spsr->valid) {
469 LOG_ERROR("SPSR not valid!");
470 *retval = ERROR_FAIL;
471 return 1;
472 }
473
474 spsr = buf_get_u32(arm->spsr->value, 0, 32);
475
476 /* check instruction that triggered this trap */
477 if (spsr & (1 << 5)) {
478 /* was in Thumb (or ThumbEE) mode */
479 uint8_t insn_buf[2];
480 uint16_t insn;
481
482 *retval = target_read_memory(target, lr-2, 2, 1, insn_buf);
483 if (*retval != ERROR_OK)
484 return 1;
485 insn = target_buffer_get_u16(target, insn_buf);
486
487 /* SVC 0xab */
488 if (insn != 0xDFAB)
489 return 0;
490 } else if (spsr & (1 << 24)) {
491 /* was in Jazelle mode */
492 return 0;
493 } else {
494 /* was in ARM mode */
495 uint8_t insn_buf[4];
496 uint32_t insn;
497
498 *retval = target_read_memory(target, lr-4, 4, 1, insn_buf);
499 if (*retval != ERROR_OK)
500 return 1;
501 insn = target_buffer_get_u32(target, insn_buf);
502
503 /* SVC 0x123456 */
504 if (insn != 0xEF123456)
505 return 0;
506 }
507 }
508 else if (is_armv7m(target_to_armv7m(target)))
509 {
510 uint16_t insn;
511
512 if (target->debug_reason != DBG_REASON_BREAKPOINT)
513 return 0;
514
515 r = arm->pc;
516 pc = buf_get_u32(r->value, 0, 32);
517
518 pc &= ~1;
519 *retval = target_read_u16(target, pc, &insn);
520 if (*retval != ERROR_OK)
521 return 1;
522
523 /* bkpt 0xAB */
524 if (insn != 0xBEAB)
525 return 0;
526 }
527 else
528 {
529 LOG_ERROR("Unsupported semi-hosting Target");
530 return 0;
531 }
532
533 *retval = do_semihosting(target);
534 return 1;
535 }
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