ARM: simplify ARMv7-A register handling
[openocd.git] / src / target / armv7a.c
1 /***************************************************************************
2 * Copyright (C) 2009 by David Brownell *
3 * *
4 * This program is free software; you can redistribute it and/or modify *
5 * it under the terms of the GNU General Public License as published by *
6 * the Free Software Foundation; either version 2 of the License, or *
7 * (at your option) any later version. *
8 * *
9 * This program is distributed in the hope that it will be useful, *
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
12 * GNU General Public License for more details. *
13 * *
14 * You should have received a copy of the GNU General Public License *
15 * along with this program; if not, write to the *
16 * Free Software Foundation, Inc., *
17 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
18 ***************************************************************************/
19 #ifdef HAVE_CONFIG_H
20 #include "config.h"
21 #endif
22
23 #include "replacements.h"
24
25 #include "armv7a.h"
26 #include "arm_disassembler.h"
27
28 #include "register.h"
29 #include "binarybuffer.h"
30 #include "command.h"
31
32 #include <stdlib.h>
33 #include <string.h>
34 #include <unistd.h>
35
36
37 static const char *armv7a_state_strings[] =
38 {
39 "ARM", "Thumb", "Jazelle", "ThumbEE"
40 };
41
42 static void armv7a_show_fault_registers(struct target *target)
43 {
44 uint32_t dfsr, ifsr, dfar, ifar;
45 struct armv7a_common *armv7a = target_to_armv7a(target);
46
47 armv7a->read_cp15(target, 0, 0, 5, 0, &dfsr);
48 armv7a->read_cp15(target, 0, 1, 5, 0, &ifsr);
49 armv7a->read_cp15(target, 0, 0, 6, 0, &dfar);
50 armv7a->read_cp15(target, 0, 2, 6, 0, &ifar);
51
52 LOG_USER("Data fault registers DFSR: %8.8" PRIx32
53 ", DFAR: %8.8" PRIx32, dfsr, dfar);
54 LOG_USER("Instruction fault registers IFSR: %8.8" PRIx32
55 ", IFAR: %8.8" PRIx32, ifsr, ifar);
56
57 }
58
59 int armv7a_arch_state(struct target *target)
60 {
61 static const char *state[] =
62 {
63 "disabled", "enabled"
64 };
65
66 struct armv7a_common *armv7a = target_to_armv7a(target);
67 struct armv4_5_common_s *armv4_5 = &armv7a->armv4_5_common;
68
69 if (armv7a->common_magic != ARMV7_COMMON_MAGIC)
70 {
71 LOG_ERROR("BUG: called for a non-ARMv7A target");
72 return ERROR_INVALID_ARGUMENTS;
73 }
74
75 LOG_USER("target halted in %s state due to %s, current mode: %s\n"
76 "cpsr: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32 "\n"
77 "MMU: %s, D-Cache: %s, I-Cache: %s",
78 armv7a_state_strings[armv7a->core_state],
79 Jim_Nvp_value2name_simple(nvp_target_debug_reason,
80 target->debug_reason)->name,
81 arm_mode_name(armv4_5->core_mode),
82 buf_get_u32(armv4_5->core_cache
83 ->reg_list[ARMV4_5_CPSR].value, 0, 32),
84 buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32),
85 state[armv7a->armv4_5_mmu.mmu_enabled],
86 state[armv7a->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled],
87 state[armv7a->armv4_5_mmu.armv4_5_cache.i_cache_enabled]);
88
89 if (armv4_5->core_mode == ARMV7A_MODE_ABT)
90 armv7a_show_fault_registers(target);
91
92 return ERROR_OK;
93 }
94
95
96 COMMAND_HANDLER(handle_dap_baseaddr_command)
97 {
98 struct target *target = get_current_target(CMD_CTX);
99 struct armv7a_common *armv7a = target_to_armv7a(target);
100 struct swjdp_common *swjdp = &armv7a->swjdp_info;
101
102 return CALL_COMMAND_HANDLER(dap_baseaddr_command, swjdp);
103 }
104
105 COMMAND_HANDLER(handle_dap_memaccess_command)
106 {
107 struct target *target = get_current_target(CMD_CTX);
108 struct armv7a_common *armv7a = target_to_armv7a(target);
109 struct swjdp_common *swjdp = &armv7a->swjdp_info;
110
111 return CALL_COMMAND_HANDLER(dap_memaccess_command, swjdp);
112 }
113
114 COMMAND_HANDLER(handle_dap_apsel_command)
115 {
116 struct target *target = get_current_target(CMD_CTX);
117 struct armv7a_common *armv7a = target_to_armv7a(target);
118 struct swjdp_common *swjdp = &armv7a->swjdp_info;
119
120 return CALL_COMMAND_HANDLER(dap_apsel_command, swjdp);
121 }
122
123 COMMAND_HANDLER(handle_dap_apid_command)
124 {
125 struct target *target = get_current_target(CMD_CTX);
126 struct armv7a_common *armv7a = target_to_armv7a(target);
127 struct swjdp_common *swjdp = &armv7a->swjdp_info;
128
129 return CALL_COMMAND_HANDLER(dap_apid_command, swjdp);
130 }
131
132 COMMAND_HANDLER(handle_dap_info_command)
133 {
134 struct target *target = get_current_target(CMD_CTX);
135 struct armv7a_common *armv7a = target_to_armv7a(target);
136 struct swjdp_common *swjdp = &armv7a->swjdp_info;
137 uint32_t apsel;
138
139 switch (CMD_ARGC) {
140 case 0:
141 apsel = swjdp->apsel;
142 break;
143 case 1:
144 COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel);
145 break;
146 default:
147 return ERROR_COMMAND_SYNTAX_ERROR;
148 }
149
150 return dap_info_command(CMD_CTX, swjdp, apsel);
151 }
152
153 int armv7a_register_commands(struct command_context *cmd_ctx)
154 {
155 struct command *arm_adi_v5_dap_cmd;
156
157 arm_adi_v5_dap_cmd = register_command(cmd_ctx, NULL, "dap",
158 NULL, COMMAND_ANY,
159 "cortex dap specific commands");
160
161 register_command(cmd_ctx, arm_adi_v5_dap_cmd, "info",
162 handle_dap_info_command, COMMAND_EXEC,
163 "dap info for ap [num], "
164 "default currently selected AP");
165 register_command(cmd_ctx, arm_adi_v5_dap_cmd, "apsel",
166 handle_dap_apsel_command, COMMAND_EXEC,
167 "select a different AP [num] (default 0)");
168 register_command(cmd_ctx, arm_adi_v5_dap_cmd, "apid",
169 handle_dap_apid_command, COMMAND_EXEC,
170 "return id reg from AP [num], "
171 "default currently selected AP");
172 register_command(cmd_ctx, arm_adi_v5_dap_cmd, "baseaddr",
173 handle_dap_baseaddr_command, COMMAND_EXEC,
174 "return debug base address from AP [num], "
175 "default currently selected AP");
176 register_command(cmd_ctx, arm_adi_v5_dap_cmd, "memaccess",
177 handle_dap_memaccess_command, COMMAND_EXEC,
178 "set/get number of extra tck for mem-ap memory "
179 "bus access [0-255]");
180
181 return ERROR_OK;
182 }

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