src/target/armv7a.h

   1 /***************************************************************************
   2  *    Copyright (C) 2009 by David Brownell                                 *
   3  *                                                                         *
   4  *   This program is free software; you can redistribute it and/or modify  *
   5  *   it under the terms of the GNU General Public License as published by  *
   6  *   the Free Software Foundation; either version 2 of the License, or     *
   7  *   (at your option) any later version.                                   *
   8  *                                                                         *
   9  *   This program is distributed in the hope that it will be useful,       *
  10  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  11  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  12  *   GNU General Public License for more details.                          *
  13  *                                                                         *
  14  *   You should have received a copy of the GNU General Public License     *
  15  *   along with this program; if not, write to the                         *
  16  *   Free Software Foundation, Inc.,                                       *
  17  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  18  ***************************************************************************/
  19 #ifndef ARMV7A_H
  20 #define ARMV7A_H
  21
  22 #include "arm_adi_v5.h"
  23 #include "armv4_5.h"
  24 #include "armv4_5_mmu.h"
  25 #include "armv4_5_cache.h"
  26
  27
  28 typedef enum armv7a_state
  29 {
  30         ARMV7A_STATE_ARM,
  31         ARMV7A_STATE_THUMB,
  32         ARMV7A_STATE_JAZELLE,
  33         ARMV7A_STATE_THUMBEE,
  34 } armv7a_state_t;
  35
  36 enum
  37 {
  38         ARM_PC  = 15,
  39         ARM_CPSR = 16
  40 }
  41 ;
  42 /* offsets into armv4_5 core register cache */
  43 enum
  44 {
  45         ARMV7A_CPSR = 31,
  46         ARMV7A_SPSR_FIQ = 32,
  47         ARMV7A_SPSR_IRQ = 33,
  48         ARMV7A_SPSR_SVC = 34,
  49         ARMV7A_SPSR_ABT = 35,
  50         ARMV7A_SPSR_UND = 36
  51 };
  52
  53 #define ARMV7_COMMON_MAGIC 0x0A450999
  54
  55 /* VA to PA translation operations opc2 values*/
  56 #define V2PCWPR  0
  57 #define V2PCWPW  1
  58 #define V2PCWUR  2
  59 #define V2PCWUW  3
  60 #define V2POWPR  4
  61 #define V2POWPW  5
  62 #define V2POWUR  6
  63 #define V2POWUW  7
  64
  65 struct armv7a_common
  66 {
  67         int common_magic;
  68         struct reg_cache *core_cache;
  69         enum armv7a_state core_state;
  70
  71         /* arm adp debug port */
  72         struct swjdp_common swjdp_info;
  73
  74         /* Core Debug Unit */
  75         uint32_t debug_base;
  76         uint8_t debug_ap;
  77         uint8_t memory_ap;
  78
  79         /* Cache and Memory Management Unit */
  80         struct armv4_5_mmu_common armv4_5_mmu;
  81         struct arm armv4_5_common;
  82
  83         int (*read_cp15)(struct target *target,
  84                         uint32_t op1, uint32_t op2,
  85                         uint32_t CRn, uint32_t CRm, uint32_t *value);
  86         int (*write_cp15)(struct target *target,
  87                         uint32_t op1, uint32_t op2,
  88                         uint32_t CRn, uint32_t CRm, uint32_t value);
  89
  90         int (*examine_debug_reason)(struct target *target);
  91         void (*post_debug_entry)(struct target *target);
  92
  93         void (*pre_restore_context)(struct target *target);
  94         void (*post_restore_context)(struct target *target);
  95
  96 };
  97
  98 static inline struct armv7a_common *
  99 target_to_armv7a(struct target *target)
 100 {
 101         return container_of(target->arch_info, struct armv7a_common,
 102                         armv4_5_common);
 103 }
 104
 105 struct armv7a_algorithm
 106 {
 107         int common_magic;
 108
 109         enum armv4_5_mode core_mode;
 110         enum armv7a_state core_state;
 111 };
 112
 113 struct armv7a_core_reg
 114 {
 115         int num;
 116         enum armv4_5_mode mode;
 117         struct target *target;
 118         struct armv7a_common *armv7a_common;
 119 };
 120
 121 int armv7a_arch_state(struct target *target);
 122 struct reg_cache *armv7a_build_reg_cache(struct target *target,
 123                 struct armv7a_common *armv7a_common);
 124 int armv7a_register_commands(struct command_context *cmd_ctx);
 125 int armv7a_init_arch_info(struct target *target, struct armv7a_common *armv7a);
 126
 127 #endif /* ARMV4_5_H */