src/target/event/wi-9c_reset.script

   1 mww 0x90600104 0x33313333
   2 mww 0xA0700000 0x00000001  # Enable the memory controller.
   3 mww 0xA0700024 0x00000006  # Set the refresh counter 6
   4 mww 0xA0700028 0x00000001  #
   5 mww 0xA0700030 0x00000001  # Set the precharge period
   6 mww 0xA0700034 0x00000004  # Active to precharge command period is 16 clock cycles
   7 mww 0xA070003C 0x00000001  # tAPR
   8 mww 0xA0700040 0x00000005  # tDAL
   9 mww 0xA0700044 0x00000001  # tWR
  10 mww 0xA0700048 0x00000006  # tRC 32 clock cycles
  11 mww 0xA070004C 0x00000006  # tRFC 32 clock cycles
  12 mww 0xA0700054 0x00000001  # tRRD
  13 mww 0xA0700058 0x00000001  # tMRD
  14 mww 0xA0700100 0x00004280  # Dynamic Config 0 (cs4)
  15 mww 0xA0700120 0x00004280  # Dynamic Config 1 (cs5)
  16 mww 0xA0700140 0x00004280  # Dynamic Config 2 (cs6)
  17 mww 0xA0700160 0x00004280  # Dynamic Config 3 (cs7)
  18 #
  19 mww 0xA0700104 0x00000203  # CAS latency is 2 at 100 MHz
  20 mww 0xA0700124 0x00000203  # CAS latency is 2 at 100 MHz
  21 mww 0xA0700144 0x00000203  # CAS latency is 2 at 100 MHz
  22 mww 0xA0700164 0x00000203  # CAS latency is 2 at 100 MHz
  23 #
  24 mww 0xA0700020 0x00000103  # issue SDRAM PALL command
  25 #
  26 mww 0xA0700024 0x00000001  # Set the refresh counter to be as small as possible
  27 #
  28 # Add some dummy writes to give the SDRAM time to settle, it needs two
  29 # AHB clock cycles, here we poke in the debugger flag, this lets
  30 # the software know that we are in the debugger
  31 mww 0xA0900000 0x00000002
  32 mww 0xA0900000 0x00000002
  33 mww 0xA0900000 0x00000002
  34 mww 0xA0900000 0x00000002
  35 mww 0xA0900000 0x00000002
  36 #
  37 mdw 0xA0900000
  38 mdw 0xA0900000
  39 mdw 0xA0900000
  40 mdw 0xA0900000
  41 mdw 0xA0900000
  42 #
  43 mww 0xA0700024 0x00000030 # Set the refresh counter to 30
  44 mww 0xA0700020 0x00000083 # Issue SDRAM MODE command
  45 #
  46 # Next we perform a read of RAM.
  47 # mw = move word.
  48 mdw 0x00022000
  49 # mw 0x00022000:P, r3  # 22000 for cas2 latency, 32000 for cas 3
  50 #
  51 mww 0xA0700020 0x00000003   # issue SDRAM NORMAL command
  52 mww 0xA0700100 0x00084280   # Enable buffer access
  53 mww 0xA0700120 0x00084280   # Enable buffer access
  54 mww 0xA0700140 0x00084280   # Enable buffer access
  55 mww 0xA0700160 0x00084280   # Enable buffer access
  56
  57 #Set byte lane state (static mem 1)"
  58 mww 0xA0700220, 0x00000082
  59 #Flash Start
  60 mww 0xA09001F8, 0x50000000
  61 #Flash Mask Reg
  62 mww 0xA09001FC, 0xFF000001
  63 mww 0xA0700028, 0x00000001
  64
  65 #  RAMAddr = 0x00020000
  66 #  RAMSize = 0x00004000
  67
  68 # Set the processor mode
  69 reg cpsr 0xd3
  70