src/target/nds32_aice.h

   1 /***************************************************************************
   2  *   Copyright (C) 2013 Andes technology.                                  *
   3  *   Hsiangkai Wang <hkwang@andestech.com>                                 *
   4  *                                                                         *
   5  *   This program is free software; you can redistribute it and/or modify  *
   6  *   it under the terms of the GNU General Public License as published by  *
   7  *   the Free Software Foundation; either version 2 of the License, or     *
   8  *   (at your option) any later version.                                   *
   9  *                                                                         *
  10  *   This program is distributed in the hope that it will be useful,       *
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  13  *   GNU General Public License for more details.                          *
  14  *                                                                         *
  15  *   You should have received a copy of the GNU General Public License     *
  16  *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  17  ***************************************************************************/
  18 #ifndef __NDS32_AICE_H__
  19 #define __NDS32_AICE_H__
  20
  21 #include <jtag/aice/aice_port.h>
  22
  23 int aice_read_reg_64(struct aice_port_s *aice, uint32_t num, uint64_t *val);
  24 int aice_write_reg_64(struct aice_port_s *aice, uint32_t num, uint64_t val);
  25 int aice_read_tlb(struct aice_port_s *aice, uint32_t virtual_address,
  26                 uint32_t *physical_address);
  27 int aice_cache_ctl(struct aice_port_s *aice, uint32_t subtype, uint32_t address);
  28 int aice_set_retry_times(struct aice_port_s *aice, uint32_t a_retry_times);
  29 int aice_program_edm(struct aice_port_s *aice, char *command_sequence);
  30 int aice_set_command_mode(struct aice_port_s *aice,
  31                 enum aice_command_mode command_mode);
  32 int aice_execute(struct aice_port_s *aice, uint32_t *instructions,
  33                 uint32_t instruction_num);
  34 int aice_set_custom_srst_script(struct aice_port_s *aice, const char *script);
  35 int aice_set_custom_trst_script(struct aice_port_s *aice, const char *script);
  36 int aice_set_custom_restart_script(struct aice_port_s *aice, const char *script);
  37 int aice_set_count_to_check_dbger(struct aice_port_s *aice, uint32_t count_to_check);
  38 int aice_profiling(struct aice_port_s *aice, uint32_t interval, uint32_t iteration,
  39                 uint32_t reg_no, uint32_t *samples, uint32_t *num_samples);
  40
  41 static inline int aice_open(struct aice_port_s *aice, struct aice_port_param_s *param)
  42 {
  43         return aice->port->api->open(param);
  44 }
  45
  46 static inline int aice_close(struct aice_port_s *aice)
  47 {
  48         return aice->port->api->close();
  49 }
  50
  51 static inline int aice_reset(struct aice_port_s *aice)
  52 {
  53         return aice->port->api->reset();
  54 }
  55
  56 static inline int aice_assert_srst(struct aice_port_s *aice,
  57                 enum aice_srst_type_s srst)
  58 {
  59         return aice->port->api->assert_srst(aice->coreid, srst);
  60 }
  61
  62 static inline int aice_run(struct aice_port_s *aice)
  63 {
  64         return aice->port->api->run(aice->coreid);
  65 }
  66
  67 static inline int aice_halt(struct aice_port_s *aice)
  68 {
  69         return aice->port->api->halt(aice->coreid);
  70 }
  71
  72 static inline int aice_step(struct aice_port_s *aice)
  73 {
  74         return aice->port->api->step(aice->coreid);
  75 }
  76
  77 static inline int aice_read_register(struct aice_port_s *aice, uint32_t num,
  78                 uint32_t *val)
  79 {
  80         return aice->port->api->read_reg(aice->coreid, num, val);
  81 }
  82
  83 static inline int aice_write_register(struct aice_port_s *aice, uint32_t num,
  84                 uint32_t val)
  85 {
  86         return aice->port->api->write_reg(aice->coreid, num, val);
  87 }
  88
  89 static inline int aice_read_debug_reg(struct aice_port_s *aice, uint32_t addr,
  90                 uint32_t *val)
  91 {
  92         return aice->port->api->read_debug_reg(aice->coreid, addr, val);
  93 }
  94
  95 static inline int aice_write_debug_reg(struct aice_port_s *aice, uint32_t addr,
  96                 const uint32_t val)
  97 {
  98         return aice->port->api->write_debug_reg(aice->coreid, addr, val);
  99 }
 100
 101 static inline int aice_read_mem_unit(struct aice_port_s *aice, uint32_t addr,
 102                 uint32_t size, uint32_t count, uint8_t *buffer)
 103 {
 104         return aice->port->api->read_mem_unit(aice->coreid, addr, size, count, buffer);
 105 }
 106
 107 static inline int aice_write_mem_unit(struct aice_port_s *aice, uint32_t addr,
 108                 uint32_t size, uint32_t count, const uint8_t *buffer)
 109 {
 110         return aice->port->api->write_mem_unit(aice->coreid, addr, size, count, buffer);
 111 }
 112
 113 static inline int aice_read_mem_bulk(struct aice_port_s *aice, uint32_t addr,
 114                 uint32_t length, uint8_t *buffer)
 115 {
 116         return aice->port->api->read_mem_bulk(aice->coreid, addr, length, buffer);
 117 }
 118
 119 static inline int aice_write_mem_bulk(struct aice_port_s *aice, uint32_t addr,
 120                 uint32_t length, const uint8_t *buffer)
 121 {
 122         return aice->port->api->write_mem_bulk(aice->coreid, addr, length, buffer);
 123 }
 124
 125 static inline int aice_idcode(struct aice_port_s *aice, uint32_t *idcode,
 126                 uint8_t *num_of_idcode)
 127 {
 128         return aice->port->api->idcode(idcode, num_of_idcode);
 129 }
 130
 131 static inline int aice_state(struct aice_port_s *aice,
 132                 enum aice_target_state_s *state)
 133 {
 134         return aice->port->api->state(aice->coreid, state);
 135 }
 136
 137 static inline int aice_set_jtag_clock(struct aice_port_s *aice, uint32_t a_clock)
 138 {
 139         return aice->port->api->set_jtag_clock(a_clock);
 140 }
 141
 142 static inline int aice_memory_access(struct aice_port_s *aice,
 143                 enum nds_memory_access a_access)
 144 {
 145         return aice->port->api->memory_access(aice->coreid, a_access);
 146 }
 147
 148 static inline int aice_memory_mode(struct aice_port_s *aice,
 149                 enum nds_memory_select mem_select)
 150 {
 151         return aice->port->api->memory_mode(aice->coreid, mem_select);
 152 }
 153
 154 static inline int aice_set_data_endian(struct aice_port_s *aice,
 155                 enum aice_target_endian target_data_endian)
 156 {
 157         return aice->port->api->set_data_endian(aice->coreid, target_data_endian);
 158 }
 159
 160 #endif