src/target/stm8.h

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 /*
   4 *   OpenOCD STM8 target driver
   5 *   Copyright (C) 2017  Ake Rehnman
   6 *   ake.rehnman(at)gmail.com
   7 */
   8
   9 #ifndef OPENOCD_TARGET_STM8_H
  10 #define OPENOCD_TARGET_STM8_H
  11
  12 struct target;
  13
  14 #define STM8_COMMON_MAGIC       0x53544D38U
  15 #define STM8_NUM_CORE_REGS 6
  16
  17 struct stm8_common {
  18         unsigned int common_magic;
  19
  20         void *arch_info;
  21         struct reg_cache *core_cache;
  22         uint32_t core_regs[STM8_NUM_CORE_REGS];
  23
  24         /* working area for fastdata access */
  25         struct working_area *fast_data_area;
  26
  27         bool swim_configured;
  28         bool bp_scanned;
  29         uint8_t num_hw_bpoints;
  30         uint8_t num_hw_bpoints_avail;
  31         struct stm8_comparator *hw_break_list;
  32         uint32_t blocksize;
  33         uint32_t flashstart;
  34         uint32_t flashend;
  35         uint32_t eepromstart;
  36         uint32_t eepromend;
  37         uint32_t optionstart;
  38         uint32_t optionend;
  39         bool enable_step_irq;
  40
  41         bool enable_stm8l;
  42         uint32_t flash_cr2;
  43         uint32_t flash_ncr2;
  44         uint32_t flash_iapsr;
  45         uint32_t flash_dukr;
  46         uint32_t flash_pukr;
  47
  48         /* cc value used for interrupt flags restore */
  49         uint32_t cc;
  50         bool cc_valid;
  51
  52         /* register cache to processor synchronization */
  53         int (*read_core_reg)(struct target *target, unsigned int num);
  54         int (*write_core_reg)(struct target *target, unsigned int num);
  55 };
  56
  57 static inline struct stm8_common *
  58 target_to_stm8(struct target *target)
  59 {
  60         return target->arch_info;
  61 }
  62
  63 #endif /* OPENOCD_TARGET_STM8_H */