jtag newtap change & huge manual update
[openocd.git] / src / target / target / aduc702x.cfg
1 ## -*- tcl -*-
2 ##
3
4
5 if { [info exists CHIPNAME] } {
6 set _CHIPNAME $CHIPNAME
7 } else {
8 set _CHIPNAME s3c2410
9 }
10
11 if { [info exists ENDIAN] } {
12 set _ENDIAN $ENDIAN
13 } else {
14 # This config file was defaulting to big endian..
15 set _ENDIAN little
16 }
17
18 if { [info exists CPUTAPID] } {
19 set _CPUTAPID $CPUTAPID
20 } else {
21 set _CPUTAPID 0xffffffff
22 }
23
24
25 jtag_nsrst_delay 200
26 jtag_ntrst_delay 200
27
28 # This is for the case that TRST/SRST is not wired on your JTAG adaptor.
29 # Don't really need them anyways.
30 reset_config none
31
32 ## JTAG scan chain
33 #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
34 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
35
36 ##
37 ## Target configuration
38 ##
39 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
40 target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
41
42 ## flash configuration
43 flash bank aduc702x 0x80000 0x10000 2 2 0
44
45 ## If you use the watchdog, the following code makes sure that the board
46 ## doesn't reboot when halted via JTAG. Yes, on the older generation
47 ## AdUC702x, timer3 continues running even when the CPU is halted.
48
49 proc watchdog_service {} {
50 global watchdog_hdl
51 mww 0xffff036c 0
52 # puts "watchdog!!"
53 set watchdog_hdl [after 500 watchdog_service]
54 }
55
56 $_TARGETNAME configure -event reset-halt-post { watchdog_service }
57 $_TARGETNAME configure -event old-pre_resume { global watchdog_hdl; after cancel $watchdog_hdl }

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