4 #use combined on interfaces or targets that can't set TRST/SRST separately
5 reset_config trst_and_srst
8 #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
9 jtag_device 4 0x1 0xf 0xe
10 jtag_device 5 0x1 0x1 0x1e
12 #target <type> <startup mode>
13 #target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
14 target cortex_m3 little reset_halt 0
15 run_and_halt_time 0 30
17 working_area 0 0x20000000 16384 nobackup
19 #flash bank str7x <base> <size> 0 0 <target#> <variant>
20 flash bank stm32x 0 0 0 0 0
22 # For more information about the configuration files, take a look at:
23 # http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger
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