src/target/target/str912.cfg

   1 # script for str9
   2
   3 # jtag speed. We need to stick to 16kHz until we've finished reset.
   4
   5 jtag_khz 16
   6 proc target_0_pre_reset {} {
   7         jtag_khz 16
   8 }
   9
  10 proc target_0_post_reset {} {
  11         # We can increase speed now that we know the target is halted.
  12         jtag_khz 3000
  13
  14         # -- Enable 96K RAM
  15         # PFQBC enabled / DTCM & AHB wait-states disabled
  16         mww 0x5C002034 0x0191
  17
  18         str9x flash_config 0 4 2 0 0x80000
  19         flash protect 0 0 7 off
  20
  21
  22 }
  23
  24
  25 jtag_nsrst_delay 100
  26 jtag_ntrst_delay 100
  27
  28 #use combined on interfaces or targets that can't set TRST/SRST separately
  29 reset_config trst_and_srst
  30
  31 #jtag scan chain
  32 #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
  33 jtag_device 8 0x1 0x1 0xfe
  34 jtag_device 4 0x1 0xf 0xe
  35 jtag_device 5 0x1 0x1 0x1e
  36
  37 #target <type> <startup mode>
  38 #target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
  39 target arm966e little 1 arm966e
  40 run_and_halt_time 0 30
  41
  42
  43 working_area 0 0x50000000 16384 nobackup
  44
  45 #flash bank str9x <base> <size> 0 0 <target#> <variant>
  46 flash bank str9x 0x00000000 0x00080000 0 0 0
  47 flash bank str9x 0x00080000 0x00008000 0 0 0
  48
  49 # For more information about the configuration files, take a look at:
  50 # http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger