src/target/target/str912.cfg

   1 # script for str9
   2
   3 if { [info exists CHIPNAME] } {
   4    set  _CHIPNAME $CHIPNAME
   5 } else {
   6    set  _CHIPNAME str912
   7 }
   8
   9 if { [info exists ENDIAN] } {
  10    set  _ENDIAN $ENDIAN
  11 } else {
  12    set  _ENDIAN little
  13 }
  14
  15
  16
  17 # jtag speed. We need to stick to 16kHz until we've finished reset.
  18 jtag_rclk 16
  19
  20 jtag_nsrst_delay 100
  21 jtag_ntrst_delay 100
  22
  23 #use combined on interfaces or targets that can't set TRST/SRST separately
  24 reset_config trst_and_srst
  25
  26 if { [info exists FLASHTAPID ] } {
  27    set _FLASHTAPID $FLASHTAPID
  28 } else {
  29    set _FLASHTAPID 0x25966041
  30 }
  31 jtag newtap $_CHIPNAME flash -irlen 8 -ircapture 0x1 -irmask 0xfe -expected-id $_FLASHTAPID
  32
  33 if { [info exists CPUTAPID ] } {
  34    set _CPUTAPID $CPUTAPID
  35 } else {
  36    set _CPUTAPID 0x25966041
  37 }
  38 jtag newtap $_CHIPNAME cpu   -irlen 4 -ircapture 0x1 -irmask 0xe -expected-id $_CPUTAPID
  39
  40
  41 if { [info exists BSTAPID ] } {
  42    set _BSTAPID $BSTAPID
  43 } else {
  44    set _BSTAPID 0x1457f041
  45 }
  46 jtag newtap $_CHIPNAME bs    -irlen 5 -ircapture 0x1 -irmask 0x1e -expected-id $_BSTAPID
  47
  48 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
  49 target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm966e
  50
  51 $_TARGETNAME configure -event reset-start { jtag_rclk 16 }
  52
  53 $_TARGETNAME configure -event reset-init {
  54         # We can increase speed now that we know the target is halted.
  55         #jtag_rclk 3000
  56
  57         # -- Enable 96K RAM
  58         # PFQBC enabled / DTCM & AHB wait-states disabled
  59         mww 0x5C002034 0x0191
  60
  61         str9x flash_config 0 4 2 0 0x80000
  62         flash protect 0 0 7 off
  63 }
  64
  65 $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x50000000 -work-area-size 16384 -work-area-backup 0
  66
  67 #flash bank str9x <base> <size> 0 0 <target#> <variant>
  68 flash bank str9x 0x00000000 0x00080000 0 0 0
  69 flash bank str9x 0x00080000 0x00008000 0 0 0
  70
  71 # For more information about the configuration files, take a look at:
  72 # openocd.texi