cd0ec11c62b330b5b41a8610fc87c9a52648103c
[openocd.git] / src / target / target / str912.cfg
1 # script for str9
2
3 # jtag speed. We need to stick to 16kHz until we've finished reset.
4
5 jtag_rclk 16
6
7
8 jtag_nsrst_delay 100
9 jtag_ntrst_delay 100
10
11 #use combined on interfaces or targets that can't set TRST/SRST separately
12 reset_config trst_and_srst
13
14 #jtag scan chain
15 #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
16 jtag_device 8 0x1 0x1 0xfe
17 jtag_device 4 0x1 0xf 0xe
18 jtag_device 5 0x1 0x1 0x1e
19
20 #target <type> <startup mode>
21 #target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
22 target arm966e little 1 arm966e
23
24 [new_target_name] configure -event reset-start { jtag_rclk 16 }
25
26 [new_target_name] configure -event reset-init {
27 # We can increase speed now that we know the target is halted.
28 jtag_rclk 3000
29
30 # -- Enable 96K RAM
31 # PFQBC enabled / DTCM & AHB wait-states disabled
32 mww 0x5C002034 0x0191
33
34 str9x flash_config 0 4 2 0 0x80000
35 flash protect 0 0 7 off
36 }
37
38
39
40 working_area 0 0x50000000 16384 nobackup
41
42 #flash bank str9x <base> <size> 0 0 <target#> <variant>
43 flash bank str9x 0x00000000 0x00080000 0 0 0
44 flash bank str9x 0x00080000 0x00008000 0 0 0
45
46 # For more information about the configuration files, take a look at:
47 # openocd.texi

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