arm7/9: fix "reset run + halt"
[openocd.git] / src / target / target_type.h
1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
4 * *
5 * Copyright (C) 2007-2010 Øyvind Harboe *
6 * oyvind.harboe@zylin.com *
7 * *
8 * Copyright (C) 2008 by Spencer Oliver *
9 * spen@spen-soft.co.uk *
10 * *
11 * This program is free software; you can redistribute it and/or modify *
12 * it under the terms of the GNU General Public License as published by *
13 * the Free Software Foundation; either version 2 of the License, or *
14 * (at your option) any later version. *
15 * *
16 * This program is distributed in the hope that it will be useful, *
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
19 * GNU General Public License for more details. *
20 * *
21 * You should have received a copy of the GNU General Public License *
22 * along with this program; if not, write to the *
23 * Free Software Foundation, Inc., *
24 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
25 ***************************************************************************/
26 #ifndef TARGET_TYPE_H
27 #define TARGET_TYPE_H
28
29 #include <helper/types.h>
30
31 struct target;
32
33 /**
34 * This holds methods shared between all instances of a given target
35 * type. For example, all Cortex-M3 targets on a scan chain share
36 * the same method table.
37 */
38 struct target_type
39 {
40 /**
41 * Name of this type of target. Do @b not access this
42 * field directly, use target_type_name() instead.
43 */
44 char *name;
45
46 /* poll current target status */
47 int (*poll)(struct target *target);
48 /* Invoked only from target_arch_state().
49 * Issue USER() w/architecture specific status. */
50 int (*arch_state)(struct target *target);
51
52 /* target request support */
53 int (*target_request_data)(struct target *target, uint32_t size, uint8_t *buffer);
54
55 /* halt will log a warning, but return ERROR_OK if the target is already halted. */
56 int (*halt)(struct target *target);
57 int (*resume)(struct target *target, int current, uint32_t address, int handle_breakpoints, int debug_execution);
58 int (*step)(struct target *target, int current, uint32_t address, int handle_breakpoints);
59
60 /* target reset control. assert reset can be invoked when OpenOCD and
61 * the target is out of sync.
62 *
63 * A typical example is that the target was power cycled while OpenOCD
64 * thought the target was halted or running.
65 *
66 * assert_reset() can therefore make no assumptions whatsoever about the
67 * state of the target
68 *
69 * Before assert_reset() for the target is invoked, a TRST/tms and
70 * chain validation is executed. TRST should not be asserted
71 * during target assert unless there is no way around it due to
72 * the way reset's are configured.
73 *
74 */
75 int (*assert_reset)(struct target *target);
76 /**
77 * The implementation is responsible for polling the
78 * target such that target->state reflects the
79 * state correctly.
80 *
81 * Otherwise the following would fail, as there will not
82 * be any "poll" invoked inbetween the "reset run" and
83 * "halt".
84 *
85 * reset run; halt
86 */
87 int (*deassert_reset)(struct target *target);
88 int (*soft_reset_halt_imp)(struct target *target);
89 int (*soft_reset_halt)(struct target *target);
90
91 /**
92 * Target register access for GDB. Do @b not call this function
93 * directly, use target_get_gdb_reg_list() instead.
94 *
95 * Danger! this function will succeed even if the target is running
96 * and return a register list with dummy values.
97 *
98 * The reason is that GDB connection will fail without a valid register
99 * list, however it is after GDB is connected that monitor commands can
100 * be run to properly initialize the target
101 */
102 int (*get_gdb_reg_list)(struct target *target, struct reg **reg_list[], int *reg_list_size);
103
104 /* target memory access
105 * size: 1 = byte (8bit), 2 = half-word (16bit), 4 = word (32bit)
106 * count: number of items of <size>
107 */
108 int (*read_memory_imp)(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
109 /**
110 * Target memory read callback. Do @b not call this function
111 * directly, use target_read_memory() instead.
112 */
113 int (*read_memory)(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
114 int (*write_memory_imp)(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
115 /**
116 * Target memory write callback. Do @b not call this function
117 * directly, use target_write_memory() instead.
118 */
119 int (*write_memory)(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
120
121 /**
122 * Write target memory in multiples of 4 bytes, optimized for
123 * writing large quantities of data. Do @b not call this
124 * function directly, use target_bulk_write_memory() instead.
125 */
126 int (*bulk_write_memory)(struct target *target, uint32_t address, uint32_t count, uint8_t *buffer);
127
128 int (*checksum_memory)(struct target *target, uint32_t address, uint32_t count, uint32_t* checksum);
129 int (*blank_check_memory)(struct target *target, uint32_t address, uint32_t count, uint32_t* blank);
130
131 /*
132 * target break-/watchpoint control
133 * rw: 0 = write, 1 = read, 2 = access
134 *
135 * Target must be halted while this is invoked as this
136 * will actually set up breakpoints on target.
137 *
138 * The breakpoint hardware will be set up upon adding the
139 * first breakpoint.
140 *
141 * Upon GDB connection all breakpoints/watchpoints are cleared.
142 */
143 int (*add_breakpoint)(struct target *target, struct breakpoint *breakpoint);
144
145 /* remove breakpoint. hw will only be updated if the target
146 * is currently halted.
147 * However, this method can be invoked on unresponsive targets.
148 */
149 int (*remove_breakpoint)(struct target *target, struct breakpoint *breakpoint);
150
151 /* add watchpoint ... see add_breakpoint() comment above. */
152 int (*add_watchpoint)(struct target *target, struct watchpoint *watchpoint);
153
154 /* remove watchpoint. hw will only be updated if the target
155 * is currently halted.
156 * However, this method can be invoked on unresponsive targets.
157 */
158 int (*remove_watchpoint)(struct target *target, struct watchpoint *watchpoint);
159
160 /**
161 * Target algorithm support. Do @b not call this method directly,
162 * use target_run_algorithm() instead.
163 */
164 int (*run_algorithm)(struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_param, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info);
165
166 const struct command_registration *commands;
167
168 /* called when target is created */
169 int (*target_create)(struct target *target, Jim_Interp *interp);
170
171 /* called for various config parameters */
172 /* returns JIM_CONTINUE - if option not understood */
173 /* otherwise: JIM_OK, or JIM_ERR, */
174 int (*target_jim_configure)(struct target *target, Jim_GetOptInfo *goi);
175
176 /* target commands specifically handled by the target */
177 /* returns JIM_OK, or JIM_ERR, or JIM_CONTINUE - if option not understood */
178 int (*target_jim_commands)(struct target *target, Jim_GetOptInfo *goi);
179
180 /**
181 * This method is used to perform target setup that requires
182 * JTAG access.
183 *
184 * This may be called multiple times. It is called after the
185 * scan chain is initially validated, or later after the target
186 * is enabled by a JRC. It may also be called during some
187 * parts of the reset sequence.
188 *
189 * For one-time initialization tasks, use target_was_examined()
190 * and target_set_examined(). For example, probe the hardware
191 * before setting up chip-specific state, and then set that
192 * flag so you don't do that again.
193 */
194 int (*examine)(struct target *target);
195
196 /* Set up structures for target.
197 *
198 * It is illegal to talk to the target at this stage as this fn is invoked
199 * before the JTAG chain has been examined/verified
200 * */
201 int (*init_target)(struct command_context *cmd_ctx, struct target *target);
202
203 /* translate from virtual to physical address. Default implementation is successful
204 * no-op(i.e. virtual==physical).
205 */
206 int (*virt2phys)(struct target *target, uint32_t address, uint32_t *physical);
207
208 /* read directly from physical memory. caches are bypassed and untouched.
209 *
210 * If the target does not support disabling caches, leaving them untouched,
211 * then minimally the actual physical memory location will be read even
212 * if cache states are unchanged, flushed, etc.
213 *
214 * Default implementation is to call read_memory.
215 */
216 int (*read_phys_memory)(struct target *target, uint32_t phys_address, uint32_t size, uint32_t count, uint8_t *buffer);
217
218 /*
219 * same as read_phys_memory, except that it writes...
220 */
221 int (*write_phys_memory)(struct target *target, uint32_t phys_address, uint32_t size, uint32_t count, uint8_t *buffer);
222
223 int (*mmu)(struct target *target, int *enabled);
224
225 /* after reset is complete, the target can check if things are properly set up.
226 *
227 * This can be used to check if e.g. DCC memory writes have been enabled for
228 * arm7/9 targets, which they really should except in the most contrived
229 * circumstances.
230 */
231 int (*check_reset)(struct target *target);
232 };
233
234 #endif // TARGET_TYPE_H

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