tcl/board/or1k_generic.cfg

   1 # If you want to use the VJTAG TAP or the XILINX BSCAN,
   2 # you must set your FPGA TAP ID here
   3
   4 set FPGATAPID 0x020b30dd
   5
   6 # Choose your TAP core (VJTAG , MOHOR or XILINX_BSCAN)
   7 set TAP_TYPE VJTAG
   8 # Set your chip name
   9 set CHIPNAME or1200
  10
  11 source [find target/or1k.cfg]
  12
  13 # Set the adapter speed
  14 adapter_khz 3000
  15
  16 # Enable the target description feature
  17 gdb_target_description enable
  18
  19 # Add a new register in the cpu register list. This register will be
  20 # included in the generated target descriptor file.
  21 # format is addreg [name] [address] [feature] [reg_group]
  22 addreg rtest 0x1234 org.gnu.gdb.or1k.group0 system
  23
  24 # Override default init_reset
  25 proc init_reset {mode} {
  26         soft_reset_halt
  27         resume
  28 }
  29
  30 # Target initialization
  31 init
  32 echo "Halting processor"
  33 halt
  34
  35 foreach name [target names] {
  36         set y [$name cget -endian]
  37         set z [$name cget -type]
  38         puts [format "Chip is %s, Endian: %s, type: %s" \
  39               $name $y $z]
  40 }
  41
  42 set c_blue  "\033\[01;34m"
  43 set c_reset "\033\[0m"
  44
  45 puts [format "%sTarget ready...%s" $c_blue $c_reset]