tcl/board/sayma_amc.cfg

   1 # Sayma AMC is an FPGA board for the µTCA AMC format
   2 # The board is open hardware (CERN OHL) and the gateware and software
   3 # running on it are open source (ARTIQ, LGPLv3+).
   4 #
   5 # https://github.com/m-labs/sinara/wiki/Sayma
   6 #
   7 # It contains a Xilinx Kintex Ultrascale 040 FPGA (xcku040).
   8 # There is a SCANSTA112SM JTAG router on the board which is configured to
   9 # automatically add devices to the JTAG svcan chain when they are added.
  10 # Sayma AMC is usually combined with Sayma RTM (rear transition module)
  11 # which features an Artix 7 FPGA.
  12
  13 interface ftdi
  14 ftdi_device_desc "Quad RS232-HS"
  15 ftdi_vid_pid 0x0403 0x6011
  16 ftdi_channel 0
  17 # Use this to distinguish multiple boards by topology
  18 #ftdi_location 5:1
  19 # sampling on falling edge generally seems to work and accelerates things but
  20 # is not fully tested
  21 #ftdi_tdo_sample_edge falling
  22 # EN_USB_JTAG on ADBUS7: out, high
  23 # USB_nTRST on ADBUS4: out, high, but R46 is DNP
  24 ftdi_layout_init 0x0098 0x008b
  25 #ftdi_layout_signal EN_USB -data 0x0080
  26 #ftdi_layout_signal nTRST -data 0x0010
  27 reset_config none
  28
  29 adapter_khz 5000
  30
  31 transport select jtag
  32
  33 # Add the RTM Artix to the chain. Note that this changes the PLD numbering.
  34 # Unfortunately openocd TAPs can't be disabled after they have been added and
  35 # before `init`.
  36 #source [find cpld/xilinx-xc7.cfg]
  37
  38 set CHIP XCKU040
  39 source [find cpld/xilinx-xcu.cfg]
  40
  41 set XILINX_USER1 0x02
  42 set XILINX_USER2 0x03
  43 set JTAGSPI_IR $XILINX_USER1
  44 source [find cpld/jtagspi.cfg]
  45 flash bank xcu.spi1 jtagspi 0 0 0 0 xcu.proxy $XILINX_USER2