tcl/board/str910-eval.cfg

   1 # str910-eval eval board
   2 #
   3 # Need reset scripts
   4 reset_config trst_and_srst
   5
   6 if { [info exists CHIPNAME] } {
   7    set  _CHIPNAME $CHIPNAME
   8 } else {
   9    set  _CHIPNAME str912
  10 }
  11
  12 if { [info exists ENDIAN] } {
  13    set  _ENDIAN $ENDIAN
  14 } else {
  15    set  _ENDIAN little
  16 }
  17
  18 if { [info exists FLASHTAPID ] } {
  19    set _FLASHTAPID $FLASHTAPID
  20 } else {
  21    set _FLASHTAPID 0x04570041
  22 }
  23 jtag newtap $_CHIPNAME flash -irlen 8 -ircapture 0x1 -irmask 0x1 -expected-id $_FLASHTAPID
  24
  25
  26 if { [info exists CPUTAPID ] } {
  27    set _CPUTAPID $CPUTAPID
  28 } else {
  29    set _CPUTAPID 0x25966041
  30 }
  31 jtag newtap $_CHIPNAME cpu   -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
  32
  33 if { [info exists BSTAPID ] } {
  34    set _BSTAPID $BSTAPID
  35 } else {
  36    set _BSTAPID 0x1457f041
  37 }
  38 jtag newtap $_CHIPNAME bs    -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID
  39
  40 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
  41 target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm966e
  42 $_TARGETNAME configure -work-area-phys 0x50000000 -work-area-virt 0x50000000 -work-area-size 16384 -work-area-backup 1
  43
  44 $_TARGETNAME configure -event reset-init {
  45         # We can increase speed now that we know the target is halted.
  46         #jtag_rclk 3000
  47
  48         # -- Enable 96K RAM
  49         # PFQBC enabled / DTCM & AHB wait-states disabled
  50         mww 0x5C002034 0x0191
  51
  52         str9x flash_config 0 4 2 0 0x80000
  53         flash protect 0 0 7 off
  54 }
  55
  56 #flash bank str9x <base> <size> 0 0 <target#> <variant>
  57 flash bank str9x 0x00000000 0x00080000 0 0 0
  58 flash bank str9x 0x00080000 0x00008000 0 0 0
  59
  60 # For more information about the configuration files, take a look at:
  61 # openocd.texi