tcl/board/vd_pulpissimo_jtag.cfg

   1 # SPDX-License-Identifier: GPL-2.0-or-later
   2 # Cadence virtual debug interface
   3 # RISCV Ibex core with Pulpissimo through JTAG
   4
   5 source [find interface/vdebug.cfg]
   6
   7 set _CHIPNAME ibex
   8 set _HARTID 0x20
   9 set _CPUTAPID 0x249511c3
  10
  11 # vdebug select transport
  12 #transport select jtag
  13
  14 # JTAG reset config, frequency and reset delay
  15 reset_config trst_and_srst
  16 adapter speed 12500
  17 adapter srst delay 10
  18
  19 # BFM hierarchical path and input clk period
  20 vdebug bfm_path tbench.u_vd_jtag_bfm 40ns
  21
  22 # DMA Memories to access backdoor (up to 4)
  23 vdebug mem_path tbench.soc_domain_i.pulp_soc_i.gen_mem_l2_pri\[0\].sram_i.mem_array 0x1c000000 0x8000
  24 vdebug mem_path tbench.soc_domain_i.pulp_soc_i.gen_mem_l2_pri\[1\].sram_i.mem_array 0x1c008000 0x8000
  25 vdebug mem_path tbench.soc_domain_i.pulp_soc_i.gen_mem_l2\[0\].sram_i.mem_array 0x1c010000 0x80000
  26
  27 # need to explicitly define riscv tap, autoprobing does not work for icapture != 0x01
  28 jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x05 -irmask 0x1f -expected-id $_CPUTAPID
  29
  30 jtag arp_init-reset
  31
  32 source [find target/vd_riscv.cfg]