551df061d48492baddad65578b7f5353f30972ce
[openocd.git] / tcl / chip / st / spear / quirk_no_srst.tcl
1 # Quirks to bypass missing SRST on JTAG connector
2 # EVALSPEAr310 Rev. 2.0
3 # http://www.st.com/spear
4 #
5 # Date: 2010-08-17
6 # Author: Antonio Borneo <borneo.antonio@gmail.com>
7
8 # For boards that have JTAG SRST not connected.
9 # We use "arm9 vector_catch reset" to catch button reset event.
10
11
12 $_TARGETNAME configure -event reset-assert sp_reset_assert
13 $_TARGETNAME configure -event reset-deassert-post sp_reset_deassert_post
14
15 # keeps the name of the SPEAr target
16 global sp_target_name
17 set sp_target_name $_TARGETNAME
18
19 # Keeps the argument of "reset" command (run, init, halt).
20 global sp_reset_mode
21 set sp_reset_mode ""
22
23 # Helper procedure. Returns 0 is target is halted.
24 proc sp_is_halted {} {
25 global sp_target_name
26
27 return [expr {[string compare [$sp_target_name curstate] "halted" ] == 0}]
28 }
29
30 # wait for reset button to be pressed, causing CPU to get halted
31 proc sp_reset_deassert_post {} {
32 global sp_reset_mode
33
34 set bar(0) |
35 set bar(1) /
36 set bar(2) -
37 set bar(3) \\
38
39 poll on
40 echo "====> Press reset button on the board <===="
41 for {set i 0} { [sp_is_halted] == 0 } { set i [expr {$i + 1}]} {
42 echo -n "$bar([expr {$i & 3}])\r"
43 sleep 200
44 }
45
46 # Remove catch reset event
47 arm9 vector_catch none
48
49 # CPU is halted, but we typed "reset run" ...
50 if { [string compare $sp_reset_mode "run"] == 0 } {
51 resume
52 }
53 }
54
55 # Override reset-assert, since no SRST available
56 # Catch reset event
57 proc sp_reset_assert {} {
58 arm9 vector_catch reset
59 }
60
61 # Override default init_reset{mode} to catch parameter "mode"
62 proc init_reset {mode} {
63 global sp_reset_mode
64
65 set sp_reset_mode $mode
66
67 # We need to detect CPU get halted, so exit from halt
68 if { [sp_is_halted] } {
69 echo "Resuming CPU to detect reset"
70 resume
71 }
72
73 # Execute default init_reset{mode}
74 jtag arp_init-reset
75 }

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