tcl/target/aduc702x.cfg

   1 # SPDX-License-Identifier: GPL-2.0-or-later
   2
   3 if { [info exists CHIPNAME] } {
   4    set _CHIPNAME $CHIPNAME
   5 } else {
   6    set _CHIPNAME aduc702x
   7 }
   8
   9 if { [info exists ENDIAN] } {
  10    set _ENDIAN $ENDIAN
  11 } else {
  12    # This config file was defaulting to big endian..
  13    set _ENDIAN little
  14 }
  15
  16 if { [info exists CPUTAPID] } {
  17    set _CPUTAPID $CPUTAPID
  18 } else {
  19    set _CPUTAPID 0x3f0f0f0f
  20 }
  21
  22 adapter srst delay 200
  23 jtag_ntrst_delay 200
  24
  25 ## JTAG scan chain
  26 #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
  27 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
  28
  29 ##
  30 ## Target configuration
  31 ##
  32 set _TARGETNAME $_CHIPNAME.cpu
  33 target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
  34
  35 # allocate the entire SRAM as working area
  36 $_TARGETNAME configure -work-area-phys 0x10000 -work-area-size 0x2000
  37
  38 ## flash configuration
  39 # only target number is needed
  40 set _FLASHNAME $_CHIPNAME.flash
  41 flash bank $_FLASHNAME aduc702x 0 0 0 0 $_TARGETNAME
  42
  43 ## If you use the watchdog, the following code makes sure that the board
  44 ## doesn't reboot when halted via JTAG.  Yes, on the older generation
  45 ## AdUC702x, timer3 continues running even when the CPU is halted.
  46
  47 proc watchdog_service {} {
  48     global watchdog_hdl
  49     mww 0xffff036c 0
  50 #    echo "watchdog!!"
  51     set watchdog_hdl [after 500 watchdog_service]
  52 }
  53
  54 $_TARGETNAME configure -event reset-halt-post {  watchdog_service }
  55 $_TARGETNAME configure -event resume-start { global watchdog_hdl; after cancel $watchdog_hdl }